-sbit at 0xA8 RFTXRXIE; /* RF TX/RX done interrupt enable */
-sbit at 0xA9 ADCIE; /* ADC interrupt enable */
-sbit at 0xAA URX0IE; /* USART0 RX interrupt enable */
-sbit at 0xAB URX1IE; /* USART1 RX interrupt enable (shared with I2S RX) */
-sbit at 0xAB I2SRXIE; /* I2S RX interrupt enable (shared with USART1 RX) */
-sbit at 0xAC ENCIE; /* AES encryption/decryption interrupt enable */
-sbit at 0xAD STIE; /* Sleep Timer interrupt enable */
-sbit at 0xAF EA; /* Enable All */
+sbit __at 0xA8 RFTXRXIE; /* RF TX/RX done interrupt enable */
+sbit __at 0xA9 ADCIE; /* ADC interrupt enable */
+sbit __at 0xAA URX0IE; /* USART0 RX interrupt enable */
+sbit __at 0xAB URX1IE; /* USART1 RX interrupt enable (shared with I2S RX) */
+sbit __at 0xAB I2SRXIE; /* I2S RX interrupt enable (shared with USART1 RX) */
+sbit __at 0xAC ENCIE; /* AES encryption/decryption interrupt enable */
+sbit __at 0xAD STIE; /* Sleep Timer interrupt enable */
+sbit __at 0xAF EA; /* Enable All */