+Element["hidename" "0402" "C20" "0.22uF" 81426 119500 -3450 3250 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["hidename" "TI-QFN32" "U6" "CC1120" 278300 91500 0 0 0 100 ""]
+(
+ Pin[-5196 -5196 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[0 -5196 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[5197 -5196 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[-5196 0 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[0 0 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[5197 0 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[-5196 5197 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[0 5197 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pin[5197 5197 2900 2500 0 1500 "GND" "33" "via,thermal(1S,3S)"]
+ Pad[0 0 0 0 14567 0 0 "GND" "33" "square,nopaste"]
+ Pad[-5196 -5196 -5196 -5196 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[-2597 -5196 -2597 -5196 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-2597 -5196 -2597 -5196 1500 0 2598 "GND" "33" "square"]
+ Pad[0 -5196 0 -5196 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[2598 -5196 2598 -5196 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[2598 -5196 2598 -5196 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[5197 -5196 5197 -5196 2598 0 0 "GND" "33" "square,edge2,nopaste"]
+ Pad[-5196 -2597 -5196 -2597 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-5196 -2597 -5196 -2597 1500 0 2598 "GND" "33" "square"]
+ Pad[-2597 -2597 -2597 -2597 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-2597 -2597 -2597 -2597 1500 0 2598 "GND" "33" "square"]
+ Pad[0 -2597 0 -2597 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[0 -2597 0 -2597 1500 0 2598 "GND" "33" "square"]
+ Pad[2598 -2597 2598 -2597 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[2598 -2597 2598 -2597 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[5197 -2597 5197 -2597 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[5197 -2597 5197 -2597 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[-5196 0 -5196 0 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[-2597 0 -2597 0 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-2597 0 -2597 0 1500 0 2598 "GND" "33" "square"]
+ Pad[0 0 0 0 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[2598 0 2598 0 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[2598 0 2598 0 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[5197 0 5197 0 2598 0 0 "GND" "33" "square,edge2,nopaste"]
+ Pad[-5196 2598 -5196 2598 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-5196 2598 -5196 2598 1500 0 2598 "GND" "33" "square"]
+ Pad[-2597 2598 -2597 2598 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-2597 2598 -2597 2598 1500 0 2598 "GND" "33" "square"]
+ Pad[0 2598 0 2598 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[0 2598 0 2598 1500 0 2598 "GND" "33" "square"]
+ Pad[2598 2598 2598 2598 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[2598 2598 2598 2598 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[5197 2598 5197 2598 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[5197 2598 5197 2598 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[-5196 5197 -5196 5197 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[-2597 5197 -2597 5197 2598 0 2598 "GND" "33" "square,nopaste"]
+ Pad[-2597 5197 -2597 5197 1500 0 2598 "GND" "33" "square"]
+ Pad[0 5197 0 5197 2598 0 0 "GND" "33" "square,nopaste"]
+ Pad[2598 5197 2598 5197 2598 0 2598 "GND" "33" "square,edge2,nopaste"]
+ Pad[2598 5197 2598 5197 1500 0 2598 "GND" "33" "square,edge2"]
+ Pad[5197 5197 5197 5197 2598 0 0 "GND" "33" "square,edge2,nopaste"]
+ Pad[-6889 -10865 -6889 -8621 1102 866 1654 "LPF1" "24" ""]
+ Pad[-6889 8622 -6889 10866 1102 866 1654 "VDD_GUARD" "1" "edge2"]
+ Pad[8622 -6889 10866 -6889 1102 866 1654 "NC" "16" "edge2"]
+ Pad[-10865 -6889 -8621 -6889 1102 866 1654 "AVDD_PFD_CHP" "25" ""]
+ Pad[-4920 -10865 -4920 -8621 1102 866 1654 "LPF0" "23" ""]
+ Pad[-4920 8622 -4920 10866 1102 866 1654 "RESET_N" "2" "edge2"]
+ Pad[8622 -4920 10866 -4920 1102 866 1654 "AVDD_RF" "15" "edge2"]
+ Pad[-10865 -4920 -8621 -4920 1102 866 1654 "DCPL_PFD_CHP" "26" ""]
+ Pad[-2952 -10865 -2952 -8621 1102 866 1654 "AVDD_SYNTH1" "22" ""]
+ Pad[-2952 8622 -2952 10866 1102 866 1654 "GPIO3" "3" "edge2"]
+ Pad[8622 -2952 10866 -2952 1102 866 1654 "RBIAS" "14" "edge2"]
+ Pad[-10865 -2952 -8621 -2952 1102 866 1654 "AVDD_SYNTH2" "27" ""]
+ Pad[-983 -10865 -983 -8621 1102 866 1654 "DCPL_VCO" "21" ""]
+ Pad[-983 8622 -983 10866 1102 866 1654 "GPIO2" "4" "edge2"]
+ Pad[8622 -983 10866 -983 1102 866 1654 "AVDD_IF" "13" "edge2"]
+ Pad[-10865 -983 -8621 -983 1102 866 1654 "AVDD_XOSC" "28" ""]
+ Pad[984 -10865 984 -8621 1102 866 1654 "LNA_N" "20" ""]
+ Pad[984 8622 984 10866 1102 866 1654 "DVDD" "5" "edge2"]
+ Pad[8622 984 10866 984 1102 866 1654 "DVDD" "12" "edge2"]
+ Pad[-10865 984 -8621 984 1102 866 1654 "DCPL_XOSC" "29" ""]
+ Pad[2953 -10865 2953 -8621 1102 866 1654 "LNA_P" "19" ""]
+ Pad[2953 8622 2953 10866 1102 866 1654 "DCPL" "6" "edge2"]
+ Pad[8622 2953 10866 2953 1102 866 1654 "CS_N" "11" "edge2"]
+ Pad[-10865 2953 -8621 2953 1102 866 1654 "XOSC_Q1" "30" ""]
+ Pad[4921 -10865 4921 -8621 1102 866 1654 "TRX_SW" "18" ""]
+ Pad[4921 8622 4921 10866 1102 866 1654 "SI" "7" "edge2"]
+ Pad[8622 4921 10866 4921 1102 866 1654 "GPIO0" "10" "edge2"]
+ Pad[-10865 4921 -8621 4921 1102 866 1654 "XOSC_Q2" "31" ""]
+ Pad[6890 -10865 6890 -8621 1102 866 1654 "PA" "17" ""]
+ Pad[6890 8622 6890 10866 1102 866 1654 "SCLK" "8" "edge2"]
+ Pad[8622 6890 10866 6890 1102 866 1654 "SO/GPIO1" "9" "edge2"]
+ Pad[-10865 6890 -8621 6890 1102 866 1654 "EXT_XOSC" "32" ""]
+ ElementArc [-10235 10236 500 500 0 360 1000]
+
+ )
+
+Element["hidename,onsolder" "GP1575.18" "A1" "unknown" 262087 62500 12011 10161 3 100 "auto"]
+(
+ Pin[-7087 0 9843 3937 11024 3740 "1" "1" ""]
+ ElementLine [-35433 35432 35432 35432 1000]
+ ElementLine [-35433 35432 -35433 -35433 1000]
+ ElementLine [-35433 -35433 27558 -35433 1000]
+ ElementLine [35432 35432 35432 -27559 1000]
+ ElementLine [35432 -27559 27558 -35433 1000]
+
+ )
+
+Element["hidename,onsolder" "TDK_PS12" "U8" "TDK_PS12" 135500 62542 8100 -3316 1 100 "auto"]
+(
+ Pin[0 9842 7874 3937 8661 2756 "1" "1" "square,thermal(1X)"]
+ Pin[0 -9843 7874 3937 8661 2756 "2" "2" ""]
+ ElementArc [0 0 24016 24016 90 360 1000]
+
+ )
+
+Element["hidename" "lqfp100" "U7" "STM32L151" 183000 62500 -2700 -8600 0 100 ""]
+(
+ Pad[23621 28739 23621 32282 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1" "25" "square,edge2"]
+ Pad[23621 -32283 23621 -28740 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1" "51" "square"]
+ Pad[-32283 23621 -28740 23621 1181 787 1811 "VDD3" "100" "square"]
+ Pad[28739 23621 32282 23621 1181 787 1811 "PA3/USART2_RX/ADC_IN3/TIM2_CH4/TIM9_CH2" "26" "square,edge2"]
+ Pad[21653 28739 21653 32282 1181 787 1811 "PA1/USART2_RTS/ADC_IN1/TIM2_CH2" "24" "square,edge2"]
+ Pad[21653 -32283 21653 -28740 1181 787 1811 "PB13/SPI2_SCK/USART3_CTS/ADC_IN19/TIM9_CH1" "52" "square"]
+ Pad[-32283 21653 -28740 21653 1181 787 1811 "VSS3" "99" "square"]
+ Pad[28739 21653 32282 21653 1181 787 1811 "VSS4" "27" "square,edge2"]
+ Pad[19684 28739 19684 32282 1181 787 1811 "PA0/WKUP1/USART2_CTS/ADC_IN0/TIM2_CH1_ETR" "23" "square,edge2"]
+ Pad[19684 -32283 19684 -28740 1181 787 1811 "PB14/SPI2_MISO/USART3_RTS/ADC_IN20/TIM9_CH2" "53" "square"]
+ Pad[-32283 19684 -28740 19684 1181 787 1811 "PE1/TIM11_CH1" "98" "square"]
+ Pad[28739 19684 32282 19684 1181 787 1811 "VDD4" "28" "square,edge2"]
+ Pad[17716 28739 17716 32282 1181 787 1811 "VDDA" "22" "square,edge2"]
+ Pad[17716 -32283 17716 -28740 1181 787 1811 "PB15/SPI2_MOSI/ADC_IN21/TIM11_CH1/RTC_50_60HZ" "54" "square"]
+ Pad[-32283 17716 -28740 17716 1181 787 1811 "PE0/TIM4_ETR/TIM10_CH1" "97" "square"]
+ Pad[28739 17716 32282 17716 1181 787 1811 "PA4/SPI1_NSS/USART2_CK/ADC_IN4/DAC_OUT1" "29" "square,edge2"]
+ Pad[15747 28739 15747 32282 1181 787 1811 "VREF+" "21" "square,edge2"]
+ Pad[15747 -32283 15747 -28740 1181 787 1811 "PD8/USART3_TX" "55" "square"]
+ Pad[-32283 15747 -28740 15747 1181 787 1811 "PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1" "96" "square"]
+ Pad[28739 15747 32282 15747 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "30" "square,edge2"]
+ Pad[13779 28739 13779 32282 1181 787 1811 "VREF-" "20" "square,edge2"]
+ Pad[13779 -32283 13779 -28740 1181 787 1811 "PD9/USART3_RX" "56" "square"]
+ Pad[-32283 13779 -28740 13779 1181 787 1811 "PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1" "95" "square"]
+ Pad[28739 13779 32282 13779 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1" "31" "square,edge2"]
+ Pad[11810 28739 11810 32282 1181 787 1811 "VSSA" "19" "square,edge2"]
+ Pad[11810 -32283 11810 -28740 1181 787 1811 "PD10/USART3_CK" "57" "square"]
+ Pad[-32283 11810 -28740 11810 1181 787 1811 "BOOT0" "94" "square"]
+ Pad[28739 11810 32282 11810 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1" "32" "square,edge2"]
+ Pad[9842 28739 9842 32282 1181 787 1811 "PC3/ADC_IN13" "18" "square,edge2"]
+ Pad[9842 -32283 9842 -28740 1181 787 1811 "PD11/USART3_CTS" "58" "square"]
+ Pad[-32283 9842 -28740 9842 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "93" "square"]
+ Pad[28739 9842 32282 9842 1181 787 1811 "PC4/ADC_IN14" "33" "square,edge2"]
+ Pad[7873 28739 7873 32282 1181 787 1811 "PC2/ADC_IN12" "17" "square,edge2"]
+ Pad[7873 -32283 7873 -28740 1181 787 1811 "PD12/TIM4_CH1/USART3_RTS" "59" "square"]
+ Pad[-32283 7873 -28740 7873 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "92" "square"]
+ Pad[28739 7873 32282 7873 1181 787 1811 "PC5/ADC_IN15" "34" "square,edge2"]
+ Pad[5905 28739 5905 32282 1181 787 1811 "PC1/ADC_IN11" "16" "square,edge2"]
+ Pad[5905 -32283 5905 -28740 1181 787 1811 "PD13/TIM4_CH2" "60" "square"]
+ Pad[-32283 5905 -28740 5905 1181 787 1811 "PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI" "91" "square"]
+ Pad[28739 5905 32282 5905 1181 787 1811 "PB0/ADC_IN8/TIM3_CH3/VREF_OUT" "35" "square,edge2"]
+ Pad[3936 28739 3936 32282 1181 787 1811 "PC0/ADC_IN10" "15" "square,edge2"]
+ Pad[3936 -32283 3936 -28740 1181 787 1811 "PD14_TIM4_CH3" "61" "square"]
+ Pad[-32283 3936 -28740 3936 1181 787 1811 "PB4/JNTRSTSPI1_MISO/TIM3_CH1" "90" "square"]
+ Pad[28739 3936 32282 3936 1181 787 1811 "PB1/ADC_IN9/TIM3_CH4/VREF_OUT" "36" "square,edge2"]
+ Pad[1968 28739 1968 32282 1181 787 1811 "NRST" "14" "square,edge2"]
+ Pad[1968 -32283 1968 -28740 1181 787 1811 "PD15/TIM4_CH4" "62" "square"]
+ Pad[-32283 1968 -28740 1968 1181 787 1811 "PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK" "89" "square"]
+ Pad[28739 1968 32282 1968 1181 787 1811 "PB2/BOOT1" "37" "square,edge2"]
+ Pad[0 28739 0 32282 1181 787 1811 "PH1/OSC_OUT" "13" "square,edge2"]
+ Pad[0 -32283 0 -28740 1181 787 1811 "PC6/TIM3_CH1" "63" "square"]
+ Pad[-32283 0 -28740 0 1181 787 1811 "PD7/USART2_CK/TIM9_CH2" "88" "square"]
+ Pad[28739 0 32282 0 1181 787 1811 "PE7/ADC_IN22" "38" "square,edge2"]
+ Pad[-1969 28739 -1969 32282 1181 787 1811 "PH0/OSC_IN" "12" "square,edge2"]
+ Pad[-1969 -32283 -1969 -28740 1181 787 1811 "PC7/TIM3_CH2" "64" "square"]
+ Pad[-32283 -1969 -28740 -1969 1181 787 1811 "PD6/USART2_RX" "87" "square"]
+ Pad[28739 -1969 32282 -1969 1181 787 1811 "PE8/ADC_IN23" "39" "square,edge2"]
+ Pad[-3937 28739 -3937 32282 1181 787 1811 "VDD5" "11" "square,edge2"]
+ Pad[-3937 -32283 -3937 -28740 1181 787 1811 "PC8/TIM3_CH3" "65" "square"]
+ Pad[-32283 -3937 -28740 -3937 1181 787 1811 "PD5/USART2_TX" "86" "square"]
+ Pad[28739 -3937 32282 -3937 1181 787 1811 "PE9/ADC_IN24/TIM2_CH1_ETR" "40" "square,edge2"]
+ Pad[-5906 28739 -5906 32282 1181 787 1811 "VSS5" "10" "square,edge2"]
+ Pad[-5906 -32283 -5906 -28740 1181 787 1811 "PC9/TIM3_CH4" "66" "square"]
+ Pad[-32283 -5906 -28740 -5906 1181 787 1811 "PD4_USART2_RTS/SPI2_MOSI" "85" "square"]
+ Pad[28739 -5906 32282 -5906 1181 787 1811 "PE10/ADC_IN25/TIM2_CH2" "41" "square,edge2"]
+ Pad[-7874 28739 -7874 32282 1181 787 1811 "PC15/OSC32_OUT" "9" "square,edge2"]
+ Pad[-7874 -32283 -7874 -28740 1181 787 1811 "PA8/USART1_CK/MCO" "67" "square"]
+ Pad[-32283 -7874 -28740 -7874 1181 787 1811 "PD3/USART2_CTS/SPI2_MISO" "84" "square"]
+ Pad[28739 -7874 32282 -7874 1181 787 1811 "PE11/TIM2_CH3" "42" "square,edge2"]
+ Pad[-9843 28739 -9843 32282 1181 787 1811 "PC14/OSC32_IN" "8" "square,edge2"]
+ Pad[-9843 -32283 -9843 -28740 1181 787 1811 "PA9/USART1_TX" "68" "square"]
+ Pad[-32283 -9843 -28740 -9843 1181 787 1811 "PD2/TIM3_ETR" "83" "square"]
+ Pad[28739 -9843 32282 -9843 1181 787 1811 "PE12/TIM2_CH4/SPI1_NSS" "43" "square,edge2"]
+ Pad[-11811 28739 -11811 32282 1181 787 1811 "PC13/RTC_AF1/WKUP2" "7" "square,edge2"]
+ Pad[-11811 -32283 -11811 -28740 1181 787 1811 "PA10/USART1_RX" "69" "square"]
+ Pad[-32283 -11811 -28740 -11811 1181 787 1811 "PD1/SPI2_SCK" "82" "square"]
+ Pad[28739 -11811 32282 -11811 1181 787 1811 "PE13/SPI1_SCK" "44" "square,edge2"]
+ Pad[-13780 28739 -13780 32282 1181 787 1811 "VLCD" "6" "square,edge2"]
+ Pad[-13780 -32283 -13780 -28740 1181 787 1811 "PA11/USART1_CTS/USBDM/SPI1_MISO" "70" "square"]
+ Pad[-32283 -13780 -28740 -13780 1181 787 1811 "PD0/SPI2_NSS/TIM9_CH1" "81" "square"]
+ Pad[28739 -13780 32282 -13780 1181 787 1811 "PE14/SPI1_MISO" "45" "square,edge2"]
+ Pad[-15748 28739 -15748 32282 1181 787 1811 "PE6/TRACED3/WKUP3/TIM9_CH2" "5" "square,edge2"]
+ Pad[-15748 -32283 -15748 -28740 1181 787 1811 "PA12/USART1_RTS/USBDP/SPI1_MOSI" "71" "square"]
+ Pad[-32283 -15748 -28740 -15748 1181 787 1811 "PC12/USART3_CK" "80" "square"]
+ Pad[28739 -15748 32282 -15748 1181 787 1811 "PE15/SPI1_MOSI" "46" "square,edge2"]
+ Pad[-17717 28739 -17717 32282 1181 787 1811 "PE5/TRACED2/TIM9_CH1" "4" "square,edge2"]
+ Pad[-17717 -32283 -17717 -28740 1181 787 1811 "PA13/JTMS/SWDIO" "72" "square"]
+ Pad[-32283 -17717 -28740 -17717 1181 787 1811 "PC11/USART3_RX" "79" "square"]
+ Pad[28739 -17717 32282 -17717 1181 787 1811 "PB10/I2C2_SCL/USART3_TX/TIM2_CH3" "47" "square,edge2"]
+ Pad[-19685 28739 -19685 32282 1181 787 1811 "PE4/TRACED1/TIM3_CH2" "3" "square,edge2"]
+ Pad[-19685 -32283 -19685 -28740 1181 787 1811 "PH2/I2C2_SMBA" "73" "square"]
+ Pad[-32283 -19685 -28740 -19685 1181 787 1811 "PC10/USART3_TX" "78" "square"]
+ Pad[28739 -19685 32282 -19685 1181 787 1811 "PB11/I2C2_SDA/USART3_RX/TIM2_CH4" "48" "square,edge2"]
+ Pad[-21654 28739 -21654 32282 1181 787 1811 "PE3/TRACED0/TIM3_CH1" "2" "square,edge2"]
+ Pad[-21654 -32283 -21654 -28740 1181 787 1811 "VSS2" "74" "square"]
+ Pad[-32283 -21654 -28740 -21654 1181 787 1811 "PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS" "77" "square"]
+ Pad[28739 -21654 32282 -21654 1181 787 1811 "VSS1" "49" "square,edge2"]
+ Pad[-23622 28739 -23622 32282 1181 787 1811 "PE2/TRACECK/TIM3_ETR" "1" "square,edge2"]
+ Pad[-23622 -32283 -23622 -28740 1181 787 1811 "VDD2" "75" "square"]
+ Pad[-32283 -23622 -28740 -23622 1181 787 1811 "PA14/JTCK/SWCLK" "76" "square"]
+ Pad[28739 -23622 32282 -23622 1181 787 1811 "VDD1" "50" "square,edge2"]
+ ElementLine [27558 -27559 27558 27558 1000]
+ ElementLine [-27559 -27559 27558 -27559 1000]
+ ElementLine [-27559 -27559 -27559 27558 1000]
+ ElementLine [-27559 27558 27558 27558 1000]
+ ElementArc [-28740 28739 500 500 180 360 1000]
+
+ )
+
+Element["hidename" "0402" "C45" "47nF" 297674 92400 13650 3150 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["hidename" "0402" "C47" "47nF" 297626 84800 13624 3150 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["hidename" "0402" "C44" "47nF" 280200 110300 -2950 13350 1 100 ""]
+(
+ Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+ Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["hidename" "0402" "C43" "47nF" 269800 108700 -2950 14050 1 100 ""]