*/
sfr at 0xF2 ADCCFG;
+/*
+ * Watchdog timer
+ */
+
+sfr at 0xc9 WDCTL;
+
+#define WDCTL_CLEAR_FIRST (0xa << 4)
+#define WDCTL_CLEAR_SECOND (0x5 << 4)
+#define WDCTL_EN (1 << 3)
+#define WDCTL_MODE_WATCHDOG (0 << 2)
+#define WDCTL_MODE_TIMER (1 << 2)
+#define WDCTL_MODE_MASK (1 << 2)
+#define WDCTL_INT_32768 (0 << 0)
+#define WDCTL_INT_8192 (1 << 0)
+#define WDCTL_INT_512 (2 << 0)
+#define WDCTL_INT_64 (3 << 0)
+
/*
* Pin selectors, these set which pins are
* using their peripheral function
#define RFIF_IM_CCA (1 << 1)
#define RFIF_IM_SFD (1 << 0)
+sfr at 0x91 RFIM;
+#define RFIM_IM_TXUNF (1 << 7)
+#define RFIM_IM_RXOVF (1 << 6)
+#define RFIM_IM_TIMEOUT (1 << 5)
+#define RFIM_IM_DONE (1 << 4)
+#define RFIM_IM_CS (1 << 3)
+#define RFIM_IM_PQT (1 << 2)
+#define RFIM_IM_CCA (1 << 1)
+#define RFIM_IM_SFD (1 << 0)
+
sfr at 0xE1 RFST;
#define RFST_SFSTXON 0x00