2 * Copyright © 2008 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
49 sbit at 0x89 RFTXRXIF;
51 #define TCON_RFTXRXIF (1 << 1)
53 #define RFST_SFSTXON 0x00
54 #define RFST_SCAL 0x01
57 #define RFST_SIDLE 0x04
59 __xdata __at (0xdf00) uint8_t RF[0x3c];
61 __xdata __at (0xdf2f) uint8_t RF_IOCFG2;
62 #define RF_IOCFG2_OFF 0x2f
64 __xdata __at (0xdf30) uint8_t RF_IOCFG1;
65 #define RF_IOCFG1_OFF 0x30
67 __xdata __at (0xdf31) uint8_t RF_IOCFG0;
68 #define RF_IOCFG0_OFF 0x31
70 __xdata __at (0xdf00) uint8_t RF_SYNC1;
71 #define RF_SYNC1_OFF 0x00
73 __xdata __at (0xdf01) uint8_t RF_SYNC0;
74 #define RF_SYNC0_OFF 0x01
76 __xdata __at (0xdf02) uint8_t RF_PKTLEN;
77 #define RF_PKTLEN_OFF 0x02
79 __xdata __at (0xdf03) uint8_t RF_PKTCTRL1;
80 #define RF_PKTCTRL1_OFF 0x03
82 __xdata __at (0xdf04) uint8_t RF_PKTCTRL0;
83 #define RF_PKTCTRL0_OFF 0x04
85 __xdata __at (0xdf05) uint8_t RF_ADDR;
86 #define RF_ADDR_OFF 0x05
88 __xdata __at (0xdf06) uint8_t RF_CHANNR;
89 #define RF_CHANNR_OFF 0x06
91 __xdata __at (0xdf07) uint8_t RF_FSCTRL1;
92 #define RF_FSCTRL1_OFF 0x07
94 #define RF_FSCTRL1_FREQ_IF_SHIFT (0)
96 __xdata __at (0xdf08) uint8_t RF_FSCTRL0;
97 #define RF_FSCTRL0_OFF 0x08
99 #define RF_FSCTRL0_FREQOFF_SHIFT (0)
101 __xdata __at (0xdf09) uint8_t RF_FREQ2;
102 #define RF_FREQ2_OFF 0x09
104 __xdata __at (0xdf0a) uint8_t RF_FREQ1;
105 #define RF_FREQ1_OFF 0x0a
107 __xdata __at (0xdf0b) uint8_t RF_FREQ0;
108 #define RF_FREQ0_OFF 0x0b
110 __xdata __at (0xdf0c) uint8_t RF_MDMCFG4;
111 #define RF_MDMCFG4_OFF 0x0c
113 #define RF_MDMCFG4_CHANBW_E_SHIFT 6
114 #define RF_MDMCFG4_CHANBW_M_SHIFT 4
115 #define RF_MDMCFG4_DRATE_E_SHIFT 0
117 __xdata __at (0xdf0d) uint8_t RF_MDMCFG3;
118 #define RF_MDMCFG3_OFF 0x0d
120 #define RF_MDMCFG3_DRATE_M_SHIFT 0
122 __xdata __at (0xdf0e) uint8_t RF_MDMCFG2;
123 #define RF_MDMCFG2_OFF 0x0e
125 #define RF_MDMCFG2_DEM_DCFILT_OFF (1 << 7)
127 #define RF_MDMCFG2_MOD_FORMAT_MASK (7 << 4)
128 #define RF_MDMCFG2_MOD_FORMAT_2_FSK (0 << 4)
129 #define RF_MDMCFG2_MOD_FORMAT_GFSK (1 << 4)
130 #define RF_MDMCFG2_MOD_FORMAT_ASK_OOK (3 << 4)
131 #define RF_MDMCFG2_MOD_FORMAT_MSK (7 << 4)
133 #define RF_MDMCFG2_MANCHESTER_EN (1 << 3)
135 #define RF_MDMCFG2_SYNC_MODE_MASK (0x7 << 0)
136 #define RF_MDMCFG2_SYNC_MODE_NONE (0x0 << 0)
137 #define RF_MDMCFG2_SYNC_MODE_15_16 (0x1 << 0)
138 #define RF_MDMCFG2_SYNC_MODE_16_16 (0x2 << 0)
139 #define RF_MDMCFG2_SYNC_MODE_30_32 (0x3 << 0)
140 #define RF_MDMCFG2_SYNC_MODE_NONE_THRES (0x4 << 0)
141 #define RF_MDMCFG2_SYNC_MODE_15_16_THRES (0x5 << 0)
142 #define RF_MDMCFG2_SYNC_MODE_16_16_THRES (0x6 << 0)
143 #define RF_MDMCFG2_SYNC_MODE_30_32_THRES (0x7 << 0)
145 __xdata __at (0xdf0f) uint8_t RF_MDMCFG1;
146 #define RF_MDMCFG1_OFF 0x0f
148 #define RF_MDMCFG1_FEC_EN (1 << 7)
150 #define RF_MDMCFG1_NUM_PREAMBLE_MASK (7 << 4)
151 #define RF_MDMCFG1_NUM_PREAMBLE_2 (0 << 4)
152 #define RF_MDMCFG1_NUM_PREAMBLE_3 (1 << 4)
153 #define RF_MDMCFG1_NUM_PREAMBLE_4 (2 << 4)
154 #define RF_MDMCFG1_NUM_PREAMBLE_6 (3 << 4)
155 #define RF_MDMCFG1_NUM_PREAMBLE_8 (4 << 4)
156 #define RF_MDMCFG1_NUM_PREAMBLE_12 (5 << 4)
157 #define RF_MDMCFG1_NUM_PREAMBLE_16 (6 << 4)
158 #define RF_MDMCFG1_NUM_PREAMBLE_24 (7 << 4)
160 #define RF_MDMCFG1_CHANSPC_E_MASK (3 << 0)
161 #define RF_MDMCFG1_CHANSPC_E_SHIFT (0)
163 __xdata __at (0xdf10) uint8_t RF_MDMCFG0;
164 #define RF_MDMCFG0_OFF 0x10
166 #define RF_MDMCFG0_CHANSPC_M_SHIFT (0)
168 __xdata __at (0xdf11) uint8_t RF_DEVIATN;
169 #define RF_DEVIATN_OFF 0x11
171 #define RF_DEVIATN_DEVIATION_E_SHIFT 4
172 #define RF_DEVIATN_DEVIATION_M_SHIFT 0
174 __xdata __at (0xdf12) uint8_t RF_MCSM2;
175 #define RF_MCSM2_OFF 0x12
177 __xdata __at (0xdf13) uint8_t RF_MCSM1;
178 #define RF_MCSM1_OFF 0x13
180 __xdata __at (0xdf14) uint8_t RF_MCSM0;
181 #define RF_MCSM0_OFF 0x14
183 __xdata __at (0xdf15) uint8_t RF_FOCCFG;
184 #define RF_FOCCFG_OFF 0x15
186 __xdata __at (0xdf16) uint8_t RF_BSCFG;
187 #define RF_BSCFG_OFF 0x16
189 __xdata __at (0xdf17) uint8_t RF_AGCCTRL2;
190 #define RF_AGCCTRL2_OFF 0x17
192 __xdata __at (0xdf18) uint8_t RF_AGCCTRL1;
193 #define RF_AGCCTRL1_OFF 0x18
195 __xdata __at (0xdf19) uint8_t RF_AGCCTRL0;
196 #define RF_AGCCTRL0_OFF 0x19
198 __xdata __at (0xdf1a) uint8_t RF_FREND1;
199 #define RF_FREND1_OFF 0x1a
201 #define RF_FREND1_LNA_CURRENT_SHIFT 6
202 #define RF_FREND1_LNA2MIX_CURRENT_SHIFT 4
203 #define RF_FREND1_LODIV_BUF_CURRENT_RX_SHIFT 2
204 #define RF_FREND1_MIX_CURRENT_SHIFT 0
206 __xdata __at (0xdf1b) uint8_t RF_FREND0;
207 #define RF_FREND0_OFF 0x1b
209 #define RF_FREND0_LODIV_BUF_CURRENT_TX_MASK (0x3 << 4)
210 #define RF_FREND0_LODIV_BUF_CURRENT_TX_SHIFT 4
211 #define RF_FREND0_PA_POWER_MASK (0x7)
212 #define RF_FREND0_PA_POWER_SHIFT 0
214 __xdata __at (0xdf1c) uint8_t RF_FSCAL3;
215 #define RF_FSCAL3_OFF 0x1c
217 __xdata __at (0xdf1d) uint8_t RF_FSCAL2;
218 #define RF_FSCAL2_OFF 0x1d
220 __xdata __at (0xdf1e) uint8_t RF_FSCAL1;
221 #define RF_FSCAL1_OFF 0x1e
223 __xdata __at (0xdf1f) uint8_t RF_FSCAL0;
224 #define RF_FSCAL0_OFF 0x1f
226 __xdata __at (0xdf23) uint8_t RF_TEST2;
227 #define RF_TEST2_OFF 0x23
229 #define RF_TEST2_NORMAL_MAGIC 0x88
230 #define RF_TEST2_RX_LOW_DATA_RATE_MAGIC 0x81
232 __xdata __at (0xdf24) uint8_t RF_TEST1;
233 #define RF_TEST1_OFF 0x24
235 #define RF_TEST1_TX_MAGIC 0x31
236 #define RF_TEST1_RX_LOW_DATA_RATE_MAGIC 0x35
238 __xdata __at (0xdf25) uint8_t RF_TEST0;
239 #define RF_TEST0_OFF 0x25
241 #define RF_TEST0_7_2_MASK (0xfc)
242 #define RF_TEST0_VCO_SEL_CAL_EN (1 << 1)
243 #define RF_TEST0_0_MASK (1)
245 /* These are undocumented, and must be computed
246 * using the provided tool.
248 __xdata __at (0xdf27) uint8_t RF_PA_TABLE7;
249 #define RF_PA_TABLE7_OFF 0x27
251 __xdata __at (0xdf28) uint8_t RF_PA_TABLE6;
252 #define RF_PA_TABLE6_OFF 0x28
254 __xdata __at (0xdf29) uint8_t RF_PA_TABLE5;
255 #define RF_PA_TABLE5_OFF 0x29
257 __xdata __at (0xdf2a) uint8_t RF_PA_TABLE4;
258 #define RF_PA_TABLE4_OFF 0x2a
260 __xdata __at (0xdf2b) uint8_t RF_PA_TABLE3;
261 #define RF_PA_TABLE3_OFF 0x2b
263 __xdata __at (0xdf2c) uint8_t RF_PA_TABLE2;
264 #define RF_PA_TABLE2_OFF 0x2c
266 __xdata __at (0xdf2d) uint8_t RF_PA_TABLE1;
267 #define RF_PA_TABLE1_OFF 0x2d
269 __xdata __at (0xdf2e) uint8_t RF_PA_TABLE0;
270 #define RF_PA_TABLE0_OFF 0x2e
272 __xdata __at (0xdf36) uint8_t RF_PARTNUM;
273 #define RF_PARTNUM_OFF 0x36
275 __xdata __at (0xdf37) uint8_t RF_VERSION;
276 #define RF_VERSION_OFF 0x37
278 __xdata __at (0xdf38) uint8_t RF_FREQEST;
279 #define RF_FREQEST_OFF 0x38
281 __xdata __at (0xdf39) uint8_t RF_LQI;
282 #define RF_LQI_OFF 0x39
284 #define RF_LQI_CRC_OK (1 << 7)
285 #define RF_LQI_LQI_EST_MASK (0x7f)
287 __xdata __at (0xdf3a) uint8_t RF_RSSI;
288 #define RF_RSSI_OFF 0x3a
290 __xdata __at (0xdf3b) uint8_t RF_MARCSTATE;
291 #define RF_MARCSTATE_OFF 0x3b
293 #define RF_MARCSTATE_MASK 0x0f
294 #define RF_MARCSTATE_SLEEP 0x00
295 #define RF_MARCSTATE_IDLE 0x01
296 #define RF_MARCSTATE_VCOON_MC 0x03
297 #define RF_MARCSTATE_REGON_MC 0x04
298 #define RF_MARCSTATE_MANCAL 0x05
299 #define RF_MARCSTATE_VCOON 0x06
300 #define RF_MARCSTATE_REGON 0x07
301 #define RF_MARCSTATE_STARTCAL 0x08
302 #define RF_MARCSTATE_BWBOOST 0x09
303 #define RF_MARCSTATE_FS_LOCK 0x0a
304 #define RF_MARCSTATE_IFADCON 0x0b
305 #define RF_MARCSTATE_ENDCAL 0x0c
306 #define RF_MARCSTATE_RX 0x0d
307 #define RF_MARCSTATE_RX_END 0x0e
308 #define RF_MARCSTATE_RX_RST 0x0f
309 #define RF_MARCSTATE_TXRX_SWITCH 0x10
310 #define RF_MARCSTATE_RX_OVERFLOW 0x11
311 #define RF_MARCSTATE_FSTXON 0x12
312 #define RF_MARCSTATE_TX 0x13
313 #define RF_MARCSTATE_TX_END 0x14
314 #define RF_MARCSTATE_RXTX_SWITCH 0x15
315 #define RF_MARCSTATE_TX_UNDERFLOW 0x16
318 __xdata __at (0xdf3c) uint8_t RF_PKTSTATUS;
319 #define RF_PKTSTATUS_OFF 0x3c
321 #define RF_PKTSTATUS_CRC_OK (1 << 7)
322 #define RF_PKTSTATUS_CS (1 << 6)
323 #define RF_PKTSTATUS_PQT_REACHED (1 << 5)
324 #define RF_PKTSTATUS_CCA (1 << 4)
325 #define RF_PKTSTATUS_SFD (1 << 3)
327 __xdata __at (0xdf3d) uint8_t RF_VCO_VC_DAC;
328 #define RF_VCO_VC_DAC_OFF 0x3d
330 #define nop() _asm nop _endasm;
333 delay (unsigned char n)
344 tone (unsigned char n, unsigned char m)
368 /* Values from SmartRF® Studio for:
370 * Deviation: 20.507812 kHz
371 * Datarate: 38.360596 kBaud
373 * RF Freq: 434.549927 MHz
374 * Channel: 99.975586 kHz
376 * RX filter: 93.75 kHz
380 * For 434.550MHz, the frequency value is:
382 * 434.550e6 / (24e6 / 2**16) = 1186611.2
385 #define FREQ_CONTROL 1186611
388 * For IF freq of 140.62kHz, the IF value is:
390 * 140.62e3 / (24e6 / 2**10) = 6
393 #define IF_FREQ_CONTROL 6
396 * For channel bandwidth of 93.75 kHz, the CHANBW_E and CHANBW_M values are
398 * BW = 24e6 / (8 * (4 + M) * 2 ** E)
400 * So, M = 0 and E = 3
407 * For a symbol rate of 38360kBaud, the DRATE_E and DRATE_M values are:
409 * R = (256 + M) * 2** E * 24e6 / 2**28
411 * So M is 163 and E is 10
417 #define PACKET_LEN 128
419 /* This are from the table for 433MHz */
421 #define RF_POWER_M30_DBM 0x12
422 #define RF_POWER_M20_DBM 0x0e
423 #define RF_POWER_M15_DBM 0x1d
424 #define RF_POWER_M10_DBM 0x34
425 #define RF_POWER_M5_DBM 0x2c
426 #define RF_POWER_0_DBM 0x60
427 #define RF_POWER_5_DBM 0x84
428 #define RF_POWER_7_DBM 0xc8
429 #define RF_POWER_10_DBM 0xc0
431 #define RF_POWER RF_POWER_M30_DBM
433 static __code uint8_t radio_setup[] = {
434 RF_PA_TABLE7_OFF, RF_POWER,
435 RF_PA_TABLE6_OFF, RF_POWER,
436 RF_PA_TABLE5_OFF, RF_POWER,
437 RF_PA_TABLE4_OFF, RF_POWER,
438 RF_PA_TABLE3_OFF, RF_POWER,
439 RF_PA_TABLE2_OFF, RF_POWER,
440 RF_PA_TABLE1_OFF, RF_POWER,
441 RF_PA_TABLE0_OFF, RF_POWER,
443 RF_FREQ2_OFF, FREQ_CONTROL >> 16,
444 RF_FREQ1_OFF, FREQ_CONTROL >> 8,
445 RF_FREQ0_OFF, FREQ_CONTROL >> 0,
447 RF_FSCTRL1_OFF, (IF_FREQ_CONTROL << RF_FSCTRL1_FREQ_IF_SHIFT),
448 RF_FSCTRL0_OFF, (0 << RF_FSCTRL0_FREQOFF_SHIFT),
450 RF_MDMCFG4_OFF, ((CHANBW_E << RF_MDMCFG4_CHANBW_E_SHIFT) |
451 (CHANBW_M << RF_MDMCFG4_CHANBW_M_SHIFT) |
452 (DRATE_E << RF_MDMCFG4_DRATE_E_SHIFT)),
453 RF_MDMCFG3_OFF, (DRATE_M << RF_MDMCFG3_DRATE_M_SHIFT),
454 RF_MDMCFG2_OFF, (RF_MDMCFG2_DEM_DCFILT_OFF |
455 RF_MDMCFG2_MOD_FORMAT_GFSK |
456 RF_MDMCFG2_SYNC_MODE_NONE),
457 RF_MDMCFG1_OFF, (RF_MDMCFG1_NUM_PREAMBLE_4 |
458 (2 << RF_MDMCFG1_CHANSPC_E_SHIFT)),
459 RF_MDMCFG0_OFF, (17 << RF_MDMCFG0_CHANSPC_M_SHIFT),
463 RF_DEVIATN_OFF, ((3 << RF_DEVIATN_DEVIATION_E_SHIFT) |
464 (6 << RF_DEVIATN_DEVIATION_M_SHIFT)),
466 /* SmartRF says set LODIV_BUF_CURRENT_TX to 0
467 * And, we're not using power ramping, so use PA_POWER 0
469 RF_FREND0_OFF, ((1 << RF_FREND0_LODIV_BUF_CURRENT_TX_SHIFT) |
470 (0 << RF_FREND0_PA_POWER_SHIFT)),
472 RF_FREND1_OFF, ((1 << RF_FREND1_LNA_CURRENT_SHIFT) |
473 (1 << RF_FREND1_LNA2MIX_CURRENT_SHIFT) |
474 (1 << RF_FREND1_LODIV_BUF_CURRENT_RX_SHIFT) |
475 (2 << RF_FREND1_MIX_CURRENT_SHIFT)),
480 RF_AGCCTRL2_OFF, 0x43,
481 RF_AGCCTRL1_OFF, 0x40,
482 RF_AGCCTRL0_OFF, 0x91,
493 /* default sync values */
497 /* max packet length */
498 RF_PKTLEN_OFF, PACKET_LEN,
500 RF_PKTCTRL1_OFF, 0x04,
501 RF_PKTCTRL0_OFF, 0x00,
514 for (i = 0; i < sizeof (radio_setup); i += 2)
515 RF[radio_setup[i]] = radio_setup[i+1];
521 /* Set P2_0 to output */
532 for (i = 0; i < PACKET_LEN; i++) {