2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 #define HAS_TASK_QUEUE 1
23 /* 8MHz High speed external crystal */
24 #define AO_HSE 8000000
26 /* PLLVCO = 96MHz (so that USB will work) */
28 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12)
30 /* SYSCLK = 32MHz (no need to go faster than CPU) */
32 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
34 /* HCLK = 32MHz (CPU clock) */
35 #define AO_AHB_PRESCALER 1
36 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
38 /* Run APB1 at 16MHz (HCLK/2) */
39 #define AO_APB1_PRESCALER 2
40 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
42 /* Run APB2 at 16MHz (HCLK/2) */
43 #define AO_APB2_PRESCALER 2
44 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
46 #define HAS_SERIAL_1 0
47 #define USE_SERIAL_1_STDIN 0
48 #define SERIAL_1_PB6_PB7 0
49 #define SERIAL_1_PA9_PA10 1
51 #define HAS_SERIAL_2 0
52 #define USE_SERIAL_2_STDIN 0
53 #define SERIAL_2_PA2_PA3 0
54 #define SERIAL_2_PD5_PD6 0
56 #define HAS_SERIAL_3 0
57 #define USE_SERIAL_3_STDIN 0
58 #define SERIAL_3_PB10_PB11 0
59 #define SERIAL_3_PC10_PC11 1
60 #define SERIAL_3_PD8_PD9 0
63 #define USE_INTERNAL_FLASH 0
67 #define HAS_TELEMETRY 0
68 #define PACKET_HAS_SLAVE 0
71 #define HAS_SPI_SLAVE_1 1
72 #define SPI_1_PA5_PA6_PA7 1
73 #define SPI_1_PB3_PB4_PB5 0
74 #define SPI_1_PE13_PE14_PE15 0
75 #define SPI_1_OSPEEDR STM_OSPEEDR_10MHz
78 #define SPI_2_PB13_PB14_PB15 1
79 #define SPI_2_PD1_PD3_PD4 0
80 #define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
82 #define SPI_2_PORT (&stm_gpiob)
83 #define SPI_2_SCK_PIN 13
84 #define SPI_2_MISO_PIN 14
85 #define SPI_2_MOSI_PIN 15
86 #define SPI_SLAVE_INDEX 1
89 #define I2C_1_PB8_PB9 0
92 #define I2C_2_PB10_PB11 0
94 #define LOW_LEVEL_DEBUG 0
96 #define LED_PORT_0_ENABLE STM_RCC_AHBENR_GPIOAEN
98 #define LED_PORT_0 (&stm_gpioa)
99 #define LED_PORT_0_MASK (0xff)
100 #define LED_PORT_0_SHIFT 0
101 #define LED_PIN_RED 8
102 #define LED_PIN_GREEN 9
103 #define AO_LED_RED (1 << LED_PIN_RED)
104 #define AO_LED_GREEN (1 << LED_PIN_GREEN)
106 #define LEDS_AVAILABLE (AO_LED_RED | AO_LED_GREEN)
117 #define M25_MAX_CHIPS 1
118 #define AO_M25_SPI_CS_PORT (&stm_gpioa)
119 #define AO_M25_SPI_CS_MASK (1 << 3)
120 #define AO_M25_SPI_BUS AO_SPI_2_PB13_PB14_PB15
126 #define AO_DATA_RING 32
130 int16_t adc[AO_ADC_NUM];
133 #define AO_ADC_TEMP 16
135 #define AO_ADC_RCC_AHBENR 0
137 #define AO_NUM_ADC_PIN 0
141 #define AO_ADC_SQ1 AO_ADC_TEMP
144 #endif /* _AO_PINS_H_ */