2 * Copyright © 2010 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 #define HAS_RADIO_RATE 1
23 #define HAS_TELEMETRY 0
29 #define HAS_SERIAL_1 0
35 #define USE_INTERNAL_FLASH 1
36 #define IGNITE_ON_P0 0
37 #define PACKET_HAS_MASTER 0
38 #define PACKET_HAS_SLAVE 0
39 #define AO_DATA_RING 32
41 /* 8MHz High speed external crystal */
42 #define AO_HSE 8000000
44 /* PLLVCO = 96MHz (so that USB will work) */
46 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12)
48 #define AO_CC1200_FOSC 40000000
50 /* SYSCLK = 32MHz (no need to go faster than CPU) */
52 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
54 /* HCLK = 32MHz (CPU clock) */
55 #define AO_AHB_PRESCALER 1
56 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
58 /* Run APB1 at 16MHz (HCLK/2) */
59 #define AO_APB1_PRESCALER 2
60 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
62 /* Run APB2 at 16MHz (HCLK/2) */
63 #define AO_APB2_PRESCALER 2
64 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
67 #define USE_INTERNAL_FLASH 1
68 #define USE_EEPROM_CONFIG 1
69 #define USE_STORAGE_CONFIG 0
73 #define HAS_RADIO_RATE 1
74 #define HAS_TELEMETRY 0
78 #define SPI_1_PA5_PA6_PA7 0
79 #define SPI_1_PB3_PB4_PB5 0
80 #define SPI_1_PE13_PE14_PE15 0
82 #define HAS_SPI_2 1 /* CC1200 */
83 #define SPI_2_PB13_PB14_PB15 1
84 #define SPI_2_PD1_PD3_PD4 0
85 #define SPI_2_GPIO (&stm_gpiob)
89 #define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
95 #define PACKET_HAS_SLAVE 0
96 #define PACKET_HAS_MASTER 0
98 #define FAST_TIMER_FREQ 10000 /* .1ms for debouncing */
101 * Radio is a cc1200 connected via SPI
104 #define AO_RADIO_CAL_DEFAULT 5695733
106 #define AO_FEC_DEBUG 0
107 #define AO_CC1200_SPI_CS_PORT (&stm_gpioa)
108 #define AO_CC1200_SPI_CS_PIN 7
109 #define AO_CC1200_SPI_BUS AO_SPI_2_PB13_PB14_PB15
110 #define AO_CC1200_SPI stm_spi2
112 #define AO_CC1200_INT_PORT (&stm_gpiob)
113 #define AO_CC1200_INT_PIN (11)
115 #define AO_CC1200_INT_GPIO 2
116 #define AO_CC1200_INT_GPIO_IOCFG CC1200_IOCFG2
118 #define LED_PORT_0 (&stm_gpioa)
119 #define LED_PORT_1 (&stm_gpiob)
121 #define LED_PORT_0_ENABLE STM_RCC_AHBENR_GPIOAEN
122 #define LED_PORT_1_ENABLE STM_RCC_AHBENR_GPIOBEN
124 /* Port A, pins 4-6 */
125 #define LED_PORT_0_SHIFT 4
126 #define LED_PORT_0_MASK 0x7
127 #define LED_PIN_GREEN 0
128 #define LED_PIN_AMBER 1
129 #define LED_PIN_RED 2
130 #define AO_LED_RED (1 << LED_PIN_RED)
131 #define AO_LED_AMBER (1 << LED_PIN_AMBER)
132 #define AO_LED_GREEN (1 << LED_PIN_GREEN)
134 /* Port B, pins 3-5 */
135 #define LED_PORT_1_SHIFT 0
136 #define LED_PORT_1_MASK (0x7 << 3)
137 #define LED_PIN_CONT_1 3
138 #define LED_PIN_CONT_0 4
139 #define LED_PIN_ARMED 5
141 #define AO_LED_ARMED (1 << LED_PIN_ARMED)
142 #define AO_LED_CONTINUITY(c) (1 << (4 - (c)))
143 #define AO_LED_CONTINUITY_MASK (0x3 << 3)
145 #define LEDS_AVAILABLE (LED_PORT_0_MASK|LED_PORT_1_MASK)
147 #define SPI_CS_PORT P1
148 #define SPI_CS_SEL P1SEL
149 #define SPI_CS_DIR P1DIR
151 #define SPI_CONST 0x00
154 #define AO_PAD_PORT (&stm_gpiob)
156 #define AO_PAD_PIN_0 9
157 #define AO_PAD_ADC_0 0
159 #define AO_PAD_PIN_1 8
160 #define AO_PAD_ADC_1 1
162 #define AO_PAD_ALL_PINS ((1 << AO_PAD_PIN_0) | (1 << AO_PAD_PIN_1))
163 #define AO_PAD_ALL_CHANNELS ((1 << 0) | (1 << 1))
165 /* test these values with real igniters */
166 #define AO_PAD_RELAY_CLOSED 3524
167 #define AO_PAD_NO_IGNITER 16904
168 #define AO_PAD_GOOD_IGNITER 22514
170 #define AO_PAD_ADC_PYRO 8
171 #define AO_PAD_ADC_BATT 2
173 #define AO_ADC_FIRST_PIN 0
177 #define AO_ADC_SQ1 AO_PAD_ADC_0
178 #define AO_ADC_SQ2 AO_PAD_ADC_1
179 #define AO_ADC_SQ3 AO_PAD_ADC_PYRO
180 #define AO_ADC_SQ4 AO_PAD_ADC_BATT
182 #define AO_PYRO_R_PYRO_SENSE 200
183 #define AO_PYRO_R_SENSE_GND 22
185 #define AO_FIRE_R_POWER_FET 0
186 #define AO_FIRE_R_FET_SENSE 200
187 #define AO_FIRE_R_SENSE_GND 22
189 #define HAS_ADC_TEMP 0
192 int16_t sense[AO_PAD_NUM];
197 #define AO_ADC_DUMP(p) \
198 printf ("tick: %5u 0: %5d 1: %5d pyro: %5d batt %5d\n", \
205 #define AO_ADC_PINS ((1 << AO_PAD_ADC_0) | \
206 (1 << AO_PAD_ADC_1) | \
207 (1 << AO_PAD_ADC_PYRO) | \
208 (1 << AO_PAD_ADC_BATT))
210 #endif /* _AO_PINS_H_ */