2 * Copyright © 2010 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 #define HAS_SERIAL_1 1
27 #define HAS_SERIAL_1_ALT_1 1
28 #define HAS_SERIAL_1_ALT_2 0
29 #define HAS_SERIAL_1_HW_FLOW 1
30 #define USE_SERIAL_1_STDIN 1
31 #define DELAY_SERIAL_1_STDIN 1
35 #define USE_INTERNAL_FLASH 0
39 #define PACKET_HAS_MASTER 1
40 #define PACKET_HAS_SLAVE 0
43 #define LEDS_AVAILABLE (AO_LED_RED|AO_LED_BLUE)
44 #define AO_MONITOR_LED AO_LED_RED
45 #define AO_BT_LED AO_LED_BLUE
46 #define BT_LINK_ON_P2 0
47 #define BT_LINK_ON_P1 1
48 #define BT_LINK_PIN_INDEX 7
49 #define BT_LINK_PIN P1_7
51 #define LEGACY_MONITOR 0
52 #define HAS_TELEMETRY 0
53 #define AO_RADIO_REG_TEST 1
56 #define AO_PAD_ADC_BATT 0
57 #define AO_ADC_PINS (1 << AO_PAD_ADC_BATT)
63 #define AO_ADC_DUMP(p) \
64 printf ("tick: %5u batt %5d\n", \
70 #define DBG_CLOCK (1 << 4) /* mi0 */
71 #define DBG_DATA (1 << 5) /* mo0 */
72 #define DBG_RESET_N (1 << 3) /* c0 */
74 #define DBG_CLOCK_PIN (P1_4)
75 #define DBG_DATA_PIN (P1_5)
76 #define DBG_RESET_N_PIN (P1_3)
78 #define DBG_PORT_NUM 1
80 #define DBG_PORT_SEL P1SEL
81 #define DBG_PORT_INP P1INP
82 #define DBG_PORT_DIR P1DIR
84 #endif /* DBG_ON_P1 */
88 #define DBG_CLOCK (1 << 3)
89 #define DBG_DATA (1 << 4)
90 #define DBG_RESET_N (1 << 5)
92 #define DBG_CLOCK_PIN (P0_3)
93 #define DBG_DATA_PIN (P0_4)
94 #define DBG_RESET_N_PIN (P0_5)
96 #define DBG_PORT_NUM 0
98 #define DBG_PORT_SEL P0SEL
99 #define DBG_PORT_INP P0INP
100 #define DBG_PORT_DIR P0DIR
102 #endif /* DBG_ON_P0 */
104 #endif /* _AO_PINS_H_ */