2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
25 #define USB_DEBUG_DATA 0
28 #ifndef AO_PA11_PA12_RMP
29 #error "must define AO_PA11_PA12_RMP"
32 #ifndef AO_POWER_MANAGEMENT
33 #define AO_POWER_MANAGEMENT 0
37 #define USE_USB_STDIO 1
41 #define AO_USB_OUT_SLEEP_ADDR (&ao_stdin_ready)
43 #define AO_USB_OUT_SLEEP_ADDR (&ao_usb_out_avail)
47 #define debug(format, args...) printf(format, ## args);
49 #define debug(format, args...)
53 #define debug_data(format, args...) printf(format, ## args);
55 #define debug_data(format, args...)
59 uint8_t dir_type_recip;
66 static uint8_t ao_usb_ep0_state;
68 /* Pending EP0 IN data */
69 static const uint8_t *ao_usb_ep0_in_data; /* Remaining data */
70 static uint8_t ao_usb_ep0_in_len; /* Remaining amount */
72 /* Temp buffer for smaller EP0 in data */
73 static uint8_t ao_usb_ep0_in_buf[2];
75 /* Pending EP0 OUT data */
76 static uint8_t *ao_usb_ep0_out_data;
77 static uint8_t ao_usb_ep0_out_len;
80 * Objects allocated in special USB memory
83 /* Buffer description tables */
84 static union stm_usb_bdt *ao_usb_bdt;
85 /* USB address of end of allocated storage */
87 static uint16_t ao_usb_sram_addr;
90 /* Pointer to ep0 tx/rx buffers in USB memory */
91 static uint16_t *ao_usb_ep0_tx_buffer;
92 static uint16_t *ao_usb_ep0_rx_buffer;
95 /* Pointer to interrupt buffer in USB memory */
96 static uint16_t ao_usb_int_tx_offset;
99 /* Pointer to bulk data tx/rx buffers in USB memory */
101 static uint16_t ao_usb_in_tx_offset;
102 static uint16_t *ao_usb_in_tx_buffer;
104 /* System ram shadow of USB buffer; writing individual bytes is
105 * too much of a pain (sigh) */
106 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
107 static uint8_t ao_usb_tx_count;
111 static uint16_t ao_usb_out_rx_offset;
112 static uint16_t *ao_usb_out_rx_buffer;
114 /* System ram shadow of USB buffer; writing individual bytes is
115 * too much of a pain (sigh) */
116 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
117 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
121 static uint16_t ao_usb_in2_tx_offset;
122 static uint16_t *ao_usb_in2_tx_buffer;
124 /* System ram shadow of USB buffer; writing individual bytes is
125 * too much of a pain (sigh) */
126 static uint8_t ao_usb_tx2_buffer[AO_USB_IN_SIZE];
127 static uint8_t ao_usb_tx2_count;
131 * End point register indices
134 #define AO_USB_CONTROL_EPR 0
135 #define AO_USB_INT_EPR 1
136 #define AO_USB_OUT_EPR 2
137 #define AO_USB_IN_EPR 3
138 #define AO_USB_IN2_EPR 4
140 /* Marks when we don't need to send an IN packet.
141 * This happens only when the last IN packet is not full,
142 * otherwise the host will expect to keep seeing packets.
143 * Send a zero-length packet as required
145 static uint8_t ao_usb_in_flushed;
147 /* Marks when we have delivered an IN packet to the hardware
148 * and it has not been received yet. ao_sleep on this address
149 * to wait for it to be delivered.
151 static uint8_t ao_usb_in_pending;
154 /* Marks when we have delivered an IN packet to the hardware
155 * and it has not been received yet. ao_sleep on this address
156 * to wait for it to be delivered.
158 static uint8_t ao_usb_in2_pending;
159 static uint16_t in2_count;
160 static uint8_t ao_usb_in2_flushed;
163 /* Marks when an OUT packet has been received by the hardware
164 * but not pulled to the shadow buffer.
166 static uint8_t ao_usb_out_avail;
167 uint8_t ao_usb_running;
168 static uint8_t ao_usb_configuration;
170 #define AO_USB_EP0_GOT_SETUP 1
171 #define AO_USB_EP0_GOT_RX_DATA 2
172 #define AO_USB_EP0_GOT_TX_ACK 4
174 static uint8_t ao_usb_ep0_receive;
175 static uint8_t ao_usb_address;
176 static uint8_t ao_usb_address_pending;
178 static inline uint32_t set_toggle(uint32_t current_value,
180 uint32_t desired_value)
182 return (current_value ^ desired_value) & mask;
185 static inline uint16_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
187 return (uint16_t *) (stm_usb_sram + sram_addr);
190 static inline uint16_t ao_usb_packet_buffer_offset(uint16_t *addr)
192 return (uint16_t) ((uint8_t *) addr - stm_usb_sram);
195 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
196 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
199 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
200 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
203 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
204 return (epr >> STM_USB_EPR_CTR_RX) & 1;
207 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
208 return (epr >> STM_USB_EPR_CTR_TX) & 1;
211 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
212 return (epr >> STM_USB_EPR_SETUP) & 1;
215 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
216 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
219 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
220 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
224 * Set current device address and mark the
225 * interface as active
228 ao_usb_set_address(uint8_t address)
230 debug("ao_usb_set_address %02x\n", address);
231 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
232 ao_usb_address_pending = 0;
236 * Write these values to preserve register contents under HW changes
239 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
240 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
241 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
242 (1 << STM_USB_EPR_CTR_TX) | \
243 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
244 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
246 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
247 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
248 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
249 (1 << STM_USB_EPR_CTR_TX) | \
250 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
251 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
254 * These bits are purely under sw control, so preserve them in the
255 * register by re-writing what was read
257 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
258 (1 << STM_USB_EPR_EP_KIND) | \
259 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
265 #define _tx_dbg0(msg) _dbg(__LINE__,msg,0)
266 #define _tx_dbg1(msg,value) _dbg(__LINE__,msg,value)
268 #define _tx_dbg0(msg)
269 #define _tx_dbg1(msg,value)
273 #define _rx_dbg0(msg) _dbg(__LINE__,msg,0)
274 #define _rx_dbg1(msg,value) _dbg(__LINE__,msg,value)
276 #define _rx_dbg0(msg)
277 #define _rx_dbg1(msg,value)
281 static void _dbg(int line, char *msg, uint32_t value);
285 * Set the state of the specified endpoint register to a new
286 * value. This is tricky because the bits toggle where the new
287 * value is one, and we need to write invariant values in other
288 * spots of the register. This hardware is strange...
291 _ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
293 uint16_t epr_write, epr_old;
295 _tx_dbg1("set_stat_tx top", stat_tx);
296 epr_old = epr_write = stm_usb.epr[ep].r;
297 epr_write &= STM_USB_EPR_PRESERVE_MASK;
298 epr_write |= STM_USB_EPR_INVARIANT;
299 epr_write |= set_toggle(epr_old,
300 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
301 stat_tx << STM_USB_EPR_STAT_TX);
302 stm_usb.epr[ep].r = epr_write;
303 _tx_dbg1("set_stat_tx bottom", epr_write);
307 ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
309 ao_arch_block_interrupts();
310 _ao_usb_set_stat_tx(ep, stat_tx);
311 ao_arch_release_interrupts();
315 _ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
316 uint16_t epr_write, epr_old;
318 epr_write = epr_old = stm_usb.epr[ep].r;
319 epr_write &= STM_USB_EPR_PRESERVE_MASK;
320 epr_write |= STM_USB_EPR_INVARIANT;
321 epr_write |= set_toggle(epr_old,
322 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
323 stat_rx << STM_USB_EPR_STAT_RX);
324 stm_usb.epr[ep].r = epr_write;
328 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
329 ao_arch_block_interrupts();
330 _ao_usb_set_stat_rx(ep, stat_rx);
331 ao_arch_release_interrupts();
335 * Set just endpoint 0, for use during startup
339 ao_usb_init_ep(uint8_t ep, uint32_t addr, uint32_t type, uint32_t stat_rx, uint32_t stat_tx)
343 ao_arch_block_interrupts();
344 epr = stm_usb.epr[ep].r;
345 epr = ((0 << STM_USB_EPR_CTR_RX) |
346 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
348 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
349 (stat_rx << STM_USB_EPR_STAT_RX)) |
350 (type << STM_USB_EPR_EP_TYPE) |
351 (0 << STM_USB_EPR_EP_KIND) |
352 (0 << STM_USB_EPR_CTR_TX) |
353 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
355 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
356 (stat_tx << STM_USB_EPR_STAT_TX)) |
357 (addr << STM_USB_EPR_EA));
358 stm_usb.epr[ep].r = epr;
359 ao_arch_release_interrupts();
360 debug ("writing epr[%d] 0x%04x wrote 0x%04x\n",
361 ep, epr, stm_usb.epr[ep].r);
365 ao_usb_alloc_buffers(void)
367 uint16_t sram_addr = 0;
369 ao_usb_bdt = (void *) stm_usb_sram;
370 sram_addr += 8 * STM_USB_BDT_SIZE;
372 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(sram_addr);
373 sram_addr += AO_USB_CONTROL_SIZE;
375 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(sram_addr);
376 sram_addr += AO_USB_CONTROL_SIZE;
380 ao_usb_int_tx_offset = sram_addr;
381 sram_addr += AO_USB_INT_SIZE;
385 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(sram_addr);
386 ao_usb_out_rx_offset = sram_addr;
387 sram_addr += AO_USB_OUT_SIZE;
391 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(sram_addr);
392 ao_usb_in_tx_offset = sram_addr;
393 sram_addr += AO_USB_IN_SIZE;
397 ao_usb_in2_tx_buffer = ao_usb_packet_buffer_addr(sram_addr);
398 ao_usb_in2_tx_offset = sram_addr;
399 sram_addr += AO_USB_IN_SIZE;
403 ao_usb_sram_addr = sram_addr;
408 ao_usb_init_btable(void)
410 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
412 ao_usb_bdt[0].single.addr_tx = ao_usb_packet_buffer_offset(ao_usb_ep0_tx_buffer);
413 ao_usb_bdt[0].single.count_tx = 0;
415 ao_usb_bdt[0].single.addr_rx = ao_usb_packet_buffer_offset(ao_usb_ep0_rx_buffer);
416 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
417 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
425 ao_usb_init_btable();
427 /* buffer table is at the start of USB memory */
430 ao_usb_init_ep(AO_USB_CONTROL_EPR, AO_USB_CONTROL_EP,
431 STM_USB_EPR_EP_TYPE_CONTROL,
432 STM_USB_EPR_STAT_RX_VALID,
433 STM_USB_EPR_STAT_TX_NAK);
435 /* Clear all of the other endpoints */
436 for (e = 1; e < 8; e++) {
438 STM_USB_EPR_EP_TYPE_CONTROL,
439 STM_USB_EPR_STAT_RX_DISABLED,
440 STM_USB_EPR_STAT_TX_DISABLED);
443 ao_usb_set_address(0);
447 /* Reset our internal state
450 ao_usb_ep0_state = AO_USB_EP0_IDLE;
452 ao_usb_ep0_in_data = NULL;
453 ao_usb_ep0_in_len = 0;
455 ao_usb_ep0_out_data = 0;
456 ao_usb_ep0_out_len = 0;
460 ao_usb_set_configuration(void)
462 debug ("ao_usb_set_configuration\n");
465 /* Set up the INT end point */
466 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_int_tx_offset;
467 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
469 ao_usb_init_ep(AO_USB_INT_EPR,
471 STM_USB_EPR_EP_TYPE_INTERRUPT,
472 STM_USB_EPR_STAT_RX_DISABLED,
473 STM_USB_EPR_STAT_TX_NAK);
477 /* Set up the OUT end point */
478 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_out_rx_offset;
479 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
480 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
482 ao_usb_init_ep(AO_USB_OUT_EPR,
484 STM_USB_EPR_EP_TYPE_BULK,
485 STM_USB_EPR_STAT_RX_VALID,
486 STM_USB_EPR_STAT_TX_DISABLED);
490 /* Set up the IN end point */
491 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_in_tx_offset;
492 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
494 ao_usb_init_ep(AO_USB_IN_EPR,
496 STM_USB_EPR_EP_TYPE_BULK,
497 STM_USB_EPR_STAT_RX_DISABLED,
498 STM_USB_EPR_STAT_TX_NAK);
502 /* Set up the IN2 end point */
503 ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = ao_usb_in2_tx_offset;
504 ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = 0;
506 ao_usb_init_ep(AO_USB_IN2_EPR,
508 STM_USB_EPR_EP_TYPE_BULK,
509 STM_USB_EPR_STAT_RX_DISABLED,
510 STM_USB_EPR_STAT_TX_NAK);
513 ao_usb_in_flushed = 0;
514 ao_usb_in_pending = 0;
515 ao_wakeup(&ao_usb_in_pending);
517 ao_usb_in2_flushed = 0;
518 ao_usb_in2_pending = 0;
519 ao_wakeup(&ao_usb_in2_pending);
522 ao_usb_out_avail = 0;
523 ao_usb_configuration = 0;
525 ao_wakeup(AO_USB_OUT_SLEEP_ADDR);
529 ao_wakeup(&ao_usb_running);
533 static uint16_t control_count;
534 static uint16_t int_count;
535 static uint16_t in_count;
536 static uint16_t out_count;
537 static uint16_t reset_count;
539 /* The USB memory must be accessed in 16-bit units
543 ao_usb_copy_tx(const uint8_t *src, uint16_t *base, uint16_t bytes)
546 *base++ = src[0] | (src[1] << 8);
555 ao_usb_copy_rx(uint8_t *dst, uint16_t *base, uint16_t bytes)
558 uint16_t s = *base++;
568 /* Send an IN data packet */
570 ao_usb_ep0_flush(void)
574 /* Check to see if the endpoint is still busy */
575 if (ao_usb_epr_stat_tx(stm_usb.epr[0].r) == STM_USB_EPR_STAT_TX_VALID) {
576 debug("EP0 not accepting IN data\n");
580 this_len = ao_usb_ep0_in_len;
581 if (this_len > AO_USB_CONTROL_SIZE)
582 this_len = AO_USB_CONTROL_SIZE;
584 if (this_len < AO_USB_CONTROL_SIZE)
585 ao_usb_ep0_state = AO_USB_EP0_IDLE;
587 ao_usb_ep0_in_len -= this_len;
589 debug_data ("Flush EP0 len %d:", this_len);
590 ao_usb_copy_tx(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, this_len);
592 ao_usb_ep0_in_data += this_len;
594 /* Mark the endpoint as TX valid to send the packet */
595 ao_usb_bdt[AO_USB_CONTROL_EPR].single.count_tx = this_len;
596 ao_usb_set_stat_tx(AO_USB_CONTROL_EPR, STM_USB_EPR_STAT_TX_VALID);
597 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[AO_USB_CONTROL_EPR]);
600 /* Read data from the ep0 OUT fifo */
602 ao_usb_ep0_fill(void)
604 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
606 if (len > ao_usb_ep0_out_len)
607 len = ao_usb_ep0_out_len;
608 ao_usb_ep0_out_len -= len;
610 /* Pull all of the data out of the packet */
611 debug_data ("Fill EP0 len %d:", len);
612 ao_usb_copy_rx(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, len);
614 ao_usb_ep0_out_data += len;
617 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
621 ao_usb_ep0_in_reset(void)
623 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
624 ao_usb_ep0_in_len = 0;
628 ao_usb_ep0_in_queue_byte(uint8_t a)
630 if (ao_usb_ep0_in_len < sizeof (ao_usb_ep0_in_buf))
631 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
635 ao_usb_ep0_in_set(const uint8_t *data, uint8_t len)
637 ao_usb_ep0_in_data = data;
638 ao_usb_ep0_in_len = len;
642 ao_usb_ep0_out_set(uint8_t *data, uint8_t len)
644 ao_usb_ep0_out_data = data;
645 ao_usb_ep0_out_len = len;
649 ao_usb_ep0_in_start(uint16_t max)
651 /* Don't send more than asked for */
652 if (ao_usb_ep0_in_len > max)
653 ao_usb_ep0_in_len = max;
657 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
659 #if AO_USB_DEVICE_ID_SERIAL
660 static uint8_t ao_usb_serial[2 + 48];
662 /* Convert a 32-bit value to 8 hexidecimal UCS2 characters */
664 hex_to_ucs2(uint32_t in, uint8_t *out)
668 for (i = 28; i >= 0; i -= 4) {
669 uint8_t bits = (in >> i) & 0xf;
670 *out++ = ((bits < 10) ? '0' : ('a' - 10)) + bits;
675 /* Encode the device ID (96 bits) in hexidecimal to use as a device
679 ao_usb_serial_init(void)
681 ao_usb_serial[0] = 50; /* length */
682 ao_usb_serial[1] = AO_USB_DESC_STRING;
683 hex_to_ucs2(stm_device_id.u_id0, ao_usb_serial + 2 + 0);
684 hex_to_ucs2(stm_device_id.u_id1, ao_usb_serial + 2 + 16);
685 hex_to_ucs2(stm_device_id.u_id2, ao_usb_serial + 2 + 32);
689 /* Walk through the list of descriptors and find a match
692 ao_usb_get_descriptor(uint16_t value, uint16_t length)
694 const uint8_t *descriptor;
695 uint8_t type = value >> 8;
696 uint8_t index = value;
698 descriptor = ao_usb_descriptors;
699 while (descriptor[0] != 0) {
700 if (descriptor[1] == type && index-- == 0) {
702 if (type == AO_USB_DESC_CONFIGURATION)
706 #if AO_USB_DEVICE_ID_SERIAL
707 /* Slightly hacky - the serial number is string 3 */
708 if (type == AO_USB_DESC_STRING && (value & 0xff) == 3) {
709 descriptor = ao_usb_serial;
710 len = sizeof (ao_usb_serial);
715 ao_usb_ep0_in_set(descriptor, len);
718 descriptor += descriptor[0];
723 ao_usb_ep0_setup(void)
725 /* Pull the setup packet out of the fifo */
726 ao_usb_ep0_out_set((uint8_t *) &ao_usb_setup, 8);
728 if (ao_usb_ep0_out_len != 0) {
729 debug ("invalid setup packet length\n");
733 if ((ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) || ao_usb_setup.length == 0)
734 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
736 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
738 ao_usb_ep0_in_reset();
740 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
741 case AO_USB_TYPE_STANDARD:
742 debug ("Standard setup packet\n");
743 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
744 case AO_USB_RECIP_DEVICE:
745 debug ("Device setup packet\n");
746 switch(ao_usb_setup.request) {
747 case AO_USB_REQ_GET_STATUS:
748 debug ("get status\n");
749 ao_usb_ep0_in_queue_byte(0);
750 ao_usb_ep0_in_queue_byte(0);
752 case AO_USB_REQ_SET_ADDRESS:
753 debug ("set address %d\n", ao_usb_setup.value);
754 ao_usb_address = ao_usb_setup.value;
755 ao_usb_address_pending = 1;
757 case AO_USB_REQ_GET_DESCRIPTOR:
758 debug ("get descriptor %d\n", ao_usb_setup.value);
759 ao_usb_get_descriptor(ao_usb_setup.value, ao_usb_setup.length);
761 case AO_USB_REQ_GET_CONFIGURATION:
762 debug ("get configuration %d\n", ao_usb_configuration);
763 ao_usb_ep0_in_queue_byte(ao_usb_configuration);
765 case AO_USB_REQ_SET_CONFIGURATION:
766 ao_usb_configuration = ao_usb_setup.value;
767 debug ("set configuration %d\n", ao_usb_configuration);
768 ao_usb_set_configuration();
772 case AO_USB_RECIP_INTERFACE:
773 debug ("Interface setup packet\n");
774 switch(ao_usb_setup.request) {
775 case AO_USB_REQ_GET_STATUS:
776 ao_usb_ep0_in_queue_byte(0);
777 ao_usb_ep0_in_queue_byte(0);
779 case AO_USB_REQ_GET_INTERFACE:
780 ao_usb_ep0_in_queue_byte(0);
782 case AO_USB_REQ_SET_INTERFACE:
786 case AO_USB_RECIP_ENDPOINT:
787 debug ("Endpoint setup packet\n");
788 switch(ao_usb_setup.request) {
789 case AO_USB_REQ_GET_STATUS:
790 ao_usb_ep0_in_queue_byte(0);
791 ao_usb_ep0_in_queue_byte(0);
797 case AO_USB_TYPE_CLASS:
798 debug ("Class setup packet\n");
799 switch (ao_usb_setup.request) {
800 case AO_USB_SET_LINE_CODING:
801 debug ("set line coding\n");
802 ao_usb_ep0_out_set((uint8_t *) &ao_usb_line_coding, 7);
804 case AO_USB_GET_LINE_CODING:
805 debug ("get line coding\n");
806 ao_usb_ep0_in_set((const uint8_t *) &ao_usb_line_coding, 7);
808 case AO_USB_SET_CONTROL_LINE_STATE:
814 /* If we're not waiting to receive data from the host,
815 * queue an IN response
817 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
818 ao_usb_ep0_in_start(ao_usb_setup.length);
822 ao_usb_ep0_handle(uint8_t receive)
824 ao_usb_ep0_receive = 0;
825 if (receive & AO_USB_EP0_GOT_SETUP) {
829 if (receive & AO_USB_EP0_GOT_RX_DATA) {
830 debug ("\tgot rx data\n");
831 if (ao_usb_ep0_state == AO_USB_EP0_DATA_OUT) {
833 if (ao_usb_ep0_out_len == 0) {
834 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
835 ao_usb_ep0_in_start(0);
839 if (receive & AO_USB_EP0_GOT_TX_ACK) {
840 debug ("\tgot tx ack\n");
842 #if HAS_FLIGHT && AO_USB_FORCE_IDLE
843 ao_flight_force_idle = 1;
845 /* Wait until the IN packet is received from addr 0
846 * before assigning our local address
848 if (ao_usb_address_pending)
849 ao_usb_set_address(ao_usb_address);
850 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
855 #if AO_POWER_MANAGEMENT
859 stm_usb.cntr |= (1 << STM_USB_CNTR_FSUSP);
861 stm_usb.cntr |= (1 << STM_USB_CNTR_LP_MODE);
869 stm_usb.cntr &= ~(1 << STM_USB_CNTR_FSUSP);
877 uint32_t istr = stm_usb.istr;
879 stm_usb.istr = ~istr;
880 if (istr & (1 << STM_USB_ISTR_CTR)) {
881 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
882 uint16_t epr, epr_write;
884 /* Preserve the SW write bits, don't mess with most HW writable bits,
885 * clear the CTR_RX and CTR_TX bits
887 epr = stm_usb.epr[ep].r;
889 epr_write &= STM_USB_EPR_PRESERVE_MASK;
890 epr_write |= STM_USB_EPR_INVARIANT;
891 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
892 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
893 stm_usb.epr[ep].r = epr_write;
898 if (ao_usb_epr_ctr_rx(epr)) {
899 if (ao_usb_epr_setup(epr))
900 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
902 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
904 if (ao_usb_epr_ctr_tx(epr))
905 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
906 ao_usb_ep0_handle(ao_usb_ep0_receive);
910 if (ao_usb_epr_ctr_rx(epr)) {
911 _rx_dbg1("RX ISR", epr);
912 ao_usb_out_avail = 1;
913 _rx_dbg0("out avail set");
914 ao_wakeup(AO_USB_OUT_SLEEP_ADDR);
915 _rx_dbg0("stdin awoken");
920 _tx_dbg1("TX ISR", epr);
921 if (ao_usb_epr_ctr_tx(epr)) {
922 ao_usb_in_pending = 0;
923 ao_wakeup(&ao_usb_in_pending);
929 _tx_dbg1("TX2 ISR", epr);
930 if (ao_usb_epr_ctr_tx(epr)) {
931 ao_usb_in2_pending = 0;
932 ao_wakeup(&ao_usb_in2_pending);
938 if (ao_usb_epr_ctr_tx(epr))
939 _ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
945 if (istr & (1 << STM_USB_ISTR_RESET)) {
950 #if AO_POWER_MANAGEMENT
951 if (istr & (1 << STM_USB_ISTR_SUSP)) {
952 debug ("\tsuspend\n");
955 if (istr & (1 << STM_USB_ISTR_WKUP)) {
956 debug ("\twakeup\n");
963 /* Queue the current IN buffer for transmission */
965 _ao_usb_in_send(void)
967 _tx_dbg0("in_send start");
968 debug ("send %d\n", ao_usb_tx_count);
969 while (ao_usb_in_pending)
970 ao_sleep(&ao_usb_in_pending);
971 ao_usb_in_pending = 1;
972 if (ao_usb_tx_count != AO_USB_IN_SIZE)
973 ao_usb_in_flushed = 1;
974 ao_usb_copy_tx(ao_usb_tx_buffer, ao_usb_in_tx_buffer, ao_usb_tx_count);
975 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_in_tx_offset;
976 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
978 _ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
979 _tx_dbg0("in_send end");
982 /* Wait for a free IN buffer. Interrupts are blocked */
984 _ao_usb_in_wait(void)
987 /* Check if the current buffer is writable */
988 if (ao_usb_tx_count < AO_USB_IN_SIZE)
991 _tx_dbg0("in_wait top");
992 /* Wait for an IN buffer to be ready */
993 while (ao_usb_in_pending)
994 ao_sleep(&ao_usb_in_pending);
995 _tx_dbg0("in_wait bottom");
1002 if (!ao_usb_running)
1005 /* Anytime we've sent a character since
1006 * the last time we flushed, we'll need
1007 * to send a packet -- the only other time
1008 * we would send a packet is when that
1009 * packet was full, in which case we now
1010 * want to send an empty packet
1012 ao_arch_block_interrupts();
1013 while (!ao_usb_in_flushed) {
1014 _tx_dbg0("flush top");
1016 _tx_dbg0("flush end");
1018 ao_arch_release_interrupts();
1022 ao_usb_putchar(char c)
1024 if (!ao_usb_running)
1027 ao_arch_block_interrupts();
1030 ao_usb_in_flushed = 0;
1031 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
1033 /* Send the packet when full */
1034 if (ao_usb_tx_count == AO_USB_IN_SIZE) {
1035 _tx_dbg0("putchar full");
1037 _tx_dbg0("putchar flushed");
1039 ao_arch_release_interrupts();
1044 /* Queue the current IN buffer for transmission */
1046 _ao_usb_in2_send(void)
1048 _tx_dbg0("in2_send start");
1049 debug ("send2 %d\n", ao_usb_tx_count);
1050 while (ao_usb_in2_pending)
1051 ao_sleep(&ao_usb_in2_pending);
1052 ao_usb_in2_pending = 1;
1053 if (ao_usb_tx2_count != AO_USB_IN_SIZE)
1054 ao_usb_in2_flushed = 1;
1055 ao_usb_copy_tx(ao_usb_tx2_buffer, ao_usb_in2_tx_buffer, ao_usb_tx2_count);
1056 ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = ao_usb_in_tx_offset;
1057 ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = ao_usb_tx_count;
1058 ao_usb_tx2_count = 0;
1059 _ao_usb_set_stat_tx(AO_USB_IN2_EPR, STM_USB_EPR_STAT_TX_VALID);
1060 _tx_dbg0("in2_send end");
1063 /* Wait for a free IN buffer. Interrupts are blocked */
1065 _ao_usb_in2_wait(void)
1068 /* Check if the current buffer is writable */
1069 if (ao_usb_tx2_count < AO_USB_IN_SIZE)
1072 _tx_dbg0("in2_wait top");
1073 /* Wait for an IN buffer to be ready */
1074 while (ao_usb_in2_pending)
1075 ao_sleep(&ao_usb_in2_pending);
1076 _tx_dbg0("in_wait bottom");
1083 if (!ao_usb_running)
1086 /* Anytime we've sent a character since
1087 * the last time we flushed, we'll need
1088 * to send a packet -- the only other time
1089 * we would send a packet is when that
1090 * packet was full, in which case we now
1091 * want to send an empty packet
1093 ao_arch_block_interrupts();
1094 while (!ao_usb_in2_flushed) {
1095 _tx_dbg0("flush2 top");
1097 _tx_dbg0("flush2 end");
1099 ao_arch_release_interrupts();
1103 ao_usb_putchar2(char c)
1105 if (!ao_usb_running)
1108 ao_arch_block_interrupts();
1111 ao_usb_in2_flushed = 0;
1112 ao_usb_tx2_buffer[ao_usb_tx2_count++] = (uint8_t) c;
1114 /* Send the packet when full */
1115 if (ao_usb_tx2_count == AO_USB_IN_SIZE) {
1116 _tx_dbg0("putchar2 full");
1118 _tx_dbg0("putchar2 flushed");
1120 ao_arch_release_interrupts();
1126 _ao_usb_out_recv(void)
1128 _rx_dbg0("out_recv top");
1129 ao_usb_out_avail = 0;
1131 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
1133 _rx_dbg1("out_recv count", ao_usb_rx_count);
1134 debug ("recv %d\n", ao_usb_rx_count);
1135 debug_data("Fill OUT len %d:", ao_usb_rx_count);
1136 ao_usb_copy_rx(ao_usb_rx_buffer, ao_usb_out_rx_buffer, ao_usb_rx_count);
1140 /* ACK the packet */
1141 _ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
1145 _ao_usb_pollchar(void)
1149 if (!ao_usb_running)
1150 return AO_READ_AGAIN;
1153 if (ao_usb_rx_pos != ao_usb_rx_count)
1156 _rx_dbg0("poll check");
1157 /* Check to see if a packet has arrived */
1158 if (!ao_usb_out_avail) {
1159 _rx_dbg0("poll none");
1160 return AO_READ_AGAIN;
1165 /* Pull a character out of the fifo */
1166 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
1171 ao_usb_getchar(void)
1175 ao_arch_block_interrupts();
1176 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
1177 ao_sleep(AO_USB_OUT_SLEEP_ADDR);
1178 ao_arch_release_interrupts();
1189 buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
1190 ao_usb_sram_addr += AO_USB_IN_SIZE;
1195 ao_usb_write(uint16_t *buffer, uint16_t len)
1197 ao_arch_block_interrupts();
1199 /* Wait for everything to be ready at the same time */
1201 /* Make sure USB is connected */
1202 if (!ao_usb_running) {
1203 ao_sleep(&ao_usb_running);
1207 /* Flush any pending regular I/O */
1208 if (ao_usb_tx_count) {
1213 /* Wait for an idle IN buffer */
1214 if (ao_usb_in_pending) {
1215 ao_sleep(&ao_usb_in_pending);
1221 ao_usb_in_pending = 1;
1222 ao_usb_in_flushed = (len != AO_USB_IN_SIZE);
1223 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_packet_buffer_offset(buffer);
1224 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = len;
1225 _ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
1226 ao_arch_release_interrupts();
1231 ao_usb_write2(uint16_t *buffer, uint16_t len)
1233 ao_arch_block_interrupts();
1235 /* Wait for everything to be ready at the same time */
1237 /* Make sure USB is connected */
1238 if (!ao_usb_running) {
1239 ao_sleep(&ao_usb_running);
1243 /* Flush any pending regular I/O */
1244 if (ao_usb_tx2_count) {
1249 /* Wait for an idle IN buffer */
1250 if (ao_usb_in2_pending) {
1251 ao_sleep(&ao_usb_in2_pending);
1257 ao_usb_in2_pending = 1;
1258 ao_usb_in2_flushed = (len != AO_USB_IN_SIZE);
1259 ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = ao_usb_packet_buffer_offset(buffer);
1260 ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = len;
1261 _ao_usb_set_stat_tx(AO_USB_IN2_EPR, STM_USB_EPR_STAT_TX_VALID);
1262 ao_arch_release_interrupts();
1268 ao_usb_disable(void)
1270 ao_arch_block_interrupts();
1271 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
1274 /* Disable USB pull-up */
1275 stm_usb.bcdr &= ~(1 << STM_USB_BCDR_DPPU);
1277 /* Switch off the device */
1278 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
1280 /* Disable the interface */
1281 stm_rcc.apb1enr &= ~(1 << STM_RCC_APB1ENR_USBEN);
1282 ao_arch_release_interrupts();
1290 /* Select HSI48 as USB clock source */
1291 stm_rcc.cfgr3 &= ~(1 << STM_RCC_CFGR3_USBSW);
1293 /* Enable USB device */
1294 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
1296 /* Clear reset condition */
1297 stm_rcc.apb1rstr &= ~(1 << STM_RCC_APB1RSTR_USBRST);
1299 /* Disable USB pull-up */
1300 stm_usb.bcdr &= ~(1 << STM_USB_BCDR_DPPU);
1302 /* Do not touch the GPIOA configuration; USB takes priority
1303 * over GPIO on pins A11 and A12, but if you select alternate
1304 * input 10 (the documented correct selection), then USB is
1305 * pulled low and doesn't work at all
1308 ao_arch_block_interrupts();
1310 /* Route interrupts */
1311 stm_nvic_set_enable(STM_ISR_USB_POS);
1312 stm_nvic_set_priority(STM_ISR_USB_POS, 3);
1314 ao_usb_configuration = 0;
1316 /* Set up buffer descriptors */
1317 ao_usb_init_btable();
1319 /* Reset the USB controller */
1320 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
1322 /* Clear the reset bit */
1325 /* Clear any spurious interrupts */
1330 debug ("ao_usb_enable\n");
1332 /* Enable interrupts */
1333 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
1334 (0 << STM_USB_CNTR_PMAOVRM) |
1335 (0 << STM_USB_CNTR_ERRM) |
1336 (AO_POWER_MANAGEMENT << STM_USB_CNTR_WKUPM) |
1337 (AO_POWER_MANAGEMENT << STM_USB_CNTR_SUSPM) |
1338 (1 << STM_USB_CNTR_RESETM) |
1339 (0 << STM_USB_CNTR_SOFM) |
1340 (0 << STM_USB_CNTR_ESOFM) |
1341 (0 << STM_USB_CNTR_RESUME) |
1342 (0 << STM_USB_CNTR_FSUSP) |
1343 (0 << STM_USB_CNTR_LP_MODE) |
1344 (0 << STM_USB_CNTR_PDWN) |
1345 (0 << STM_USB_CNTR_FRES));
1347 ao_arch_release_interrupts();
1349 for (t = 0; t < 1000; t++)
1352 /* Enable USB pull-up */
1353 stm_usb.bcdr |= (1 << STM_USB_BCDR_DPPU);
1357 struct ao_task ao_usb_echo_task;
1365 c = ao_usb_getchar();
1376 printf ("control: %d out: %d in: %d int: %d reset: %d\n",
1377 control_count, out_count, in_count, int_count, reset_count);
1380 __code struct ao_cmds ao_usb_cmds[] = {
1381 { ao_usb_irq, "I\0Show USB interrupt counts" },
1389 /* Turn on syscfg */
1390 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGCOMPEN);
1392 /* Set PA11/PA12 remapping bit */
1393 stm_syscfg.cfgr1 |= (AO_PA11_PA12_RMP << STM_SYSCFG_CFGR1_PA11_PA12_RMP);
1395 #ifndef AO_USB_START_DISABLED
1399 #if AO_USB_DEVICE_ID_SERIAL
1400 ao_usb_serial_init();
1403 debug ("ao_usb_init\n");
1404 ao_usb_ep0_state = AO_USB_EP0_IDLE;
1406 ao_usb_alloc_buffers();
1409 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1412 ao_cmd_register(&ao_usb_cmds[0]);
1416 ao_add_stdio(_ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);
1421 #if TX_DBG || RX_DBG
1431 uint32_t in_pending;
1433 uint32_t in_flushed;
1443 #define NUM_USB_DBG 128
1445 static struct ao_usb_dbg dbg[128];
1448 static void _dbg(int line, char *msg, uint32_t value)
1451 dbg[dbg_i].line = line;
1452 dbg[dbg_i].msg = msg;
1453 dbg[dbg_i].value = value;
1454 asm("mrs %0,primask" : "=&r" (primask));
1455 dbg[dbg_i].primask = primask;
1457 dbg[dbg_i].in_count = in_count;
1458 dbg[dbg_i].in_epr = stm_usb.epr[AO_USB_IN_EPR];
1459 dbg[dbg_i].in_pending = ao_usb_in_pending;
1460 dbg[dbg_i].tx_count = ao_usb_tx_count;
1461 dbg[dbg_i].in_flushed = ao_usb_in_flushed;
1464 dbg[dbg_i].rx_count = ao_usb_rx_count;
1465 dbg[dbg_i].rx_pos = ao_usb_rx_pos;
1466 dbg[dbg_i].out_avail = ao_usb_out_avail;
1467 dbg[dbg_i].out_epr = stm_usb.epr[AO_USB_OUT_EPR];
1469 if (++dbg_i == NUM_USB_DBG)