2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 struct ao_dma_config {
22 void (*isr)(int index);
25 uint8_t ao_dma_done[STM_NUM_DMA];
27 static struct ao_dma_config ao_dma_config[STM_NUM_DMA];
28 static uint8_t ao_dma_allocated[STM_NUM_DMA];
29 static uint8_t ao_dma_mutex[STM_NUM_DMA];
30 static uint8_t ao_dma_active;
32 #define ch_mask(id) (STM_DMA_ISR_MASK << STM_DMA_ISR(id))
35 ao_dma_isr(uint8_t low_index, uint8_t high_index, uint32_t mask) {
36 /* Get channel interrupt bits */
37 uint32_t isr = stm_dma.isr & mask;
42 for (index = low_index; index <= high_index; index++) {
43 if (isr & ch_mask(index)) {
44 if (ao_dma_config[index].isr)
45 (*ao_dma_config[index].isr)(index);
47 ao_dma_done[index] = 1;
48 ao_wakeup(&ao_dma_done[index]);
54 void stm_dma_ch1_isr(void) {
55 ao_dma_isr(STM_DMA_INDEX(1),
57 ch_mask(STM_DMA_INDEX(1)));
60 void stm_dma_ch2_3_isr(void) {
61 ao_dma_isr(STM_DMA_INDEX(2),
63 ch_mask(STM_DMA_INDEX(2)) |
64 ch_mask(STM_DMA_INDEX(3)));
67 void stm_dma_ch4_5_6_isr(void) {
68 ao_dma_isr(STM_DMA_INDEX(4), STM_DMA_INDEX(6),
69 ch_mask(STM_DMA_INDEX(4)) |
70 ch_mask(STM_DMA_INDEX(5)) |
71 ch_mask(STM_DMA_INDEX(6)));
75 ao_dma_set_transfer(uint8_t index,
76 volatile void *peripheral,
81 if (ao_dma_allocated[index]) {
82 if (ao_dma_mutex[index])
83 ao_panic(AO_PANIC_DMA);
84 ao_dma_mutex[index] = 1;
86 ao_mutex_get(&ao_dma_mutex[index]);
88 if (ao_dma_active++ == 0)
89 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMAEN);
91 ao_dma_config[index].isr = NULL;
92 ao_dma_done[index] = 0;
93 stm_dma.channel[index].cndtr = count;
94 stm_dma.channel[index].cpar = peripheral;
95 stm_dma.channel[index].cmar = memory;
96 stm_dma.channel[index].ccr = ccr;
100 ao_dma_set_isr(uint8_t index, void (*isr)(int))
102 ao_dma_config[index].isr = isr;
106 ao_dma_start(uint8_t index)
108 stm_dma.channel[index].ccr |= (1 << STM_DMA_CCR_EN);
112 ao_dma_done_transfer(uint8_t index)
114 stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
116 if (--ao_dma_active == 0)
117 stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMAEN);
119 if (ao_dma_allocated[index])
120 ao_dma_mutex[index] = 0;
122 ao_mutex_put(&ao_dma_mutex[index]);
126 ao_dma_abort(uint8_t index)
128 stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
129 ao_wakeup(&ao_dma_done[index]);
133 ao_dma_alloc(uint8_t index)
135 if (ao_dma_allocated[index])
136 ao_panic(AO_PANIC_DMA);
137 ao_dma_allocated[index] = 1;
140 #define STM_NUM_DMA_ISR 3
148 for (isr_id = 0; isr_id < STM_NUM_DMA_ISR; isr_id++) {
149 stm_nvic_set_enable(STM_ISR_DMA_CH1_POS + isr_id);
150 stm_nvic_set_priority(STM_ISR_DMA_CH1_POS + isr_id, 4);
152 for (index = 0; index < STM_NUM_DMA; index++) {
153 ao_dma_allocated[index] = 0;
154 ao_dma_mutex[index] = 0;