2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 /* Bridge SB17 on the board and use the MCO from the other chip */
23 #define AO_HSE 8000000
24 #define AO_HSE_BYPASS 1
26 /* PLLVCO = 96MHz (so that USB will work) */
28 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12)
32 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
34 /* HCLK = 32MHZ (CPU clock) */
35 #define AO_AHB_PRESCALER 1
36 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
38 /* Run APB1 at HCLK/1 */
39 #define AO_APB1_PRESCALER 1
40 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_1
42 /* Run APB2 at HCLK/1 */
43 #define AO_APB2_PRESCALER 1
44 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_1
46 #define HAS_SERIAL_1 0
47 #define USE_SERIAL_1_STDIN 0
48 #define SERIAL_1_PB6_PB7 1
49 #define SERIAL_1_PA9_PA10 0
51 #define HAS_SERIAL_2 0
52 #define USE_SERIAL_2_STDIN 0
53 #define SERIAL_2_PA2_PA3 0
54 #define SERIAL_2_PD5_PD6 1
56 #define HAS_SERIAL_3 0
57 #define USE_SERIAL_3_STDIN 1
58 #define SERIAL_3_PB10_PB11 0
59 #define SERIAL_3_PC10_PC11 0
60 #define SERIAL_3_PD8_PD9 1
63 #define SPI_1_PB3_PB4_PB5 1
64 #define SPI_1_OSPEEDR STM_OSPEEDR_10MHz
67 #define SPI_2_PB13_PB14_PB15 1 /* Flash, Companion, Radio */
68 #define SPI_2_PD1_PD3_PD4 0
69 #define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
73 #define PACKET_HAS_SLAVE 0
75 #define AO_BOOT_CHAIN 1
77 #define LOW_LEVEL_DEBUG 0
79 #define LED_PORT_ENABLE STM_RCC_AHBENR_GPIOBEN
80 #define LED_PORT (&stm_gpiob)
81 #define LED_PIN_GREEN 7
82 #define LED_PIN_BLUE 6
83 #define AO_LED_GREEN (1 << LED_PIN_GREEN)
84 #define AO_LED_BLUE (1 << LED_PIN_BLUE)
85 #define AO_LED_PANIC AO_LED_BLUE
87 #define LEDS_AVAILABLE (AO_LED_BLUE | AO_LED_GREEN)
89 #define AO_LCD_STM_SEG_ENABLED_0 ( \
90 (1 << 0) | /* PA1 */ \
91 (1 << 1) | /* PA2 */ \
92 (1 << 2) | /* PA3 */ \
93 (0 << 3) | /* PA6 */ \
94 (0 << 4) | /* PA7 */ \
95 (0 << 5) | /* PB0 */ \
96 (0 << 6) | /* PB1 */ \
97 (1 << 7) | /* PB3 */ \
98 (1 << 8) | /* PB4 */ \
99 (1 << 9) | /* PB5 */ \
100 (1 << 10) | /* PB10 */ \
101 (1 << 11) | /* PB11 */ \
102 (1 << 12) | /* PB12 */ \
103 (1 << 13) | /* PB13 */ \
104 (1 << 14) | /* PB14 */ \
105 (1 << 15) | /* PB15 */ \
106 (1 << 16) | /* PB8 */ \
107 (1 << 17) | /* PA15 */ \
108 (1 << 18) | /* PC0 */ \
109 (1 << 19) | /* PC1 */ \
110 (1 << 20) | /* PC2 */ \
111 (1 << 21) | /* PC3 */ \
112 (0 << 22) | /* PC4 */ \
113 (0 << 23) | /* PC5 */ \
114 (1 << 24) | /* PC6 */ \
115 (1 << 25) | /* PC7 */ \
116 (1 << 26) | /* PC8 */ \
117 (1 << 27) | /* PC9 */ \
118 (1 << 28) | /* PC10 or PD8 */ \
119 (1 << 29) | /* PC11 or PD9 */ \
120 (0 << 30) | /* PC12 or PD10 */ \
121 (0 << 31)) /* PD2 or PD11 */
123 #define AO_LCD_STM_SEG_ENABLED_1 ( \
124 (0 << 0) | /* PD12 */ \
125 (0 << 1) | /* PD13 */ \
126 (0 << 2) | /* PD14 */ \
127 (0 << 3) | /* PD15 */ \
128 (0 << 4) | /* PE0 */ \
129 (0 << 5) | /* PE1 */ \
130 (0 << 6) | /* PE2 */ \
133 #define AO_LCD_STM_COM_ENABLED ( \
134 (1 << 0) | /* PA8 */ \
135 (1 << 1) | /* PA9 */ \
136 (1 << 2) | /* PA10 */ \
137 (1 << 3) | /* PB9 */ \
138 (0 << 4) | /* PC10 */ \
139 (0 << 5) | /* PC11 */ \
142 #define AO_LCD_28_ON_C 1
144 #define AO_LCD_DUTY STM_LCD_CR_DUTY_STATIC
148 #define AO_ADC_RING 32
158 #define AO_ADC_PIN0_PORT (&stm_gpioa)
159 #define AO_ADC_PIN0_PIN 4
161 #define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN))
162 #define AO_ADC_TEMP 16
163 #define AO_ADC_VREF 17
165 #define HAS_ADC_TEMP 1
167 #define AO_DATA_RING 32
170 #define AO_ADC_SQ1 AO_ADC_IDD
171 #define AO_ADC_SQ2 AO_ADC_TEMP
172 #define AO_ADC_SQ3 AO_ADC_VREF
175 #define I2C_1_PB6_PB7 0
176 #define I2C_1_PB8_PB9 1
179 #define I2C_2_PB10_PB11 0
183 #define AO_QUADRATURE_COUNT 2
184 #define AO_QUADRATURE_MODE AO_EXTI_MODE_PULL_UP
186 #define AO_QUADRATURE_0_PORT &stm_gpioc
187 #define AO_QUADRATURE_0_A 1
188 #define AO_QUADRATURE_0_B 0
190 #define AO_QUADRATURE_1_PORT &stm_gpioc
191 #define AO_QUADRATURE_1_A 3
192 #define AO_QUADRATURE_1_B 2
194 #define AO_BUTTON_COUNT 2
195 #define AO_BUTTON_MODE AO_EXTI_MODE_PULL_UP
197 #define AO_BUTTON_0_PORT &stm_gpioc
198 #define AO_BUTTON_0 6
200 #define AO_BUTTON_1_PORT &stm_gpioc
201 #define AO_BUTTON_1 7
203 #define AO_TICK_TYPE uint32_t
204 #define AO_TICK_SIGNED int32_t
206 #define M25_MAX_CHIPS 1
207 #define AO_M25_SPI_CS_PORT (&stm_gpiob)
208 #define AO_M25_SPI_CS_MASK (1 << 12)
209 #define AO_M25_SPI_BUS AO_SPI_2_PB13_PB14_PB15
211 #define AO_LOG_FORMAT AO_LOG_FORMAT_TELEMEGA
213 #endif /* _AO_PINS_H_ */