2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
23 #define USB_DEBUG_DATA 0
27 #define debug(format, args...) printf(format, ## args);
29 #define debug(format, args...)
33 #define debug_data(format, args...) printf(format, ## args);
35 #define debug_data(format, args...)
39 uint8_t dir_type_recip;
46 static uint8_t ao_usb_ep0_state;
48 /* Pending EP0 IN data */
49 static const uint8_t *ao_usb_ep0_in_data; /* Remaining data */
50 static uint8_t ao_usb_ep0_in_len; /* Remaining amount */
52 /* Temp buffer for smaller EP0 in data */
53 static uint8_t ao_usb_ep0_in_buf[2];
55 /* Pending EP0 OUT data */
56 static uint8_t *ao_usb_ep0_out_data;
57 static uint8_t ao_usb_ep0_out_len;
60 * Objects allocated in special USB memory
63 /* Buffer description tables */
64 static union stm_usb_bdt *ao_usb_bdt;
65 /* USB address of end of allocated storage */
66 static uint16_t ao_usb_sram_addr;
68 /* Pointer to ep0 tx/rx buffers in USB memory */
69 static uint32_t *ao_usb_ep0_tx_buffer;
70 static uint32_t *ao_usb_ep0_rx_buffer;
72 /* Pointer to bulk data tx/rx buffers in USB memory */
73 static uint32_t *ao_usb_in_tx_buffer;
74 static uint32_t *ao_usb_out_rx_buffer;
76 /* System ram shadow of USB buffer; writing individual bytes is
77 * too much of a pain (sigh) */
78 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
79 static uint8_t ao_usb_tx_count;
81 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
82 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
85 * End point register indices
88 #define AO_USB_CONTROL_EPR 0
89 #define AO_USB_INT_EPR 1
90 #define AO_USB_OUT_EPR 2
91 #define AO_USB_IN_EPR 3
93 /* Marks when we don't need to send an IN packet.
94 * This happens only when the last IN packet is not full,
95 * otherwise the host will expect to keep seeing packets.
96 * Send a zero-length packet as required
98 static uint8_t ao_usb_in_flushed;
100 /* Marks when we have delivered an IN packet to the hardware
101 * and it has not been received yet. ao_sleep on this address
102 * to wait for it to be delivered.
104 static uint8_t ao_usb_in_pending;
106 /* Marks when an OUT packet has been received by the hardware
107 * but not pulled to the shadow buffer.
109 static uint8_t ao_usb_out_avail;
110 static uint8_t ao_usb_running;
111 static uint8_t ao_usb_configuration;
112 static uint8_t ueienx_0;
114 #define AO_USB_EP0_GOT_RESET 1
115 #define AO_USB_EP0_GOT_SETUP 2
116 #define AO_USB_EP0_GOT_RX_DATA 4
117 #define AO_USB_EP0_GOT_TX_ACK 8
119 static uint8_t ao_usb_ep0_receive;
120 static uint8_t ao_usb_address;
121 static uint8_t ao_usb_address_pending;
123 static inline uint32_t set_toggle(uint32_t current_value,
125 uint32_t desired_value)
127 return (current_value ^ desired_value) & mask;
130 static inline uint32_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
132 return (uint32_t *) (stm_usb_sram + 2 * sram_addr);
135 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
136 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
139 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
140 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
143 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
144 return (epr >> STM_USB_EPR_CTR_RX) & 1;
147 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
148 return (epr >> STM_USB_EPR_CTR_TX) & 1;
151 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
152 return (epr >> STM_USB_EPR_SETUP) & 1;
155 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
156 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
159 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
160 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
164 * Set current device address and mark the
165 * interface as active
168 ao_usb_set_address(uint8_t address)
170 debug("ao_usb_set_address %02x\n", address);
171 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
172 ao_usb_address_pending = 0;
176 * Write these values to preserve register contents under HW changes
179 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
180 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
181 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
182 (1 << STM_USB_EPR_CTR_TX) | \
183 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
184 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
186 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
187 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
188 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
189 (1 << STM_USB_EPR_CTR_TX) | \
190 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
191 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
194 * These bits are purely under sw control, so preserve them in the
195 * register by re-writing what was read
197 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
198 (1 << STM_USB_EPR_EP_KIND) | \
199 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
205 #define _tx_dbg0(msg) _dbg(__LINE__,msg,0)
206 #define _tx_dbg1(msg,value) _dbg(__LINE__,msg,value)
208 #define _tx_dbg0(msg)
209 #define _tx_dbg1(msg,value)
213 #define _rx_dbg0(msg) _dbg(__LINE__,msg,0)
214 #define _rx_dbg1(msg,value) _dbg(__LINE__,msg,value)
216 #define _rx_dbg0(msg)
217 #define _rx_dbg1(msg,value)
221 static void _dbg(int line, char *msg, uint32_t value);
225 * Set the state of the specified endpoint register to a new
226 * value. This is tricky because the bits toggle where the new
227 * value is one, and we need to write invariant values in other
228 * spots of the register. This hardware is strange...
231 _ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
233 uint32_t epr_write, epr_old;
235 _tx_dbg1("set_stat_tx top", stat_tx);
236 epr_old = epr_write = stm_usb.epr[ep];
237 epr_write &= STM_USB_EPR_PRESERVE_MASK;
238 epr_write |= STM_USB_EPR_INVARIANT;
239 epr_write |= set_toggle(epr_old,
240 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
241 stat_tx << STM_USB_EPR_STAT_TX);
242 stm_usb.epr[ep] = epr_write;
243 _tx_dbg1("set_stat_tx bottom", epr_write);
247 ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
249 ao_arch_block_interrupts();
250 _ao_usb_set_stat_tx(ep, stat_tx);
251 ao_arch_release_interrupts();
255 _ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
256 uint32_t epr_write, epr_old;
258 epr_write = epr_old = stm_usb.epr[ep];
259 epr_write &= STM_USB_EPR_PRESERVE_MASK;
260 epr_write |= STM_USB_EPR_INVARIANT;
261 epr_write |= set_toggle(epr_old,
262 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
263 stat_rx << STM_USB_EPR_STAT_RX);
264 stm_usb.epr[ep] = epr_write;
268 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
269 ao_arch_block_interrupts();
270 _ao_usb_set_stat_rx(ep, stat_rx);
271 ao_arch_release_interrupts();
275 * Set just endpoint 0, for use during startup
279 ao_usb_init_ep(uint8_t ep, uint32_t addr, uint32_t type, uint32_t stat_rx, uint32_t stat_tx)
282 ao_arch_block_interrupts();
283 epr = stm_usb.epr[ep];
284 epr = ((0 << STM_USB_EPR_CTR_RX) |
285 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
287 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
288 (stat_rx << STM_USB_EPR_STAT_RX)) |
289 (type << STM_USB_EPR_EP_TYPE) |
290 (0 << STM_USB_EPR_EP_KIND) |
291 (0 << STM_USB_EPR_CTR_TX) |
292 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
294 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
295 (stat_tx << STM_USB_EPR_STAT_TX)) |
296 (addr << STM_USB_EPR_EA));
297 stm_usb.epr[ep] = epr;
298 ao_arch_release_interrupts();
299 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
300 ep, epr, stm_usb.epr[ep]);
309 ao_usb_sram_addr = 0;
311 /* buffer table is at the start of USB memory */
313 ao_usb_bdt = (void *) stm_usb_sram;
315 ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
317 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
319 ao_usb_bdt[0].single.addr_tx = ao_usb_sram_addr;
320 ao_usb_bdt[0].single.count_tx = 0;
321 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
322 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
324 ao_usb_bdt[0].single.addr_rx = ao_usb_sram_addr;
325 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
326 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
327 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
328 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
330 ao_usb_init_ep(AO_USB_CONTROL_EPR, AO_USB_CONTROL_EP,
331 STM_USB_EPR_EP_TYPE_CONTROL,
332 STM_USB_EPR_STAT_RX_VALID,
333 STM_USB_EPR_STAT_TX_NAK);
335 /* Clear all of the other endpoints */
336 for (e = 1; e < 8; e++) {
338 STM_USB_EPR_EP_TYPE_CONTROL,
339 STM_USB_EPR_STAT_RX_DISABLED,
340 STM_USB_EPR_STAT_TX_DISABLED);
343 ao_usb_set_address(0);
347 ao_usb_set_configuration(void)
351 debug ("ao_usb_set_configuration\n");
353 /* Set up the INT end point */
354 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_sram_addr;
355 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
356 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
357 ao_usb_sram_addr += AO_USB_INT_SIZE;
359 ao_usb_init_ep(AO_USB_INT_EPR,
361 STM_USB_EPR_EP_TYPE_INTERRUPT,
362 STM_USB_EPR_STAT_RX_DISABLED,
363 STM_USB_EPR_STAT_TX_NAK);
365 /* Set up the OUT end point */
366 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_sram_addr;
367 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
368 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
369 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
370 ao_usb_sram_addr += AO_USB_OUT_SIZE;
372 ao_usb_init_ep(AO_USB_OUT_EPR,
374 STM_USB_EPR_EP_TYPE_BULK,
375 STM_USB_EPR_STAT_RX_VALID,
376 STM_USB_EPR_STAT_TX_DISABLED);
378 /* Set up the IN end point */
379 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_sram_addr;
380 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
381 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
382 ao_usb_sram_addr += AO_USB_IN_SIZE;
384 ao_usb_init_ep(AO_USB_IN_EPR,
386 STM_USB_EPR_EP_TYPE_BULK,
387 STM_USB_EPR_STAT_RX_DISABLED,
388 STM_USB_EPR_STAT_TX_NAK);
393 static uint16_t control_count;
394 static uint16_t int_count;
395 static uint16_t in_count;
396 static uint16_t out_count;
397 static uint16_t reset_count;
399 /* The USB memory holds 16 bit values on 32 bit boundaries
400 * and must be accessed only in 32 bit units. Sigh.
404 ao_usb_write_byte(uint8_t byte, uint32_t *base, uint16_t offset)
408 *base = (*base & 0xff) | ((uint32_t) byte << 8);
410 *base = (*base & 0xff00) | byte;
415 ao_usb_write_short(uint16_t data, uint32_t *base, uint16_t offset)
417 base[offset>>1] = data;
421 ao_usb_write(const uint8_t *src, uint32_t *base, uint16_t offset, uint16_t bytes)
426 debug_data (" %02x", src[0]);
427 ao_usb_write_byte(*src++, base, offset++);
431 debug_data (" %02x %02x", src[0], src[1]);
432 ao_usb_write_short((src[1] << 8) | src[0], base, offset);
438 debug_data (" %02x", src[0]);
439 ao_usb_write_byte(*src, base, offset);
443 static inline uint8_t
444 ao_usb_read_byte(uint32_t *base, uint16_t offset)
448 return (*base >> 8) & 0xff;
453 static inline uint16_t
454 ao_usb_read_short(uint32_t *base, uint16_t offset)
456 return base[offset>>1];
460 ao_usb_read(uint8_t *dst, uint32_t *base, uint16_t offset, uint16_t bytes)
465 *dst++ = ao_usb_read_byte(base, offset++);
466 debug_data (" %02x", dst[-1]);
470 uint16_t s = ao_usb_read_short(base, offset);
473 debug_data (" %02x %02x", dst[0], dst[1]);
479 *dst = ao_usb_read_byte(base, offset);
480 debug_data (" %02x", dst[0]);
484 /* Send an IN data packet */
486 ao_usb_ep0_flush(void)
490 /* Check to see if the endpoint is still busy */
491 if (ao_usb_epr_stat_tx(stm_usb.epr[0]) == STM_USB_EPR_STAT_TX_VALID) {
492 debug("EP0 not accepting IN data\n");
496 this_len = ao_usb_ep0_in_len;
497 if (this_len > AO_USB_CONTROL_SIZE)
498 this_len = AO_USB_CONTROL_SIZE;
500 if (this_len < AO_USB_CONTROL_SIZE)
501 ao_usb_ep0_state = AO_USB_EP0_IDLE;
503 ao_usb_ep0_in_len -= this_len;
505 debug_data ("Flush EP0 len %d:", this_len);
506 ao_usb_write(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, 0, this_len);
508 ao_usb_ep0_in_data += this_len;
510 /* Mark the endpoint as TX valid to send the packet */
511 ao_usb_bdt[AO_USB_CONTROL_EPR].single.count_tx = this_len;
512 ao_usb_set_stat_tx(AO_USB_CONTROL_EPR, STM_USB_EPR_STAT_TX_VALID);
513 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[AO_USB_CONTROL_EPR]);
516 /* Read data from the ep0 OUT fifo */
518 ao_usb_ep0_fill(void)
520 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
522 if (len > ao_usb_ep0_out_len)
523 len = ao_usb_ep0_out_len;
524 ao_usb_ep0_out_len -= len;
526 /* Pull all of the data out of the packet */
527 debug_data ("Fill EP0 len %d:", len);
528 ao_usb_read(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, 0, len);
530 ao_usb_ep0_out_data += len;
533 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
537 ao_usb_ep0_in_reset(void)
539 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
540 ao_usb_ep0_in_len = 0;
544 ao_usb_ep0_in_queue_byte(uint8_t a)
546 if (ao_usb_ep0_in_len < sizeof (ao_usb_ep0_in_buf))
547 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
551 ao_usb_ep0_in_set(const uint8_t *data, uint8_t len)
553 ao_usb_ep0_in_data = data;
554 ao_usb_ep0_in_len = len;
558 ao_usb_ep0_out_set(uint8_t *data, uint8_t len)
560 ao_usb_ep0_out_data = data;
561 ao_usb_ep0_out_len = len;
565 ao_usb_ep0_in_start(uint8_t max)
567 /* Don't send more than asked for */
568 if (ao_usb_ep0_in_len > max)
569 ao_usb_ep0_in_len = max;
573 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
575 /* Walk through the list of descriptors and find a match
578 ao_usb_get_descriptor(uint16_t value)
580 const uint8_t *descriptor;
581 uint8_t type = value >> 8;
582 uint8_t index = value;
584 descriptor = ao_usb_descriptors;
585 while (descriptor[0] != 0) {
586 if (descriptor[1] == type && index-- == 0) {
588 if (type == AO_USB_DESC_CONFIGURATION)
592 ao_usb_ep0_in_set(descriptor, len);
595 descriptor += descriptor[0];
600 ao_usb_ep0_setup(void)
602 /* Pull the setup packet out of the fifo */
603 ao_usb_ep0_out_set((uint8_t *) &ao_usb_setup, 8);
605 if (ao_usb_ep0_out_len != 0) {
606 debug ("invalid setup packet length\n");
610 if ((ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) || ao_usb_setup.length == 0)
611 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
613 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
615 ao_usb_ep0_in_reset();
617 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
618 case AO_USB_TYPE_STANDARD:
619 debug ("Standard setup packet\n");
620 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
621 case AO_USB_RECIP_DEVICE:
622 debug ("Device setup packet\n");
623 switch(ao_usb_setup.request) {
624 case AO_USB_REQ_GET_STATUS:
625 debug ("get status\n");
626 ao_usb_ep0_in_queue_byte(0);
627 ao_usb_ep0_in_queue_byte(0);
629 case AO_USB_REQ_SET_ADDRESS:
630 debug ("set address %d\n", ao_usb_setup.value);
631 ao_usb_address = ao_usb_setup.value;
632 ao_usb_address_pending = 1;
634 case AO_USB_REQ_GET_DESCRIPTOR:
635 debug ("get descriptor %d\n", ao_usb_setup.value);
636 ao_usb_get_descriptor(ao_usb_setup.value);
638 case AO_USB_REQ_GET_CONFIGURATION:
639 debug ("get configuration %d\n", ao_usb_configuration);
640 ao_usb_ep0_in_queue_byte(ao_usb_configuration);
642 case AO_USB_REQ_SET_CONFIGURATION:
643 ao_usb_configuration = ao_usb_setup.value;
644 debug ("set configuration %d\n", ao_usb_configuration);
645 ao_usb_set_configuration();
649 case AO_USB_RECIP_INTERFACE:
650 debug ("Interface setup packet\n");
651 switch(ao_usb_setup.request) {
652 case AO_USB_REQ_GET_STATUS:
653 ao_usb_ep0_in_queue_byte(0);
654 ao_usb_ep0_in_queue_byte(0);
656 case AO_USB_REQ_GET_INTERFACE:
657 ao_usb_ep0_in_queue_byte(0);
659 case AO_USB_REQ_SET_INTERFACE:
663 case AO_USB_RECIP_ENDPOINT:
664 debug ("Endpoint setup packet\n");
665 switch(ao_usb_setup.request) {
666 case AO_USB_REQ_GET_STATUS:
667 ao_usb_ep0_in_queue_byte(0);
668 ao_usb_ep0_in_queue_byte(0);
674 case AO_USB_TYPE_CLASS:
675 debug ("Class setup packet\n");
676 switch (ao_usb_setup.request) {
677 case AO_USB_SET_LINE_CODING:
678 debug ("set line coding\n");
679 ao_usb_ep0_out_set((uint8_t *) &ao_usb_line_coding, 7);
681 case AO_USB_GET_LINE_CODING:
682 debug ("get line coding\n");
683 ao_usb_ep0_in_set((const uint8_t *) &ao_usb_line_coding, 7);
685 case AO_USB_SET_CONTROL_LINE_STATE:
691 /* If we're not waiting to receive data from the host,
692 * queue an IN response
694 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
695 ao_usb_ep0_in_start(ao_usb_setup.length);
699 ao_usb_ep0_handle(uint8_t receive)
701 ao_usb_ep0_receive = 0;
702 if (receive & AO_USB_EP0_GOT_RESET) {
707 if (receive & AO_USB_EP0_GOT_SETUP) {
711 if (receive & AO_USB_EP0_GOT_RX_DATA) {
712 debug ("\tgot rx data\n");
713 if (ao_usb_ep0_state == AO_USB_EP0_DATA_OUT) {
715 if (ao_usb_ep0_out_len == 0) {
716 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
717 ao_usb_ep0_in_start(0);
721 if (receive & AO_USB_EP0_GOT_TX_ACK) {
722 debug ("\tgot tx ack\n");
724 /* Wait until the IN packet is received from addr 0
725 * before assigning our local address
727 if (ao_usb_address_pending)
728 ao_usb_set_address(ao_usb_address);
729 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
737 uint32_t istr = stm_usb.istr;
739 if (istr & (1 << STM_USB_ISTR_CTR)) {
740 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
741 uint32_t epr, epr_write;
743 /* Preserve the SW write bits, don't mess with most HW writable bits,
744 * clear the CTR_RX and CTR_TX bits
746 epr = stm_usb.epr[ep];
748 epr_write &= STM_USB_EPR_PRESERVE_MASK;
749 epr_write |= STM_USB_EPR_INVARIANT;
750 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
751 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
752 stm_usb.epr[ep] = epr_write;
757 if (ao_usb_epr_ctr_rx(epr)) {
758 if (ao_usb_epr_setup(epr))
759 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
761 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
763 if (ao_usb_epr_ctr_tx(epr))
764 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
765 ao_usb_ep0_handle(ao_usb_ep0_receive);
769 if (ao_usb_epr_ctr_rx(epr)) {
770 _rx_dbg1("RX ISR", epr);
771 ao_usb_out_avail = 1;
772 _rx_dbg0("out avail set");
773 ao_wakeup(&ao_stdin_ready);
774 _rx_dbg0("stdin awoken");
779 _tx_dbg1("TX ISR", epr);
780 if (ao_usb_epr_ctr_tx(epr)) {
781 ao_usb_in_pending = 0;
782 ao_wakeup(&ao_usb_in_pending);
787 if (ao_usb_epr_ctr_tx(epr))
788 _ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
794 if (istr & (1 << STM_USB_ISTR_RESET)) {
796 stm_usb.istr &= ~(1 << STM_USB_ISTR_RESET);
797 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
798 ao_usb_ep0_handle(ao_usb_ep0_receive);
803 stm_usb_fs_wkup(void)
805 /* USB wakeup, just clear the bit for now */
806 stm_usb.istr &= ~(1 << STM_USB_ISTR_WKUP);
809 /* Queue the current IN buffer for transmission */
811 _ao_usb_in_send(void)
813 _tx_dbg0("in_send start");
814 debug ("send %d\n", ao_usb_tx_count);
815 while (ao_usb_in_pending)
816 ao_sleep(&ao_usb_in_pending);
817 ao_usb_in_pending = 1;
818 if (ao_usb_tx_count != AO_USB_IN_SIZE)
819 ao_usb_in_flushed = 1;
820 ao_usb_write(ao_usb_tx_buffer, ao_usb_in_tx_buffer, 0, ao_usb_tx_count);
821 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
823 _ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
824 _tx_dbg0("in_send end");
827 /* Wait for a free IN buffer. Interrupts are blocked */
829 _ao_usb_in_wait(void)
832 /* Check if the current buffer is writable */
833 if (ao_usb_tx_count < AO_USB_IN_SIZE)
836 _tx_dbg0("in_wait top");
837 /* Wait for an IN buffer to be ready */
838 while (ao_usb_in_pending)
839 ao_sleep(&ao_usb_in_pending);
840 _tx_dbg0("in_wait bottom");
850 /* Anytime we've sent a character since
851 * the last time we flushed, we'll need
852 * to send a packet -- the only other time
853 * we would send a packet is when that
854 * packet was full, in which case we now
855 * want to send an empty packet
857 ao_arch_block_interrupts();
858 while (!ao_usb_in_flushed) {
859 _tx_dbg0("flush top");
861 _tx_dbg0("flush end");
863 ao_arch_release_interrupts();
867 ao_usb_putchar(char c)
872 ao_arch_block_interrupts();
875 ao_usb_in_flushed = 0;
876 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
878 /* Send the packet when full */
879 if (ao_usb_tx_count == AO_USB_IN_SIZE) {
880 _tx_dbg0("putchar full");
882 _tx_dbg0("putchar flushed");
884 ao_arch_release_interrupts();
888 _ao_usb_out_recv(void)
890 _rx_dbg0("out_recv top");
891 ao_usb_out_avail = 0;
893 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
895 _rx_dbg1("out_recv count", ao_usb_rx_count);
896 debug ("recv %d\n", ao_usb_rx_count);
897 debug_data("Fill OUT len %d:", ao_usb_rx_count);
898 ao_usb_read(ao_usb_rx_buffer, ao_usb_out_rx_buffer, 0, ao_usb_rx_count);
903 _ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
907 _ao_usb_pollchar(void)
912 return AO_READ_AGAIN;
915 if (ao_usb_rx_pos != ao_usb_rx_count)
918 _rx_dbg0("poll check");
919 /* Check to see if a packet has arrived */
920 if (!ao_usb_out_avail) {
921 _rx_dbg0("poll none");
922 return AO_READ_AGAIN;
927 /* Pull a character out of the fifo */
928 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
937 ao_arch_block_interrupts();
938 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
939 ao_sleep(&ao_stdin_ready);
940 ao_arch_release_interrupts();
947 ao_arch_block_interrupts();
948 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
951 /* Disable USB pull-up */
952 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
954 /* Switch off the device */
955 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
957 /* Disable the interface */
958 stm_rcc.apb1enr &+ ~(1 << STM_RCC_APB1ENR_USBEN);
959 ao_arch_release_interrupts();
968 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGEN);
970 /* Disable USB pull-up */
971 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
973 /* Enable USB device */
974 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
976 /* Do not touch the GPIOA configuration; USB takes priority
977 * over GPIO on pins A11 and A12, but if you select alternate
978 * input 10 (the documented correct selection), then USB is
979 * pulled low and doesn't work at all
982 ao_arch_block_interrupts();
984 /* Route interrupts */
985 stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
986 stm_nvic_set_enable(STM_ISR_USB_LP_POS);
988 ao_usb_configuration = 0;
990 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
992 /* Clear the power down bit */
995 /* Clear any spurious interrupts */
998 debug ("ao_usb_enable\n");
1000 /* Enable interrupts */
1001 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
1002 (0 << STM_USB_CNTR_PMAOVRM) |
1003 (0 << STM_USB_CNTR_ERRM) |
1004 (0 << STM_USB_CNTR_WKUPM) |
1005 (0 << STM_USB_CNTR_SUSPM) |
1006 (1 << STM_USB_CNTR_RESETM) |
1007 (0 << STM_USB_CNTR_SOFM) |
1008 (0 << STM_USB_CNTR_ESOFM) |
1009 (0 << STM_USB_CNTR_RESUME) |
1010 (0 << STM_USB_CNTR_FSUSP) |
1011 (0 << STM_USB_CNTR_LP_MODE) |
1012 (0 << STM_USB_CNTR_PDWN) |
1013 (0 << STM_USB_CNTR_FRES));
1015 ao_arch_release_interrupts();
1017 for (t = 0; t < 1000; t++)
1019 /* Enable USB pull-up */
1020 stm_syscfg.pmc |= (1 << STM_SYSCFG_PMC_USB_PU);
1024 struct ao_task ao_usb_echo_task;
1032 c = ao_usb_getchar();
1043 printf ("control: %d out: %d in: %d int: %d reset: %d\n",
1044 control_count, out_count, in_count, int_count, reset_count);
1047 __code struct ao_cmds ao_usb_cmds[] = {
1048 { ao_usb_irq, "I\0Show USB interrupt counts" },
1058 debug ("ao_usb_init\n");
1059 ao_usb_ep0_state = AO_USB_EP0_IDLE;
1061 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1064 ao_cmd_register(&ao_usb_cmds[0]);
1067 ao_add_stdio(_ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);
1071 #if TX_DBG || RX_DBG
1081 uint32_t in_pending;
1083 uint32_t in_flushed;
1093 #define NUM_USB_DBG 128
1095 static struct ao_usb_dbg dbg[128];
1098 static void _dbg(int line, char *msg, uint32_t value)
1101 dbg[dbg_i].line = line;
1102 dbg[dbg_i].msg = msg;
1103 dbg[dbg_i].value = value;
1104 asm("mrs %0,primask" : "=&r" (primask));
1105 dbg[dbg_i].primask = primask;
1107 dbg[dbg_i].in_count = in_count;
1108 dbg[dbg_i].in_epr = stm_usb.epr[AO_USB_IN_EPR];
1109 dbg[dbg_i].in_pending = ao_usb_in_pending;
1110 dbg[dbg_i].tx_count = ao_usb_tx_count;
1111 dbg[dbg_i].in_flushed = ao_usb_in_flushed;
1114 dbg[dbg_i].rx_count = ao_usb_rx_count;
1115 dbg[dbg_i].rx_pos = ao_usb_rx_pos;
1116 dbg[dbg_i].out_avail = ao_usb_out_avail;
1117 dbg[dbg_i].out_epr = stm_usb.epr[AO_USB_OUT_EPR];
1119 if (++dbg_i == NUM_USB_DBG)