2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
23 #define USB_DEBUG_DATA 0
27 #define USE_USB_STDIO 1
31 #define AO_USB_OUT_SLEEP_ADDR (&ao_stdin_ready)
33 #define AO_USB_OUT_SLEEP_ADDR (&ao_usb_out_avail)
37 #define debug(format, args...) printf(format, ## args);
39 #define debug(format, args...)
43 #define debug_data(format, args...) printf(format, ## args);
45 #define debug_data(format, args...)
49 uint8_t dir_type_recip;
56 static uint8_t ao_usb_ep0_state;
58 /* Pending EP0 IN data */
59 static const uint8_t *ao_usb_ep0_in_data; /* Remaining data */
60 static uint8_t ao_usb_ep0_in_len; /* Remaining amount */
62 /* Temp buffer for smaller EP0 in data */
63 static uint8_t ao_usb_ep0_in_buf[2];
65 /* Pending EP0 OUT data */
66 static uint8_t *ao_usb_ep0_out_data;
67 static uint8_t ao_usb_ep0_out_len;
70 * Objects allocated in special USB memory
73 /* Buffer description tables */
74 static union stm_usb_bdt *ao_usb_bdt;
75 /* USB address of end of allocated storage */
76 static uint16_t ao_usb_sram_addr;
78 /* Pointer to ep0 tx/rx buffers in USB memory */
79 static uint32_t *ao_usb_ep0_tx_buffer;
80 static uint32_t *ao_usb_ep0_rx_buffer;
82 /* Pointer to bulk data tx/rx buffers in USB memory */
83 static uint32_t *ao_usb_in_tx_buffer;
84 static uint32_t *ao_usb_out_rx_buffer;
86 /* System ram shadow of USB buffer; writing individual bytes is
87 * too much of a pain (sigh) */
88 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
89 static uint8_t ao_usb_tx_count;
91 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
92 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
95 * End point register indices
98 #define AO_USB_CONTROL_EPR 0
99 #define AO_USB_INT_EPR 1
100 #define AO_USB_OUT_EPR 2
101 #define AO_USB_IN_EPR 3
103 /* Marks when we don't need to send an IN packet.
104 * This happens only when the last IN packet is not full,
105 * otherwise the host will expect to keep seeing packets.
106 * Send a zero-length packet as required
108 static uint8_t ao_usb_in_flushed;
110 /* Marks when we have delivered an IN packet to the hardware
111 * and it has not been received yet. ao_sleep on this address
112 * to wait for it to be delivered.
114 static uint8_t ao_usb_in_pending;
116 /* Marks when an OUT packet has been received by the hardware
117 * but not pulled to the shadow buffer.
119 static uint8_t ao_usb_out_avail;
120 static uint8_t ao_usb_running;
121 static uint8_t ao_usb_configuration;
122 static uint8_t ueienx_0;
124 #define AO_USB_EP0_GOT_RESET 1
125 #define AO_USB_EP0_GOT_SETUP 2
126 #define AO_USB_EP0_GOT_RX_DATA 4
127 #define AO_USB_EP0_GOT_TX_ACK 8
129 static uint8_t ao_usb_ep0_receive;
130 static uint8_t ao_usb_address;
131 static uint8_t ao_usb_address_pending;
133 static inline uint32_t set_toggle(uint32_t current_value,
135 uint32_t desired_value)
137 return (current_value ^ desired_value) & mask;
140 static inline uint32_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
142 return (uint32_t *) (stm_usb_sram + 2 * sram_addr);
145 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
146 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
149 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
150 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
153 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
154 return (epr >> STM_USB_EPR_CTR_RX) & 1;
157 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
158 return (epr >> STM_USB_EPR_CTR_TX) & 1;
161 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
162 return (epr >> STM_USB_EPR_SETUP) & 1;
165 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
166 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
169 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
170 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
174 * Set current device address and mark the
175 * interface as active
178 ao_usb_set_address(uint8_t address)
180 debug("ao_usb_set_address %02x\n", address);
181 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
182 ao_usb_address_pending = 0;
186 * Write these values to preserve register contents under HW changes
189 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
190 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
191 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
192 (1 << STM_USB_EPR_CTR_TX) | \
193 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
194 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
196 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
197 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
198 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
199 (1 << STM_USB_EPR_CTR_TX) | \
200 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
201 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
204 * These bits are purely under sw control, so preserve them in the
205 * register by re-writing what was read
207 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
208 (1 << STM_USB_EPR_EP_KIND) | \
209 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
215 #define _tx_dbg0(msg) _dbg(__LINE__,msg,0)
216 #define _tx_dbg1(msg,value) _dbg(__LINE__,msg,value)
218 #define _tx_dbg0(msg)
219 #define _tx_dbg1(msg,value)
223 #define _rx_dbg0(msg) _dbg(__LINE__,msg,0)
224 #define _rx_dbg1(msg,value) _dbg(__LINE__,msg,value)
226 #define _rx_dbg0(msg)
227 #define _rx_dbg1(msg,value)
231 static void _dbg(int line, char *msg, uint32_t value);
235 * Set the state of the specified endpoint register to a new
236 * value. This is tricky because the bits toggle where the new
237 * value is one, and we need to write invariant values in other
238 * spots of the register. This hardware is strange...
241 _ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
243 uint32_t epr_write, epr_old;
245 _tx_dbg1("set_stat_tx top", stat_tx);
246 epr_old = epr_write = stm_usb.epr[ep];
247 epr_write &= STM_USB_EPR_PRESERVE_MASK;
248 epr_write |= STM_USB_EPR_INVARIANT;
249 epr_write |= set_toggle(epr_old,
250 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
251 stat_tx << STM_USB_EPR_STAT_TX);
252 stm_usb.epr[ep] = epr_write;
253 _tx_dbg1("set_stat_tx bottom", epr_write);
257 ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
259 ao_arch_block_interrupts();
260 _ao_usb_set_stat_tx(ep, stat_tx);
261 ao_arch_release_interrupts();
265 _ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
266 uint32_t epr_write, epr_old;
268 epr_write = epr_old = stm_usb.epr[ep];
269 epr_write &= STM_USB_EPR_PRESERVE_MASK;
270 epr_write |= STM_USB_EPR_INVARIANT;
271 epr_write |= set_toggle(epr_old,
272 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
273 stat_rx << STM_USB_EPR_STAT_RX);
274 stm_usb.epr[ep] = epr_write;
278 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
279 ao_arch_block_interrupts();
280 _ao_usb_set_stat_rx(ep, stat_rx);
281 ao_arch_release_interrupts();
285 * Set just endpoint 0, for use during startup
289 ao_usb_init_ep(uint8_t ep, uint32_t addr, uint32_t type, uint32_t stat_rx, uint32_t stat_tx)
292 ao_arch_block_interrupts();
293 epr = stm_usb.epr[ep];
294 epr = ((0 << STM_USB_EPR_CTR_RX) |
295 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
297 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
298 (stat_rx << STM_USB_EPR_STAT_RX)) |
299 (type << STM_USB_EPR_EP_TYPE) |
300 (0 << STM_USB_EPR_EP_KIND) |
301 (0 << STM_USB_EPR_CTR_TX) |
302 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
304 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
305 (stat_tx << STM_USB_EPR_STAT_TX)) |
306 (addr << STM_USB_EPR_EA));
307 stm_usb.epr[ep] = epr;
308 ao_arch_release_interrupts();
309 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
310 ep, epr, stm_usb.epr[ep]);
319 ao_usb_sram_addr = 0;
321 /* buffer table is at the start of USB memory */
323 ao_usb_bdt = (void *) stm_usb_sram;
325 ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
327 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
329 ao_usb_bdt[0].single.addr_tx = ao_usb_sram_addr;
330 ao_usb_bdt[0].single.count_tx = 0;
331 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
332 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
334 ao_usb_bdt[0].single.addr_rx = ao_usb_sram_addr;
335 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
336 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
337 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
338 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
340 ao_usb_init_ep(AO_USB_CONTROL_EPR, AO_USB_CONTROL_EP,
341 STM_USB_EPR_EP_TYPE_CONTROL,
342 STM_USB_EPR_STAT_RX_VALID,
343 STM_USB_EPR_STAT_TX_NAK);
345 /* Clear all of the other endpoints */
346 for (e = 1; e < 8; e++) {
348 STM_USB_EPR_EP_TYPE_CONTROL,
349 STM_USB_EPR_STAT_RX_DISABLED,
350 STM_USB_EPR_STAT_TX_DISABLED);
353 ao_usb_set_address(0);
357 ao_usb_set_configuration(void)
361 debug ("ao_usb_set_configuration\n");
363 /* Set up the INT end point */
364 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_sram_addr;
365 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
366 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
367 ao_usb_sram_addr += AO_USB_INT_SIZE;
369 ao_usb_init_ep(AO_USB_INT_EPR,
371 STM_USB_EPR_EP_TYPE_INTERRUPT,
372 STM_USB_EPR_STAT_RX_DISABLED,
373 STM_USB_EPR_STAT_TX_NAK);
375 /* Set up the OUT end point */
376 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_sram_addr;
377 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
378 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
379 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
380 ao_usb_sram_addr += AO_USB_OUT_SIZE;
382 ao_usb_init_ep(AO_USB_OUT_EPR,
384 STM_USB_EPR_EP_TYPE_BULK,
385 STM_USB_EPR_STAT_RX_VALID,
386 STM_USB_EPR_STAT_TX_DISABLED);
388 /* Set up the IN end point */
389 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_sram_addr;
390 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
391 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
392 ao_usb_sram_addr += AO_USB_IN_SIZE;
394 ao_usb_init_ep(AO_USB_IN_EPR,
396 STM_USB_EPR_EP_TYPE_BULK,
397 STM_USB_EPR_STAT_RX_DISABLED,
398 STM_USB_EPR_STAT_TX_NAK);
403 static uint16_t control_count;
404 static uint16_t int_count;
405 static uint16_t in_count;
406 static uint16_t out_count;
407 static uint16_t reset_count;
409 /* The USB memory holds 16 bit values on 32 bit boundaries
410 * and must be accessed only in 32 bit units. Sigh.
414 ao_usb_write_byte(uint8_t byte, uint32_t *base, uint16_t offset)
418 *base = (*base & 0xff) | ((uint32_t) byte << 8);
420 *base = (*base & 0xff00) | byte;
425 ao_usb_write_short(uint16_t data, uint32_t *base, uint16_t offset)
427 base[offset>>1] = data;
431 ao_usb_write(const uint8_t *src, uint32_t *base, uint16_t offset, uint16_t bytes)
436 debug_data (" %02x", src[0]);
437 ao_usb_write_byte(*src++, base, offset++);
441 debug_data (" %02x %02x", src[0], src[1]);
442 ao_usb_write_short((src[1] << 8) | src[0], base, offset);
448 debug_data (" %02x", src[0]);
449 ao_usb_write_byte(*src, base, offset);
453 static inline uint8_t
454 ao_usb_read_byte(uint32_t *base, uint16_t offset)
458 return (*base >> 8) & 0xff;
463 static inline uint16_t
464 ao_usb_read_short(uint32_t *base, uint16_t offset)
466 return base[offset>>1];
470 ao_usb_read(uint8_t *dst, uint32_t *base, uint16_t offset, uint16_t bytes)
475 *dst++ = ao_usb_read_byte(base, offset++);
476 debug_data (" %02x", dst[-1]);
480 uint16_t s = ao_usb_read_short(base, offset);
483 debug_data (" %02x %02x", dst[0], dst[1]);
489 *dst = ao_usb_read_byte(base, offset);
490 debug_data (" %02x", dst[0]);
494 /* Send an IN data packet */
496 ao_usb_ep0_flush(void)
500 /* Check to see if the endpoint is still busy */
501 if (ao_usb_epr_stat_tx(stm_usb.epr[0]) == STM_USB_EPR_STAT_TX_VALID) {
502 debug("EP0 not accepting IN data\n");
506 this_len = ao_usb_ep0_in_len;
507 if (this_len > AO_USB_CONTROL_SIZE)
508 this_len = AO_USB_CONTROL_SIZE;
510 if (this_len < AO_USB_CONTROL_SIZE)
511 ao_usb_ep0_state = AO_USB_EP0_IDLE;
513 ao_usb_ep0_in_len -= this_len;
515 debug_data ("Flush EP0 len %d:", this_len);
516 ao_usb_write(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, 0, this_len);
518 ao_usb_ep0_in_data += this_len;
520 /* Mark the endpoint as TX valid to send the packet */
521 ao_usb_bdt[AO_USB_CONTROL_EPR].single.count_tx = this_len;
522 ao_usb_set_stat_tx(AO_USB_CONTROL_EPR, STM_USB_EPR_STAT_TX_VALID);
523 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[AO_USB_CONTROL_EPR]);
526 /* Read data from the ep0 OUT fifo */
528 ao_usb_ep0_fill(void)
530 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
532 if (len > ao_usb_ep0_out_len)
533 len = ao_usb_ep0_out_len;
534 ao_usb_ep0_out_len -= len;
536 /* Pull all of the data out of the packet */
537 debug_data ("Fill EP0 len %d:", len);
538 ao_usb_read(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, 0, len);
540 ao_usb_ep0_out_data += len;
543 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
547 ao_usb_ep0_in_reset(void)
549 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
550 ao_usb_ep0_in_len = 0;
554 ao_usb_ep0_in_queue_byte(uint8_t a)
556 if (ao_usb_ep0_in_len < sizeof (ao_usb_ep0_in_buf))
557 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
561 ao_usb_ep0_in_set(const uint8_t *data, uint8_t len)
563 ao_usb_ep0_in_data = data;
564 ao_usb_ep0_in_len = len;
568 ao_usb_ep0_out_set(uint8_t *data, uint8_t len)
570 ao_usb_ep0_out_data = data;
571 ao_usb_ep0_out_len = len;
575 ao_usb_ep0_in_start(uint16_t max)
577 /* Don't send more than asked for */
578 if (ao_usb_ep0_in_len > max)
579 ao_usb_ep0_in_len = max;
583 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
585 /* Walk through the list of descriptors and find a match
588 ao_usb_get_descriptor(uint16_t value)
590 const uint8_t *descriptor;
591 uint8_t type = value >> 8;
592 uint8_t index = value;
594 descriptor = ao_usb_descriptors;
595 while (descriptor[0] != 0) {
596 if (descriptor[1] == type && index-- == 0) {
598 if (type == AO_USB_DESC_CONFIGURATION)
602 ao_usb_ep0_in_set(descriptor, len);
605 descriptor += descriptor[0];
610 ao_usb_ep0_setup(void)
612 /* Pull the setup packet out of the fifo */
613 ao_usb_ep0_out_set((uint8_t *) &ao_usb_setup, 8);
615 if (ao_usb_ep0_out_len != 0) {
616 debug ("invalid setup packet length\n");
620 if ((ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) || ao_usb_setup.length == 0)
621 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
623 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
625 ao_usb_ep0_in_reset();
627 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
628 case AO_USB_TYPE_STANDARD:
629 debug ("Standard setup packet\n");
630 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
631 case AO_USB_RECIP_DEVICE:
632 debug ("Device setup packet\n");
633 switch(ao_usb_setup.request) {
634 case AO_USB_REQ_GET_STATUS:
635 debug ("get status\n");
636 ao_usb_ep0_in_queue_byte(0);
637 ao_usb_ep0_in_queue_byte(0);
639 case AO_USB_REQ_SET_ADDRESS:
640 debug ("set address %d\n", ao_usb_setup.value);
641 ao_usb_address = ao_usb_setup.value;
642 ao_usb_address_pending = 1;
644 case AO_USB_REQ_GET_DESCRIPTOR:
645 debug ("get descriptor %d\n", ao_usb_setup.value);
646 ao_usb_get_descriptor(ao_usb_setup.value);
648 case AO_USB_REQ_GET_CONFIGURATION:
649 debug ("get configuration %d\n", ao_usb_configuration);
650 ao_usb_ep0_in_queue_byte(ao_usb_configuration);
652 case AO_USB_REQ_SET_CONFIGURATION:
653 ao_usb_configuration = ao_usb_setup.value;
654 debug ("set configuration %d\n", ao_usb_configuration);
655 ao_usb_set_configuration();
659 case AO_USB_RECIP_INTERFACE:
660 debug ("Interface setup packet\n");
661 switch(ao_usb_setup.request) {
662 case AO_USB_REQ_GET_STATUS:
663 ao_usb_ep0_in_queue_byte(0);
664 ao_usb_ep0_in_queue_byte(0);
666 case AO_USB_REQ_GET_INTERFACE:
667 ao_usb_ep0_in_queue_byte(0);
669 case AO_USB_REQ_SET_INTERFACE:
673 case AO_USB_RECIP_ENDPOINT:
674 debug ("Endpoint setup packet\n");
675 switch(ao_usb_setup.request) {
676 case AO_USB_REQ_GET_STATUS:
677 ao_usb_ep0_in_queue_byte(0);
678 ao_usb_ep0_in_queue_byte(0);
684 case AO_USB_TYPE_CLASS:
685 debug ("Class setup packet\n");
686 switch (ao_usb_setup.request) {
687 case AO_USB_SET_LINE_CODING:
688 debug ("set line coding\n");
689 ao_usb_ep0_out_set((uint8_t *) &ao_usb_line_coding, 7);
691 case AO_USB_GET_LINE_CODING:
692 debug ("get line coding\n");
693 ao_usb_ep0_in_set((const uint8_t *) &ao_usb_line_coding, 7);
695 case AO_USB_SET_CONTROL_LINE_STATE:
701 /* If we're not waiting to receive data from the host,
702 * queue an IN response
704 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
705 ao_usb_ep0_in_start(ao_usb_setup.length);
709 ao_usb_ep0_handle(uint8_t receive)
711 ao_usb_ep0_receive = 0;
712 if (receive & AO_USB_EP0_GOT_RESET) {
717 if (receive & AO_USB_EP0_GOT_SETUP) {
721 if (receive & AO_USB_EP0_GOT_RX_DATA) {
722 debug ("\tgot rx data\n");
723 if (ao_usb_ep0_state == AO_USB_EP0_DATA_OUT) {
725 if (ao_usb_ep0_out_len == 0) {
726 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
727 ao_usb_ep0_in_start(0);
731 if (receive & AO_USB_EP0_GOT_TX_ACK) {
732 debug ("\tgot tx ack\n");
734 /* Wait until the IN packet is received from addr 0
735 * before assigning our local address
737 if (ao_usb_address_pending)
738 ao_usb_set_address(ao_usb_address);
739 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
747 uint32_t istr = stm_usb.istr;
749 if (istr & (1 << STM_USB_ISTR_CTR)) {
750 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
751 uint32_t epr, epr_write;
753 /* Preserve the SW write bits, don't mess with most HW writable bits,
754 * clear the CTR_RX and CTR_TX bits
756 epr = stm_usb.epr[ep];
758 epr_write &= STM_USB_EPR_PRESERVE_MASK;
759 epr_write |= STM_USB_EPR_INVARIANT;
760 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
761 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
762 stm_usb.epr[ep] = epr_write;
767 if (ao_usb_epr_ctr_rx(epr)) {
768 if (ao_usb_epr_setup(epr))
769 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
771 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
773 if (ao_usb_epr_ctr_tx(epr))
774 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
775 ao_usb_ep0_handle(ao_usb_ep0_receive);
779 if (ao_usb_epr_ctr_rx(epr)) {
780 _rx_dbg1("RX ISR", epr);
781 ao_usb_out_avail = 1;
782 _rx_dbg0("out avail set");
783 ao_wakeup(AO_USB_OUT_SLEEP_ADDR);
784 _rx_dbg0("stdin awoken");
789 _tx_dbg1("TX ISR", epr);
790 if (ao_usb_epr_ctr_tx(epr)) {
791 ao_usb_in_pending = 0;
792 ao_wakeup(&ao_usb_in_pending);
797 if (ao_usb_epr_ctr_tx(epr))
798 _ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
804 if (istr & (1 << STM_USB_ISTR_RESET)) {
806 stm_usb.istr &= ~(1 << STM_USB_ISTR_RESET);
807 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
808 ao_usb_ep0_handle(ao_usb_ep0_receive);
813 stm_usb_fs_wkup(void)
815 /* USB wakeup, just clear the bit for now */
816 stm_usb.istr &= ~(1 << STM_USB_ISTR_WKUP);
819 /* Queue the current IN buffer for transmission */
821 _ao_usb_in_send(void)
823 _tx_dbg0("in_send start");
824 debug ("send %d\n", ao_usb_tx_count);
825 while (ao_usb_in_pending)
826 ao_sleep(&ao_usb_in_pending);
827 ao_usb_in_pending = 1;
828 if (ao_usb_tx_count != AO_USB_IN_SIZE)
829 ao_usb_in_flushed = 1;
830 ao_usb_write(ao_usb_tx_buffer, ao_usb_in_tx_buffer, 0, ao_usb_tx_count);
831 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
833 _ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
834 _tx_dbg0("in_send end");
837 /* Wait for a free IN buffer. Interrupts are blocked */
839 _ao_usb_in_wait(void)
842 /* Check if the current buffer is writable */
843 if (ao_usb_tx_count < AO_USB_IN_SIZE)
846 _tx_dbg0("in_wait top");
847 /* Wait for an IN buffer to be ready */
848 while (ao_usb_in_pending)
849 ao_sleep(&ao_usb_in_pending);
850 _tx_dbg0("in_wait bottom");
860 /* Anytime we've sent a character since
861 * the last time we flushed, we'll need
862 * to send a packet -- the only other time
863 * we would send a packet is when that
864 * packet was full, in which case we now
865 * want to send an empty packet
867 ao_arch_block_interrupts();
868 while (!ao_usb_in_flushed) {
869 _tx_dbg0("flush top");
871 _tx_dbg0("flush end");
873 ao_arch_release_interrupts();
877 ao_usb_putchar(char c)
882 ao_arch_block_interrupts();
885 ao_usb_in_flushed = 0;
886 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
888 /* Send the packet when full */
889 if (ao_usb_tx_count == AO_USB_IN_SIZE) {
890 _tx_dbg0("putchar full");
892 _tx_dbg0("putchar flushed");
894 ao_arch_release_interrupts();
898 _ao_usb_out_recv(void)
900 _rx_dbg0("out_recv top");
901 ao_usb_out_avail = 0;
903 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
905 _rx_dbg1("out_recv count", ao_usb_rx_count);
906 debug ("recv %d\n", ao_usb_rx_count);
907 debug_data("Fill OUT len %d:", ao_usb_rx_count);
908 ao_usb_read(ao_usb_rx_buffer, ao_usb_out_rx_buffer, 0, ao_usb_rx_count);
913 _ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
917 _ao_usb_pollchar(void)
922 return AO_READ_AGAIN;
925 if (ao_usb_rx_pos != ao_usb_rx_count)
928 _rx_dbg0("poll check");
929 /* Check to see if a packet has arrived */
930 if (!ao_usb_out_avail) {
931 _rx_dbg0("poll none");
932 return AO_READ_AGAIN;
937 /* Pull a character out of the fifo */
938 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
947 ao_arch_block_interrupts();
948 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
949 ao_sleep(AO_USB_OUT_SLEEP_ADDR);
950 ao_arch_release_interrupts();
957 ao_arch_block_interrupts();
958 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
961 /* Disable USB pull-up */
962 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
964 /* Switch off the device */
965 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
967 /* Disable the interface */
968 stm_rcc.apb1enr &+ ~(1 << STM_RCC_APB1ENR_USBEN);
969 ao_arch_release_interrupts();
978 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGEN);
980 /* Disable USB pull-up */
981 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
983 /* Enable USB device */
984 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
986 /* Do not touch the GPIOA configuration; USB takes priority
987 * over GPIO on pins A11 and A12, but if you select alternate
988 * input 10 (the documented correct selection), then USB is
989 * pulled low and doesn't work at all
992 ao_arch_block_interrupts();
994 /* Route interrupts */
995 stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
996 stm_nvic_set_enable(STM_ISR_USB_LP_POS);
998 ao_usb_configuration = 0;
1000 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
1002 /* Clear the power down bit */
1005 /* Clear any spurious interrupts */
1008 debug ("ao_usb_enable\n");
1010 /* Enable interrupts */
1011 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
1012 (0 << STM_USB_CNTR_PMAOVRM) |
1013 (0 << STM_USB_CNTR_ERRM) |
1014 (0 << STM_USB_CNTR_WKUPM) |
1015 (0 << STM_USB_CNTR_SUSPM) |
1016 (1 << STM_USB_CNTR_RESETM) |
1017 (0 << STM_USB_CNTR_SOFM) |
1018 (0 << STM_USB_CNTR_ESOFM) |
1019 (0 << STM_USB_CNTR_RESUME) |
1020 (0 << STM_USB_CNTR_FSUSP) |
1021 (0 << STM_USB_CNTR_LP_MODE) |
1022 (0 << STM_USB_CNTR_PDWN) |
1023 (0 << STM_USB_CNTR_FRES));
1025 ao_arch_release_interrupts();
1027 for (t = 0; t < 1000; t++)
1029 /* Enable USB pull-up */
1030 stm_syscfg.pmc |= (1 << STM_SYSCFG_PMC_USB_PU);
1034 struct ao_task ao_usb_echo_task;
1042 c = ao_usb_getchar();
1053 printf ("control: %d out: %d in: %d int: %d reset: %d\n",
1054 control_count, out_count, in_count, int_count, reset_count);
1057 __code struct ao_cmds ao_usb_cmds[] = {
1058 { ao_usb_irq, "I\0Show USB interrupt counts" },
1068 debug ("ao_usb_init\n");
1069 ao_usb_ep0_state = AO_USB_EP0_IDLE;
1071 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1074 ao_cmd_register(&ao_usb_cmds[0]);
1078 ao_add_stdio(_ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);
1083 #if TX_DBG || RX_DBG
1093 uint32_t in_pending;
1095 uint32_t in_flushed;
1105 #define NUM_USB_DBG 128
1107 static struct ao_usb_dbg dbg[128];
1110 static void _dbg(int line, char *msg, uint32_t value)
1113 dbg[dbg_i].line = line;
1114 dbg[dbg_i].msg = msg;
1115 dbg[dbg_i].value = value;
1116 asm("mrs %0,primask" : "=&r" (primask));
1117 dbg[dbg_i].primask = primask;
1119 dbg[dbg_i].in_count = in_count;
1120 dbg[dbg_i].in_epr = stm_usb.epr[AO_USB_IN_EPR];
1121 dbg[dbg_i].in_pending = ao_usb_in_pending;
1122 dbg[dbg_i].tx_count = ao_usb_tx_count;
1123 dbg[dbg_i].in_flushed = ao_usb_in_flushed;
1126 dbg[dbg_i].rx_count = ao_usb_rx_count;
1127 dbg[dbg_i].rx_pos = ao_usb_rx_pos;
1128 dbg[dbg_i].out_avail = ao_usb_out_avail;
1129 dbg[dbg_i].out_epr = stm_usb.epr[AO_USB_OUT_EPR];
1131 if (++dbg_i == NUM_USB_DBG)