2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
23 #define USB_DEBUG_DATA 0
27 #define debug(format, args...) printf(format, ## args);
29 #define debug(format, args...)
33 #define debug_data(format, args...) printf(format, ## args);
35 #define debug_data(format, args...)
38 struct ao_task ao_usb_task;
41 uint8_t dir_type_recip;
48 static uint8_t ao_usb_ep0_state;
50 /* Pending EP0 IN data */
51 static const uint8_t *ao_usb_ep0_in_data; /* Remaining data */
52 static uint8_t ao_usb_ep0_in_len; /* Remaining amount */
54 /* Temp buffer for smaller EP0 in data */
55 static uint8_t ao_usb_ep0_in_buf[2];
57 /* Pending EP0 OUT data */
58 static uint8_t *ao_usb_ep0_out_data;
59 static uint8_t ao_usb_ep0_out_len;
62 * Objects allocated in special USB memory
65 /* Buffer description tables */
66 static union stm_usb_bdt *ao_usb_bdt;
67 /* USB address of end of allocated storage */
68 static uint16_t ao_usb_sram_addr;
70 /* Pointer to ep0 tx/rx buffers in USB memory */
71 static uint32_t *ao_usb_ep0_tx_buffer;
72 static uint32_t *ao_usb_ep0_rx_buffer;
74 /* Pointer to bulk data tx/rx buffers in USB memory */
75 static uint32_t *ao_usb_in_tx_buffer;
76 static uint32_t *ao_usb_out_rx_buffer;
78 /* System ram shadow of USB buffer; writing individual bytes is
79 * too much of a pain (sigh) */
80 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
81 static uint8_t ao_usb_tx_count;
83 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
84 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
87 * End point register indices
90 #define AO_USB_CONTROL_EPR 0
91 #define AO_USB_INT_EPR 1
92 #define AO_USB_OUT_EPR 2
93 #define AO_USB_IN_EPR 3
95 /* Marks when we don't need to send an IN packet.
96 * This happens only when the last IN packet is not full,
97 * otherwise the host will expect to keep seeing packets.
98 * Send a zero-length packet as required
100 static uint8_t ao_usb_in_flushed;
102 /* Marks when we have delivered an IN packet to the hardware
103 * and it has not been received yet. ao_sleep on this address
104 * to wait for it to be delivered.
106 static uint8_t ao_usb_in_pending;
108 /* Marks when an OUT packet has been received by the hardware
109 * but not pulled to the shadow buffer.
111 static uint8_t ao_usb_out_avail;
112 static uint8_t ao_usb_running;
113 static uint8_t ao_usb_configuration;
114 static uint8_t ueienx_0;
116 #define AO_USB_EP0_GOT_RESET 1
117 #define AO_USB_EP0_GOT_SETUP 2
118 #define AO_USB_EP0_GOT_RX_DATA 4
119 #define AO_USB_EP0_GOT_TX_ACK 8
121 static uint8_t ao_usb_ep0_receive;
122 static uint8_t ao_usb_address;
123 static uint8_t ao_usb_address_pending;
125 static inline uint32_t set_toggle(uint32_t current_value,
127 uint32_t desired_value)
129 return (current_value ^ desired_value) & mask;
132 static inline uint32_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
134 return (uint32_t *) (stm_usb_sram + 2 * sram_addr);
137 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
138 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
141 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
142 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
145 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
146 return (epr >> STM_USB_EPR_CTR_RX) & 1;
149 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
150 return (epr >> STM_USB_EPR_CTR_TX) & 1;
153 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
154 return (epr >> STM_USB_EPR_SETUP) & 1;
157 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
158 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
161 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
162 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
166 * Set current device address and mark the
167 * interface as active
170 ao_usb_set_address(uint8_t address)
172 debug("ao_usb_set_address %02x\n", address);
173 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
174 ao_usb_address_pending = 0;
178 * Write these values to preserve register contents under HW changes
181 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
182 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
183 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
184 (1 << STM_USB_EPR_CTR_TX) | \
185 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
186 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
188 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
189 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
190 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
191 (1 << STM_USB_EPR_CTR_TX) | \
192 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
193 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
196 * These bits are purely under sw control, so preserve them in the
197 * register by re-writing what was read
199 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
200 (1 << STM_USB_EPR_EP_KIND) | \
201 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
204 * Set the state of the specified endpoint register to a new
205 * value. This is tricky because the bits toggle where the new
206 * value is one, and we need to write invariant values in other
207 * spots of the register. This hardware is strange...
210 _ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
212 uint32_t epr_write, epr_old;
214 epr_old = epr_write = stm_usb.epr[ep];
215 epr_write &= STM_USB_EPR_PRESERVE_MASK;
216 epr_write |= STM_USB_EPR_INVARIANT;
217 epr_write |= set_toggle(epr_old,
218 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
219 stat_tx << STM_USB_EPR_STAT_TX);
220 stm_usb.epr[ep] = epr_write;
224 ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
226 ao_arch_block_interrupts();
227 _ao_usb_set_stat_tx(ep, stat_tx);
228 ao_arch_release_interrupts();
232 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
233 uint32_t epr_write, epr_old;
235 ao_arch_block_interrupts();
236 epr_write = epr_old = stm_usb.epr[ep];
237 epr_write &= STM_USB_EPR_PRESERVE_MASK;
238 epr_write |= STM_USB_EPR_INVARIANT;
239 epr_write |= set_toggle(epr_old,
240 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
241 stat_rx << STM_USB_EPR_STAT_RX);
242 stm_usb.epr[ep] = epr_write;
243 ao_arch_release_interrupts();
247 * Set just endpoint 0, for use during startup
251 ao_usb_init_ep(uint8_t ep, uint32_t addr, uint32_t type, uint32_t stat_rx, uint32_t stat_tx)
254 ao_arch_block_interrupts();
255 epr = stm_usb.epr[ep];
256 epr = ((0 << STM_USB_EPR_CTR_RX) |
257 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
259 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
260 (stat_rx << STM_USB_EPR_STAT_RX)) |
261 (type << STM_USB_EPR_EP_TYPE) |
262 (0 << STM_USB_EPR_EP_KIND) |
263 (0 << STM_USB_EPR_CTR_TX) |
264 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
266 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
267 (stat_tx << STM_USB_EPR_STAT_TX)) |
268 (addr << STM_USB_EPR_EA));
269 stm_usb.epr[ep] = epr;
270 ao_arch_release_interrupts();
271 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
272 ep, epr, stm_usb.epr[ep]);
281 ao_usb_sram_addr = 0;
283 /* buffer table is at the start of USB memory */
285 ao_usb_bdt = (void *) stm_usb_sram;
287 ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
289 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
291 ao_usb_bdt[0].single.addr_tx = ao_usb_sram_addr;
292 ao_usb_bdt[0].single.count_tx = 0;
293 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
294 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
296 ao_usb_bdt[0].single.addr_rx = ao_usb_sram_addr;
297 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
298 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
299 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
300 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
302 ao_usb_init_ep(AO_USB_CONTROL_EPR, AO_USB_CONTROL_EP,
303 STM_USB_EPR_EP_TYPE_CONTROL,
304 STM_USB_EPR_STAT_RX_VALID,
305 STM_USB_EPR_STAT_TX_NAK);
307 /* Clear all of the other endpoints */
308 for (e = 1; e < 8; e++) {
310 STM_USB_EPR_EP_TYPE_CONTROL,
311 STM_USB_EPR_STAT_RX_DISABLED,
312 STM_USB_EPR_STAT_TX_DISABLED);
315 ao_usb_set_address(0);
319 ao_usb_set_configuration(void)
323 debug ("ao_usb_set_configuration\n");
325 /* Set up the INT end point */
326 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_sram_addr;
327 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
328 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
329 ao_usb_sram_addr += AO_USB_INT_SIZE;
331 ao_usb_init_ep(AO_USB_INT_EPR,
333 STM_USB_EPR_EP_TYPE_INTERRUPT,
334 STM_USB_EPR_STAT_RX_DISABLED,
335 STM_USB_EPR_STAT_TX_NAK);
337 /* Set up the OUT end point */
338 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_sram_addr;
339 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
340 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
341 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
342 ao_usb_sram_addr += AO_USB_OUT_SIZE;
344 ao_usb_init_ep(AO_USB_OUT_EPR,
346 STM_USB_EPR_EP_TYPE_BULK,
347 STM_USB_EPR_STAT_RX_VALID,
348 STM_USB_EPR_STAT_TX_DISABLED);
350 /* Set up the IN end point */
351 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_sram_addr;
352 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
353 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
354 ao_usb_sram_addr += AO_USB_IN_SIZE;
356 ao_usb_init_ep(AO_USB_IN_EPR,
358 STM_USB_EPR_EP_TYPE_BULK,
359 STM_USB_EPR_STAT_RX_DISABLED,
360 STM_USB_EPR_STAT_TX_NAK);
365 static uint16_t control_count;
366 static uint16_t int_count;
367 static uint16_t in_count;
368 static uint16_t out_count;
369 static uint16_t reset_count;
374 uint32_t istr = stm_usb.istr;
376 if (istr & (1 << STM_USB_ISTR_CTR)) {
377 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
378 uint32_t epr, epr_write;
380 /* Preserve the SW write bits, don't mess with most HW writable bits,
381 * clear the CTR_RX and CTR_TX bits
383 epr = stm_usb.epr[ep];
385 epr_write &= STM_USB_EPR_PRESERVE_MASK;
386 epr_write |= STM_USB_EPR_INVARIANT;
387 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
388 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
389 stm_usb.epr[ep] = epr_write;
394 if (ao_usb_epr_ctr_rx(epr)) {
395 if (ao_usb_epr_setup(epr))
396 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
398 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
400 if (ao_usb_epr_ctr_tx(epr))
401 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
402 ao_wakeup(&ao_usb_ep0_receive);
406 if (ao_usb_epr_ctr_rx(epr)) {
407 ao_usb_out_avail = 1;
408 ao_wakeup(&ao_stdin_ready);
413 if (ao_usb_epr_ctr_tx(epr)) {
414 ao_usb_in_pending = 0;
415 ao_wakeup(&ao_usb_in_pending);
420 if (ao_usb_epr_ctr_tx(epr))
421 _ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
427 if (istr & (1 << STM_USB_ISTR_RESET)) {
429 stm_usb.istr &= ~(1 << STM_USB_ISTR_RESET);
430 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
431 ao_wakeup(&ao_usb_ep0_receive);
436 stm_usb_fs_wkup(void)
438 /* USB wakeup, just clear the bit for now */
439 stm_usb.istr &= ~(1 << STM_USB_ISTR_WKUP);
442 /* The USB memory holds 16 bit values on 32 bit boundaries
443 * and must be accessed only in 32 bit units. Sigh.
447 ao_usb_write_byte(uint8_t byte, uint32_t *base, uint16_t offset)
451 *base = (*base & 0xff) | ((uint32_t) byte << 8);
453 *base = (*base & 0xff00) | byte;
458 ao_usb_write_short(uint16_t data, uint32_t *base, uint16_t offset)
460 base[offset>>1] = data;
464 ao_usb_write(const uint8_t *src, uint32_t *base, uint16_t offset, uint16_t bytes)
469 debug_data (" %02x", src[0]);
470 ao_usb_write_byte(*src++, base, offset++);
474 debug_data (" %02x %02x", src[0], src[1]);
475 ao_usb_write_short((src[1] << 8) | src[0], base, offset);
481 debug_data (" %02x", src[0]);
482 ao_usb_write_byte(*src, base, offset);
486 static inline uint8_t
487 ao_usb_read_byte(uint32_t *base, uint16_t offset)
491 return (*base >> 8) & 0xff;
496 static inline uint16_t
497 ao_usb_read_short(uint32_t *base, uint16_t offset)
499 return base[offset>>1];
503 ao_usb_read(uint8_t *dst, uint32_t *base, uint16_t offset, uint16_t bytes)
508 *dst++ = ao_usb_read_byte(base, offset++);
509 debug_data (" %02x", dst[-1]);
513 uint16_t s = ao_usb_read_short(base, offset);
516 debug_data (" %02x %02x", dst[0], dst[1]);
522 *dst = ao_usb_read_byte(base, offset);
523 debug_data (" %02x", dst[0]);
527 /* Send an IN data packet */
529 ao_usb_ep0_flush(void)
533 /* Check to see if the endpoint is still busy */
534 if (ao_usb_epr_stat_tx(stm_usb.epr[0]) == STM_USB_EPR_STAT_TX_VALID) {
535 debug("EP0 not accepting IN data\n");
539 this_len = ao_usb_ep0_in_len;
540 if (this_len > AO_USB_CONTROL_SIZE)
541 this_len = AO_USB_CONTROL_SIZE;
543 if (this_len < AO_USB_CONTROL_SIZE)
544 ao_usb_ep0_state = AO_USB_EP0_IDLE;
546 ao_usb_ep0_in_len -= this_len;
548 debug_data ("Flush EP0 len %d:", this_len);
549 ao_usb_write(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, 0, this_len);
551 ao_usb_ep0_in_data += this_len;
553 /* Mark the endpoint as TX valid to send the packet */
554 ao_usb_bdt[AO_USB_CONTROL_EPR].single.count_tx = this_len;
555 ao_usb_set_stat_tx(AO_USB_CONTROL_EPR, STM_USB_EPR_STAT_TX_VALID);
556 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[AO_USB_CONTROL_EPR]);
559 /* Read data from the ep0 OUT fifo */
561 ao_usb_ep0_fill(void)
563 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
565 if (len > ao_usb_ep0_out_len)
566 len = ao_usb_ep0_out_len;
567 ao_usb_ep0_out_len -= len;
569 /* Pull all of the data out of the packet */
570 debug_data ("Fill EP0 len %d:", len);
571 ao_usb_read(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, 0, len);
573 ao_usb_ep0_out_data += len;
576 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
580 ao_usb_ep0_in_reset(void)
582 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
583 ao_usb_ep0_in_len = 0;
587 ao_usb_ep0_in_queue_byte(uint8_t a)
589 if (ao_usb_ep0_in_len < sizeof (ao_usb_ep0_in_buf))
590 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
594 ao_usb_ep0_in_set(const uint8_t *data, uint8_t len)
596 ao_usb_ep0_in_data = data;
597 ao_usb_ep0_in_len = len;
601 ao_usb_ep0_out_set(uint8_t *data, uint8_t len)
603 ao_usb_ep0_out_data = data;
604 ao_usb_ep0_out_len = len;
608 ao_usb_ep0_in_start(uint8_t max)
610 /* Don't send more than asked for */
611 if (ao_usb_ep0_in_len > max)
612 ao_usb_ep0_in_len = max;
616 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
618 /* Walk through the list of descriptors and find a match
621 ao_usb_get_descriptor(uint16_t value)
623 const uint8_t *descriptor;
624 uint8_t type = value >> 8;
625 uint8_t index = value;
627 descriptor = ao_usb_descriptors;
628 while (descriptor[0] != 0) {
629 if (descriptor[1] == type && index-- == 0) {
631 if (type == AO_USB_DESC_CONFIGURATION)
635 ao_usb_ep0_in_set(descriptor, len);
638 descriptor += descriptor[0];
643 ao_usb_ep0_setup(void)
645 /* Pull the setup packet out of the fifo */
646 ao_usb_ep0_out_set((uint8_t *) &ao_usb_setup, 8);
648 if (ao_usb_ep0_out_len != 0) {
649 debug ("invalid setup packet length\n");
653 if ((ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) || ao_usb_setup.length == 0)
654 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
656 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
658 ao_usb_ep0_in_reset();
660 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
661 case AO_USB_TYPE_STANDARD:
662 debug ("Standard setup packet\n");
663 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
664 case AO_USB_RECIP_DEVICE:
665 debug ("Device setup packet\n");
666 switch(ao_usb_setup.request) {
667 case AO_USB_REQ_GET_STATUS:
668 debug ("get status\n");
669 ao_usb_ep0_in_queue_byte(0);
670 ao_usb_ep0_in_queue_byte(0);
672 case AO_USB_REQ_SET_ADDRESS:
673 debug ("set address %d\n", ao_usb_setup.value);
674 ao_usb_address = ao_usb_setup.value;
675 ao_usb_address_pending = 1;
677 case AO_USB_REQ_GET_DESCRIPTOR:
678 debug ("get descriptor %d\n", ao_usb_setup.value);
679 ao_usb_get_descriptor(ao_usb_setup.value);
681 case AO_USB_REQ_GET_CONFIGURATION:
682 debug ("get configuration %d\n", ao_usb_configuration);
683 ao_usb_ep0_in_queue_byte(ao_usb_configuration);
685 case AO_USB_REQ_SET_CONFIGURATION:
686 ao_usb_configuration = ao_usb_setup.value;
687 debug ("set configuration %d\n", ao_usb_configuration);
688 ao_usb_set_configuration();
692 case AO_USB_RECIP_INTERFACE:
693 debug ("Interface setup packet\n");
694 switch(ao_usb_setup.request) {
695 case AO_USB_REQ_GET_STATUS:
696 ao_usb_ep0_in_queue_byte(0);
697 ao_usb_ep0_in_queue_byte(0);
699 case AO_USB_REQ_GET_INTERFACE:
700 ao_usb_ep0_in_queue_byte(0);
702 case AO_USB_REQ_SET_INTERFACE:
706 case AO_USB_RECIP_ENDPOINT:
707 debug ("Endpoint setup packet\n");
708 switch(ao_usb_setup.request) {
709 case AO_USB_REQ_GET_STATUS:
710 ao_usb_ep0_in_queue_byte(0);
711 ao_usb_ep0_in_queue_byte(0);
717 case AO_USB_TYPE_CLASS:
718 debug ("Class setup packet\n");
719 switch (ao_usb_setup.request) {
720 case AO_USB_SET_LINE_CODING:
721 debug ("set line coding\n");
722 ao_usb_ep0_out_set((uint8_t *) &ao_usb_line_coding, 7);
724 case AO_USB_GET_LINE_CODING:
725 debug ("get line coding\n");
726 ao_usb_ep0_in_set((const uint8_t *) &ao_usb_line_coding, 7);
728 case AO_USB_SET_CONTROL_LINE_STATE:
734 /* If we're not waiting to receive data from the host,
735 * queue an IN response
737 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
738 ao_usb_ep0_in_start(ao_usb_setup.length);
741 /* End point 0 receives all of the control messages. */
747 debug ("usb task started\n");
748 ao_usb_ep0_state = AO_USB_EP0_IDLE;
752 while (!(receive = ao_usb_ep0_receive))
753 ao_sleep(&ao_usb_ep0_receive);
754 ao_usb_ep0_receive = 0;
757 if (receive & AO_USB_EP0_GOT_RESET) {
762 if (receive & AO_USB_EP0_GOT_SETUP) {
766 if (receive & AO_USB_EP0_GOT_RX_DATA) {
767 debug ("\tgot rx data\n");
768 if (ao_usb_ep0_state == AO_USB_EP0_DATA_OUT) {
770 if (ao_usb_ep0_out_len == 0) {
771 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
772 ao_usb_ep0_in_start(0);
776 if (receive & AO_USB_EP0_GOT_TX_ACK) {
777 debug ("\tgot tx ack\n");
779 /* Wait until the IN packet is received from addr 0
780 * before assigning our local address
782 if (ao_usb_address_pending)
783 ao_usb_set_address(ao_usb_address);
784 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
790 /* Queue the current IN buffer for transmission */
794 debug ("send %d\n", ao_usb_tx_count);
795 ao_usb_in_pending = 1;
796 ao_usb_write(ao_usb_tx_buffer, ao_usb_in_tx_buffer, 0, ao_usb_tx_count);
797 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
798 ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
802 /* Wait for a free IN buffer. Interrupts are blocked */
804 _ao_usb_in_wait(void)
807 /* Check if the current buffer is writable */
808 if (ao_usb_tx_count < AO_USB_IN_SIZE)
811 /* Wait for an IN buffer to be ready */
812 while (ao_usb_in_pending)
813 ao_sleep(&ao_usb_in_pending);
823 /* Anytime we've sent a character since
824 * the last time we flushed, we'll need
825 * to send a packet -- the only other time
826 * we would send a packet is when that
827 * packet was full, in which case we now
828 * want to send an empty packet
830 ao_arch_block_interrupts();
831 if (!ao_usb_in_flushed) {
832 ao_usb_in_flushed = 1;
833 /* Wait for an IN buffer to be ready */
834 while (ao_usb_in_pending)
835 ao_sleep(&ao_usb_in_pending);
838 ao_arch_release_interrupts();
842 ao_usb_putchar(char c)
847 ao_arch_block_interrupts();
850 ao_usb_in_flushed = 0;
851 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
853 /* Send the packet when full */
854 if (ao_usb_tx_count == AO_USB_IN_SIZE)
856 ao_arch_release_interrupts();
860 _ao_usb_out_recv(void)
862 ao_usb_out_avail = 0;
864 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
866 debug ("recv %d\n", ao_usb_rx_count);
867 debug_data("Fill OUT len %d:", ao_usb_rx_count);
868 ao_usb_read(ao_usb_rx_buffer, ao_usb_out_rx_buffer, 0, ao_usb_rx_count);
873 ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
877 _ao_usb_pollchar(void)
882 return AO_READ_AGAIN;
885 if (ao_usb_rx_pos != ao_usb_rx_count)
888 /* Check to see if a packet has arrived */
889 if (!ao_usb_out_avail)
890 return AO_READ_AGAIN;
894 /* Pull a character out of the fifo */
895 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
900 ao_usb_pollchar(void)
903 ao_arch_block_interrupts();
904 c = _ao_usb_pollchar();
905 ao_arch_release_interrupts();
914 ao_arch_block_interrupts();
915 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
916 ao_sleep(&ao_stdin_ready);
917 ao_arch_release_interrupts();
924 ao_arch_block_interrupts();
925 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
928 /* Disable USB pull-up */
929 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
931 /* Switch off the device */
932 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
934 /* Disable the interface */
935 stm_rcc.apb1enr &+ ~(1 << STM_RCC_APB1ENR_USBEN);
936 ao_arch_release_interrupts();
945 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGEN);
947 /* Disable USB pull-up */
948 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
950 /* Enable USB device */
951 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
953 /* Do not touch the GPIOA configuration; USB takes priority
954 * over GPIO on pins A11 and A12, but if you select alternate
955 * input 10 (the documented correct selection), then USB is
956 * pulled low and doesn't work at all
959 ao_arch_block_interrupts();
961 /* Route interrupts */
962 stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
963 stm_nvic_set_enable(STM_ISR_USB_LP_POS);
965 ao_usb_configuration = 0;
967 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
969 /* Clear the power down bit */
972 /* Clear any spurious interrupts */
975 debug ("ao_usb_enable\n");
977 /* Enable interrupts */
978 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
979 (0 << STM_USB_CNTR_PMAOVRM) |
980 (0 << STM_USB_CNTR_ERRM) |
981 (0 << STM_USB_CNTR_WKUPM) |
982 (0 << STM_USB_CNTR_SUSPM) |
983 (1 << STM_USB_CNTR_RESETM) |
984 (0 << STM_USB_CNTR_SOFM) |
985 (0 << STM_USB_CNTR_ESOFM) |
986 (0 << STM_USB_CNTR_RESUME) |
987 (0 << STM_USB_CNTR_FSUSP) |
988 (0 << STM_USB_CNTR_LP_MODE) |
989 (0 << STM_USB_CNTR_PDWN) |
990 (0 << STM_USB_CNTR_FRES));
992 ao_arch_release_interrupts();
994 for (t = 0; t < 1000; t++)
996 /* Enable USB pull-up */
997 stm_syscfg.pmc |= (1 << STM_SYSCFG_PMC_USB_PU);
1001 struct ao_task ao_usb_echo_task;
1009 c = ao_usb_getchar();
1020 printf ("control: %d out: %d in: %d int: %d reset: %d\n",
1021 control_count, out_count, in_count, int_count, reset_count);
1024 __code struct ao_cmds ao_usb_cmds[] = {
1025 { ao_usb_irq, "I\0Show USB interrupt counts" },
1035 debug ("ao_usb_init\n");
1036 ao_add_task(&ao_usb_task, ao_usb_ep0, "usb");
1038 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1041 ao_cmd_register(&ao_usb_cmds[0]);
1044 ao_add_stdio(ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);