2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
23 #define USB_DEBUG_DATA 0
27 #define USE_USB_STDIO 1
31 #define AO_USB_OUT_SLEEP_ADDR (&ao_stdin_ready)
33 #define AO_USB_OUT_SLEEP_ADDR (&ao_usb_out_avail)
37 #define debug(format, args...) printf(format, ## args);
39 #define debug(format, args...)
43 #define debug_data(format, args...) printf(format, ## args);
45 #define debug_data(format, args...)
49 uint8_t dir_type_recip;
56 static uint8_t ao_usb_ep0_state;
58 /* Pending EP0 IN data */
59 static const uint8_t *ao_usb_ep0_in_data; /* Remaining data */
60 static uint8_t ao_usb_ep0_in_len; /* Remaining amount */
62 /* Temp buffer for smaller EP0 in data */
63 static uint8_t ao_usb_ep0_in_buf[2];
65 /* Pending EP0 OUT data */
66 static uint8_t *ao_usb_ep0_out_data;
67 static uint8_t ao_usb_ep0_out_len;
70 * Objects allocated in special USB memory
73 /* Buffer description tables */
74 static union stm_usb_bdt *ao_usb_bdt;
75 /* USB address of end of allocated storage */
76 static uint16_t ao_usb_sram_addr;
78 /* Pointer to ep0 tx/rx buffers in USB memory */
79 static uint32_t *ao_usb_ep0_tx_buffer;
80 static uint32_t *ao_usb_ep0_rx_buffer;
82 /* Pointer to bulk data tx/rx buffers in USB memory */
83 static uint32_t *ao_usb_in_tx_buffer;
84 static uint32_t *ao_usb_out_rx_buffer;
86 /* System ram shadow of USB buffer; writing individual bytes is
87 * too much of a pain (sigh) */
88 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
89 static uint8_t ao_usb_tx_count;
91 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
92 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
95 * End point register indices
98 #define AO_USB_CONTROL_EPR 0
99 #define AO_USB_INT_EPR 1
100 #define AO_USB_OUT_EPR 2
101 #define AO_USB_IN_EPR 3
103 /* Marks when we don't need to send an IN packet.
104 * This happens only when the last IN packet is not full,
105 * otherwise the host will expect to keep seeing packets.
106 * Send a zero-length packet as required
108 static uint8_t ao_usb_in_flushed;
110 /* Marks when we have delivered an IN packet to the hardware
111 * and it has not been received yet. ao_sleep on this address
112 * to wait for it to be delivered.
114 static uint8_t ao_usb_in_pending;
116 /* Marks when an OUT packet has been received by the hardware
117 * but not pulled to the shadow buffer.
119 static uint8_t ao_usb_out_avail;
120 static uint8_t ao_usb_running;
121 static uint8_t ao_usb_configuration;
123 #define AO_USB_EP0_GOT_RESET 1
124 #define AO_USB_EP0_GOT_SETUP 2
125 #define AO_USB_EP0_GOT_RX_DATA 4
126 #define AO_USB_EP0_GOT_TX_ACK 8
128 static uint8_t ao_usb_ep0_receive;
129 static uint8_t ao_usb_address;
130 static uint8_t ao_usb_address_pending;
132 static inline uint32_t set_toggle(uint32_t current_value,
134 uint32_t desired_value)
136 return (current_value ^ desired_value) & mask;
139 static inline uint32_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
141 return (uint32_t *) (stm_usb_sram + 2 * sram_addr);
144 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
145 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
148 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
149 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
152 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
153 return (epr >> STM_USB_EPR_CTR_RX) & 1;
156 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
157 return (epr >> STM_USB_EPR_CTR_TX) & 1;
160 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
161 return (epr >> STM_USB_EPR_SETUP) & 1;
164 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
165 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
168 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
169 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
173 * Set current device address and mark the
174 * interface as active
177 ao_usb_set_address(uint8_t address)
179 debug("ao_usb_set_address %02x\n", address);
180 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
181 ao_usb_address_pending = 0;
185 * Write these values to preserve register contents under HW changes
188 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
189 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
190 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
191 (1 << STM_USB_EPR_CTR_TX) | \
192 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
193 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
195 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
196 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
197 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
198 (1 << STM_USB_EPR_CTR_TX) | \
199 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
200 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
203 * These bits are purely under sw control, so preserve them in the
204 * register by re-writing what was read
206 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
207 (1 << STM_USB_EPR_EP_KIND) | \
208 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
214 #define _tx_dbg0(msg) _dbg(__LINE__,msg,0)
215 #define _tx_dbg1(msg,value) _dbg(__LINE__,msg,value)
217 #define _tx_dbg0(msg)
218 #define _tx_dbg1(msg,value)
222 #define _rx_dbg0(msg) _dbg(__LINE__,msg,0)
223 #define _rx_dbg1(msg,value) _dbg(__LINE__,msg,value)
225 #define _rx_dbg0(msg)
226 #define _rx_dbg1(msg,value)
230 static void _dbg(int line, char *msg, uint32_t value);
234 * Set the state of the specified endpoint register to a new
235 * value. This is tricky because the bits toggle where the new
236 * value is one, and we need to write invariant values in other
237 * spots of the register. This hardware is strange...
240 _ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
242 uint32_t epr_write, epr_old;
244 _tx_dbg1("set_stat_tx top", stat_tx);
245 epr_old = epr_write = stm_usb.epr[ep];
246 epr_write &= STM_USB_EPR_PRESERVE_MASK;
247 epr_write |= STM_USB_EPR_INVARIANT;
248 epr_write |= set_toggle(epr_old,
249 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
250 stat_tx << STM_USB_EPR_STAT_TX);
251 stm_usb.epr[ep] = epr_write;
252 _tx_dbg1("set_stat_tx bottom", epr_write);
256 ao_usb_set_stat_tx(int ep, uint32_t stat_tx)
258 ao_arch_block_interrupts();
259 _ao_usb_set_stat_tx(ep, stat_tx);
260 ao_arch_release_interrupts();
264 _ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
265 uint32_t epr_write, epr_old;
267 epr_write = epr_old = stm_usb.epr[ep];
268 epr_write &= STM_USB_EPR_PRESERVE_MASK;
269 epr_write |= STM_USB_EPR_INVARIANT;
270 epr_write |= set_toggle(epr_old,
271 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
272 stat_rx << STM_USB_EPR_STAT_RX);
273 stm_usb.epr[ep] = epr_write;
277 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
278 ao_arch_block_interrupts();
279 _ao_usb_set_stat_rx(ep, stat_rx);
280 ao_arch_release_interrupts();
284 * Set just endpoint 0, for use during startup
288 ao_usb_init_ep(uint8_t ep, uint32_t addr, uint32_t type, uint32_t stat_rx, uint32_t stat_tx)
291 ao_arch_block_interrupts();
292 epr = stm_usb.epr[ep];
293 epr = ((0 << STM_USB_EPR_CTR_RX) |
294 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
296 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
297 (stat_rx << STM_USB_EPR_STAT_RX)) |
298 (type << STM_USB_EPR_EP_TYPE) |
299 (0 << STM_USB_EPR_EP_KIND) |
300 (0 << STM_USB_EPR_CTR_TX) |
301 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
303 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
304 (stat_tx << STM_USB_EPR_STAT_TX)) |
305 (addr << STM_USB_EPR_EA));
306 stm_usb.epr[ep] = epr;
307 ao_arch_release_interrupts();
308 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
309 ep, epr, stm_usb.epr[ep]);
317 ao_usb_sram_addr = 0;
319 /* buffer table is at the start of USB memory */
321 ao_usb_bdt = (void *) stm_usb_sram;
323 ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
325 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
327 ao_usb_bdt[0].single.addr_tx = ao_usb_sram_addr;
328 ao_usb_bdt[0].single.count_tx = 0;
329 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
330 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
332 ao_usb_bdt[0].single.addr_rx = ao_usb_sram_addr;
333 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
334 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
335 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
336 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
338 ao_usb_init_ep(AO_USB_CONTROL_EPR, AO_USB_CONTROL_EP,
339 STM_USB_EPR_EP_TYPE_CONTROL,
340 STM_USB_EPR_STAT_RX_VALID,
341 STM_USB_EPR_STAT_TX_NAK);
343 /* Clear all of the other endpoints */
344 for (e = 1; e < 8; e++) {
346 STM_USB_EPR_EP_TYPE_CONTROL,
347 STM_USB_EPR_STAT_RX_DISABLED,
348 STM_USB_EPR_STAT_TX_DISABLED);
351 ao_usb_set_address(0);
355 ao_usb_set_configuration(void)
357 debug ("ao_usb_set_configuration\n");
359 /* Set up the INT end point */
360 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_sram_addr;
361 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
362 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
363 ao_usb_sram_addr += AO_USB_INT_SIZE;
365 ao_usb_init_ep(AO_USB_INT_EPR,
367 STM_USB_EPR_EP_TYPE_INTERRUPT,
368 STM_USB_EPR_STAT_RX_DISABLED,
369 STM_USB_EPR_STAT_TX_NAK);
371 /* Set up the OUT end point */
372 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_sram_addr;
373 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
374 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
375 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
376 ao_usb_sram_addr += AO_USB_OUT_SIZE;
378 ao_usb_init_ep(AO_USB_OUT_EPR,
380 STM_USB_EPR_EP_TYPE_BULK,
381 STM_USB_EPR_STAT_RX_VALID,
382 STM_USB_EPR_STAT_TX_DISABLED);
384 /* Set up the IN end point */
385 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_sram_addr;
386 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
387 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
388 ao_usb_sram_addr += AO_USB_IN_SIZE;
390 ao_usb_init_ep(AO_USB_IN_EPR,
392 STM_USB_EPR_EP_TYPE_BULK,
393 STM_USB_EPR_STAT_RX_DISABLED,
394 STM_USB_EPR_STAT_TX_NAK);
399 static uint16_t control_count;
400 static uint16_t int_count;
401 static uint16_t in_count;
402 static uint16_t out_count;
403 static uint16_t reset_count;
405 /* The USB memory holds 16 bit values on 32 bit boundaries
406 * and must be accessed only in 32 bit units. Sigh.
410 ao_usb_write_byte(uint8_t byte, uint32_t *base, uint16_t offset)
414 *base = (*base & 0xff) | ((uint32_t) byte << 8);
416 *base = (*base & 0xff00) | byte;
421 ao_usb_write_short(uint16_t data, uint32_t *base, uint16_t offset)
423 base[offset>>1] = data;
427 ao_usb_write(const uint8_t *src, uint32_t *base, uint16_t offset, uint16_t bytes)
432 debug_data (" %02x", src[0]);
433 ao_usb_write_byte(*src++, base, offset++);
437 debug_data (" %02x %02x", src[0], src[1]);
438 ao_usb_write_short((src[1] << 8) | src[0], base, offset);
444 debug_data (" %02x", src[0]);
445 ao_usb_write_byte(*src, base, offset);
449 static inline uint8_t
450 ao_usb_read_byte(uint32_t *base, uint16_t offset)
454 return (*base >> 8) & 0xff;
459 static inline uint16_t
460 ao_usb_read_short(uint32_t *base, uint16_t offset)
462 return base[offset>>1];
466 ao_usb_read(uint8_t *dst, uint32_t *base, uint16_t offset, uint16_t bytes)
471 *dst++ = ao_usb_read_byte(base, offset++);
472 debug_data (" %02x", dst[-1]);
476 uint16_t s = ao_usb_read_short(base, offset);
479 debug_data (" %02x %02x", dst[0], dst[1]);
485 *dst = ao_usb_read_byte(base, offset);
486 debug_data (" %02x", dst[0]);
490 /* Send an IN data packet */
492 ao_usb_ep0_flush(void)
496 /* Check to see if the endpoint is still busy */
497 if (ao_usb_epr_stat_tx(stm_usb.epr[0]) == STM_USB_EPR_STAT_TX_VALID) {
498 debug("EP0 not accepting IN data\n");
502 this_len = ao_usb_ep0_in_len;
503 if (this_len > AO_USB_CONTROL_SIZE)
504 this_len = AO_USB_CONTROL_SIZE;
506 if (this_len < AO_USB_CONTROL_SIZE)
507 ao_usb_ep0_state = AO_USB_EP0_IDLE;
509 ao_usb_ep0_in_len -= this_len;
511 debug_data ("Flush EP0 len %d:", this_len);
512 ao_usb_write(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, 0, this_len);
514 ao_usb_ep0_in_data += this_len;
516 /* Mark the endpoint as TX valid to send the packet */
517 ao_usb_bdt[AO_USB_CONTROL_EPR].single.count_tx = this_len;
518 ao_usb_set_stat_tx(AO_USB_CONTROL_EPR, STM_USB_EPR_STAT_TX_VALID);
519 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[AO_USB_CONTROL_EPR]);
522 /* Read data from the ep0 OUT fifo */
524 ao_usb_ep0_fill(void)
526 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
528 if (len > ao_usb_ep0_out_len)
529 len = ao_usb_ep0_out_len;
530 ao_usb_ep0_out_len -= len;
532 /* Pull all of the data out of the packet */
533 debug_data ("Fill EP0 len %d:", len);
534 ao_usb_read(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, 0, len);
536 ao_usb_ep0_out_data += len;
539 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
543 ao_usb_ep0_in_reset(void)
545 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
546 ao_usb_ep0_in_len = 0;
550 ao_usb_ep0_in_queue_byte(uint8_t a)
552 if (ao_usb_ep0_in_len < sizeof (ao_usb_ep0_in_buf))
553 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
557 ao_usb_ep0_in_set(const uint8_t *data, uint8_t len)
559 ao_usb_ep0_in_data = data;
560 ao_usb_ep0_in_len = len;
564 ao_usb_ep0_out_set(uint8_t *data, uint8_t len)
566 ao_usb_ep0_out_data = data;
567 ao_usb_ep0_out_len = len;
571 ao_usb_ep0_in_start(uint16_t max)
573 /* Don't send more than asked for */
574 if (ao_usb_ep0_in_len > max)
575 ao_usb_ep0_in_len = max;
579 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
581 /* Walk through the list of descriptors and find a match
584 ao_usb_get_descriptor(uint16_t value)
586 const uint8_t *descriptor;
587 uint8_t type = value >> 8;
588 uint8_t index = value;
590 descriptor = ao_usb_descriptors;
591 while (descriptor[0] != 0) {
592 if (descriptor[1] == type && index-- == 0) {
594 if (type == AO_USB_DESC_CONFIGURATION)
598 ao_usb_ep0_in_set(descriptor, len);
601 descriptor += descriptor[0];
606 ao_usb_ep0_setup(void)
608 /* Pull the setup packet out of the fifo */
609 ao_usb_ep0_out_set((uint8_t *) &ao_usb_setup, 8);
611 if (ao_usb_ep0_out_len != 0) {
612 debug ("invalid setup packet length\n");
616 if ((ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) || ao_usb_setup.length == 0)
617 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
619 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
621 ao_usb_ep0_in_reset();
623 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
624 case AO_USB_TYPE_STANDARD:
625 debug ("Standard setup packet\n");
626 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
627 case AO_USB_RECIP_DEVICE:
628 debug ("Device setup packet\n");
629 switch(ao_usb_setup.request) {
630 case AO_USB_REQ_GET_STATUS:
631 debug ("get status\n");
632 ao_usb_ep0_in_queue_byte(0);
633 ao_usb_ep0_in_queue_byte(0);
635 case AO_USB_REQ_SET_ADDRESS:
636 debug ("set address %d\n", ao_usb_setup.value);
637 ao_usb_address = ao_usb_setup.value;
638 ao_usb_address_pending = 1;
640 case AO_USB_REQ_GET_DESCRIPTOR:
641 debug ("get descriptor %d\n", ao_usb_setup.value);
642 ao_usb_get_descriptor(ao_usb_setup.value);
644 case AO_USB_REQ_GET_CONFIGURATION:
645 debug ("get configuration %d\n", ao_usb_configuration);
646 ao_usb_ep0_in_queue_byte(ao_usb_configuration);
648 case AO_USB_REQ_SET_CONFIGURATION:
649 ao_usb_configuration = ao_usb_setup.value;
650 debug ("set configuration %d\n", ao_usb_configuration);
651 ao_usb_set_configuration();
655 case AO_USB_RECIP_INTERFACE:
656 debug ("Interface setup packet\n");
657 switch(ao_usb_setup.request) {
658 case AO_USB_REQ_GET_STATUS:
659 ao_usb_ep0_in_queue_byte(0);
660 ao_usb_ep0_in_queue_byte(0);
662 case AO_USB_REQ_GET_INTERFACE:
663 ao_usb_ep0_in_queue_byte(0);
665 case AO_USB_REQ_SET_INTERFACE:
669 case AO_USB_RECIP_ENDPOINT:
670 debug ("Endpoint setup packet\n");
671 switch(ao_usb_setup.request) {
672 case AO_USB_REQ_GET_STATUS:
673 ao_usb_ep0_in_queue_byte(0);
674 ao_usb_ep0_in_queue_byte(0);
680 case AO_USB_TYPE_CLASS:
681 debug ("Class setup packet\n");
682 switch (ao_usb_setup.request) {
683 case AO_USB_SET_LINE_CODING:
684 debug ("set line coding\n");
685 ao_usb_ep0_out_set((uint8_t *) &ao_usb_line_coding, 7);
687 case AO_USB_GET_LINE_CODING:
688 debug ("get line coding\n");
689 ao_usb_ep0_in_set((const uint8_t *) &ao_usb_line_coding, 7);
691 case AO_USB_SET_CONTROL_LINE_STATE:
697 /* If we're not waiting to receive data from the host,
698 * queue an IN response
700 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
701 ao_usb_ep0_in_start(ao_usb_setup.length);
705 ao_usb_ep0_handle(uint8_t receive)
707 ao_usb_ep0_receive = 0;
708 if (receive & AO_USB_EP0_GOT_RESET) {
713 if (receive & AO_USB_EP0_GOT_SETUP) {
717 if (receive & AO_USB_EP0_GOT_RX_DATA) {
718 debug ("\tgot rx data\n");
719 if (ao_usb_ep0_state == AO_USB_EP0_DATA_OUT) {
721 if (ao_usb_ep0_out_len == 0) {
722 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
723 ao_usb_ep0_in_start(0);
727 if (receive & AO_USB_EP0_GOT_TX_ACK) {
728 debug ("\tgot tx ack\n");
730 /* Wait until the IN packet is received from addr 0
731 * before assigning our local address
733 if (ao_usb_address_pending)
734 ao_usb_set_address(ao_usb_address);
735 if (ao_usb_ep0_state == AO_USB_EP0_DATA_IN)
743 uint32_t istr = stm_usb.istr;
745 if (istr & (1 << STM_USB_ISTR_CTR)) {
746 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
747 uint32_t epr, epr_write;
749 /* Preserve the SW write bits, don't mess with most HW writable bits,
750 * clear the CTR_RX and CTR_TX bits
752 epr = stm_usb.epr[ep];
754 epr_write &= STM_USB_EPR_PRESERVE_MASK;
755 epr_write |= STM_USB_EPR_INVARIANT;
756 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
757 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
758 stm_usb.epr[ep] = epr_write;
763 if (ao_usb_epr_ctr_rx(epr)) {
764 if (ao_usb_epr_setup(epr))
765 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
767 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
769 if (ao_usb_epr_ctr_tx(epr))
770 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
771 ao_usb_ep0_handle(ao_usb_ep0_receive);
775 if (ao_usb_epr_ctr_rx(epr)) {
776 _rx_dbg1("RX ISR", epr);
777 ao_usb_out_avail = 1;
778 _rx_dbg0("out avail set");
779 ao_wakeup(AO_USB_OUT_SLEEP_ADDR);
780 _rx_dbg0("stdin awoken");
785 _tx_dbg1("TX ISR", epr);
786 if (ao_usb_epr_ctr_tx(epr)) {
787 ao_usb_in_pending = 0;
788 ao_wakeup(&ao_usb_in_pending);
793 if (ao_usb_epr_ctr_tx(epr))
794 _ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
800 if (istr & (1 << STM_USB_ISTR_RESET)) {
802 stm_usb.istr &= ~(1 << STM_USB_ISTR_RESET);
803 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
804 ao_usb_ep0_handle(ao_usb_ep0_receive);
809 stm_usb_fs_wkup(void)
811 /* USB wakeup, just clear the bit for now */
812 stm_usb.istr &= ~(1 << STM_USB_ISTR_WKUP);
815 /* Queue the current IN buffer for transmission */
817 _ao_usb_in_send(void)
819 _tx_dbg0("in_send start");
820 debug ("send %d\n", ao_usb_tx_count);
821 while (ao_usb_in_pending)
822 ao_sleep(&ao_usb_in_pending);
823 ao_usb_in_pending = 1;
824 if (ao_usb_tx_count != AO_USB_IN_SIZE)
825 ao_usb_in_flushed = 1;
826 ao_usb_write(ao_usb_tx_buffer, ao_usb_in_tx_buffer, 0, ao_usb_tx_count);
827 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
829 _ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
830 _tx_dbg0("in_send end");
833 /* Wait for a free IN buffer. Interrupts are blocked */
835 _ao_usb_in_wait(void)
838 /* Check if the current buffer is writable */
839 if (ao_usb_tx_count < AO_USB_IN_SIZE)
842 _tx_dbg0("in_wait top");
843 /* Wait for an IN buffer to be ready */
844 while (ao_usb_in_pending)
845 ao_sleep(&ao_usb_in_pending);
846 _tx_dbg0("in_wait bottom");
856 /* Anytime we've sent a character since
857 * the last time we flushed, we'll need
858 * to send a packet -- the only other time
859 * we would send a packet is when that
860 * packet was full, in which case we now
861 * want to send an empty packet
863 ao_arch_block_interrupts();
864 while (!ao_usb_in_flushed) {
865 _tx_dbg0("flush top");
867 _tx_dbg0("flush end");
869 ao_arch_release_interrupts();
873 ao_usb_putchar(char c)
878 ao_arch_block_interrupts();
881 ao_usb_in_flushed = 0;
882 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
884 /* Send the packet when full */
885 if (ao_usb_tx_count == AO_USB_IN_SIZE) {
886 _tx_dbg0("putchar full");
888 _tx_dbg0("putchar flushed");
890 ao_arch_release_interrupts();
894 _ao_usb_out_recv(void)
896 _rx_dbg0("out_recv top");
897 ao_usb_out_avail = 0;
899 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
901 _rx_dbg1("out_recv count", ao_usb_rx_count);
902 debug ("recv %d\n", ao_usb_rx_count);
903 debug_data("Fill OUT len %d:", ao_usb_rx_count);
904 ao_usb_read(ao_usb_rx_buffer, ao_usb_out_rx_buffer, 0, ao_usb_rx_count);
909 _ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
913 _ao_usb_pollchar(void)
918 return AO_READ_AGAIN;
921 if (ao_usb_rx_pos != ao_usb_rx_count)
924 _rx_dbg0("poll check");
925 /* Check to see if a packet has arrived */
926 if (!ao_usb_out_avail) {
927 _rx_dbg0("poll none");
928 return AO_READ_AGAIN;
933 /* Pull a character out of the fifo */
934 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
943 ao_arch_block_interrupts();
944 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
945 ao_sleep(AO_USB_OUT_SLEEP_ADDR);
946 ao_arch_release_interrupts();
953 ao_arch_block_interrupts();
954 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
957 /* Disable USB pull-up */
958 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
960 /* Switch off the device */
961 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
963 /* Disable the interface */
964 stm_rcc.apb1enr &= ~(1 << STM_RCC_APB1ENR_USBEN);
965 ao_arch_release_interrupts();
974 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGEN);
976 /* Disable USB pull-up */
977 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
979 /* Enable USB device */
980 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
982 /* Do not touch the GPIOA configuration; USB takes priority
983 * over GPIO on pins A11 and A12, but if you select alternate
984 * input 10 (the documented correct selection), then USB is
985 * pulled low and doesn't work at all
988 ao_arch_block_interrupts();
990 /* Route interrupts */
991 stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
992 stm_nvic_set_enable(STM_ISR_USB_LP_POS);
994 ao_usb_configuration = 0;
996 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
998 /* Clear the power down bit */
1001 /* Clear any spurious interrupts */
1004 debug ("ao_usb_enable\n");
1006 /* Enable interrupts */
1007 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
1008 (0 << STM_USB_CNTR_PMAOVRM) |
1009 (0 << STM_USB_CNTR_ERRM) |
1010 (0 << STM_USB_CNTR_WKUPM) |
1011 (0 << STM_USB_CNTR_SUSPM) |
1012 (1 << STM_USB_CNTR_RESETM) |
1013 (0 << STM_USB_CNTR_SOFM) |
1014 (0 << STM_USB_CNTR_ESOFM) |
1015 (0 << STM_USB_CNTR_RESUME) |
1016 (0 << STM_USB_CNTR_FSUSP) |
1017 (0 << STM_USB_CNTR_LP_MODE) |
1018 (0 << STM_USB_CNTR_PDWN) |
1019 (0 << STM_USB_CNTR_FRES));
1021 ao_arch_release_interrupts();
1023 for (t = 0; t < 1000; t++)
1025 /* Enable USB pull-up */
1026 stm_syscfg.pmc |= (1 << STM_SYSCFG_PMC_USB_PU);
1030 struct ao_task ao_usb_echo_task;
1038 c = ao_usb_getchar();
1049 printf ("control: %d out: %d in: %d int: %d reset: %d\n",
1050 control_count, out_count, in_count, int_count, reset_count);
1053 __code struct ao_cmds ao_usb_cmds[] = {
1054 { ao_usb_irq, "I\0Show USB interrupt counts" },
1064 debug ("ao_usb_init\n");
1065 ao_usb_ep0_state = AO_USB_EP0_IDLE;
1067 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1070 ao_cmd_register(&ao_usb_cmds[0]);
1074 ao_add_stdio(_ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);
1079 #if TX_DBG || RX_DBG
1089 uint32_t in_pending;
1091 uint32_t in_flushed;
1101 #define NUM_USB_DBG 128
1103 static struct ao_usb_dbg dbg[128];
1106 static void _dbg(int line, char *msg, uint32_t value)
1109 dbg[dbg_i].line = line;
1110 dbg[dbg_i].msg = msg;
1111 dbg[dbg_i].value = value;
1112 asm("mrs %0,primask" : "=&r" (primask));
1113 dbg[dbg_i].primask = primask;
1115 dbg[dbg_i].in_count = in_count;
1116 dbg[dbg_i].in_epr = stm_usb.epr[AO_USB_IN_EPR];
1117 dbg[dbg_i].in_pending = ao_usb_in_pending;
1118 dbg[dbg_i].tx_count = ao_usb_tx_count;
1119 dbg[dbg_i].in_flushed = ao_usb_in_flushed;
1122 dbg[dbg_i].rx_count = ao_usb_rx_count;
1123 dbg[dbg_i].rx_pos = ao_usb_rx_pos;
1124 dbg[dbg_i].out_avail = ao_usb_out_avail;
1125 dbg[dbg_i].out_epr = stm_usb.epr[AO_USB_OUT_EPR];
1127 if (++dbg_i == NUM_USB_DBG)