2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
30 _ao_usart_tx_start(struct ao_stm_usart *usart)
32 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
34 usart->tx_started = 1;
35 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
47 if (sr & (1 << STM_USART_SR_RXNE)) {
48 char c = usart->reg->dr;
49 if (!ao_fifo_full(usart->rx_fifo))
50 ao_fifo_insert(usart->rx_fifo, c);
51 ao_wakeup(&usart->rx_fifo);
53 ao_wakeup(&ao_stdin_ready);
55 if (sr & (1 << STM_USART_SR_TC)) {
56 usart->tx_started = 0;
57 _ao_usart_tx_start(usart);
58 ao_wakeup(&usart->tx_fifo);
63 ao_usart_getchar(struct ao_stm_usart *usart)
66 ao_arch_block_interrupts();
67 while (ao_fifo_empty(usart->rx_fifo))
68 ao_sleep(&usart->rx_fifo);
69 ao_fifo_remove(usart->rx_fifo, c);
70 ao_arch_release_interrupts();
75 ao_usart_pollchar(struct ao_stm_usart *usart)
79 ao_arch_block_interrupts();
80 if (ao_fifo_empty(usart->rx_fifo))
84 ao_fifo_remove(usart->rx_fifo,u);
87 ao_arch_release_interrupts();
92 ao_usart_putchar(struct ao_stm_usart *usart, char c)
94 ao_arch_block_interrupts();
95 while (ao_fifo_full(usart->tx_fifo))
96 ao_sleep(&usart->tx_fifo);
97 ao_fifo_insert(usart->tx_fifo, c);
98 _ao_usart_tx_start(usart);
99 ao_arch_release_interrupts();
103 ao_usart_drain(struct ao_stm_usart *usart)
105 ao_arch_block_interrupts();
106 while (!ao_fifo_empty(usart->tx_fifo))
107 ao_sleep(&usart->tx_fifo);
108 ao_arch_release_interrupts();
111 static const struct {
113 } ao_usart_speeds[] = {
114 [AO_SERIAL_SPEED_4800] = {
117 [AO_SERIAL_SPEED_9600] = {
120 [AO_SERIAL_SPEED_19200] = {
123 [AO_SERIAL_SPEED_57600] = {
126 [AO_SERIAL_SPEED_115200] = {
132 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
134 if (speed > AO_SERIAL_SPEED_115200)
136 usart->reg->brr = ao_usart_speeds[speed].brr;
140 ao_usart_init(struct ao_stm_usart *usart)
142 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
143 (1 << STM_USART_CR1_UE) |
144 (0 << STM_USART_CR1_M) |
145 (0 << STM_USART_CR1_WAKE) |
146 (0 << STM_USART_CR1_PCE) |
147 (0 << STM_USART_CR1_PS) |
148 (0 << STM_USART_CR1_PEIE) |
149 (0 << STM_USART_CR1_TXEIE) |
150 (1 << STM_USART_CR1_TCIE) |
151 (1 << STM_USART_CR1_RXNEIE) |
152 (0 << STM_USART_CR1_IDLEIE) |
153 (1 << STM_USART_CR1_TE) |
154 (1 << STM_USART_CR1_RE) |
155 (0 << STM_USART_CR1_RWU) |
156 (0 << STM_USART_CR1_SBK));
158 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
159 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
160 (0 << STM_USART_CR2_CLKEN) |
161 (0 << STM_USART_CR2_CPOL) |
162 (0 << STM_USART_CR2_CPHA) |
163 (0 << STM_USART_CR2_LBCL) |
164 (0 << STM_USART_CR2_LBDIE) |
165 (0 << STM_USART_CR2_LBDL) |
166 (0 << STM_USART_CR2_ADD));
168 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
169 (0 << STM_USART_CR3_CTSIE) |
170 (0 << STM_USART_CR3_CTSE) |
171 (0 << STM_USART_CR3_RTSE) |
172 (0 << STM_USART_CR3_DMAT) |
173 (0 << STM_USART_CR3_DMAR) |
174 (0 << STM_USART_CR3_SCEN) |
175 (0 << STM_USART_CR3_NACK) |
176 (0 << STM_USART_CR3_HDSEL) |
177 (0 << STM_USART_CR3_IRLP) |
178 (0 << STM_USART_CR3_IREN) |
179 (0 << STM_USART_CR3_EIE));
181 /* Pick a 9600 baud rate */
182 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
187 struct ao_stm_usart ao_stm_usart1;
189 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
192 ao_serial1_getchar(void)
194 return ao_usart_getchar(&ao_stm_usart1);
198 ao_serial1_putchar(char c)
200 ao_usart_putchar(&ao_stm_usart1, c);
204 ao_serial1_pollchar(void)
206 return ao_usart_pollchar(&ao_stm_usart1);
210 ao_serial1_set_speed(uint8_t speed)
212 ao_usart_set_speed(&ao_stm_usart1, speed);
214 #endif /* HAS_SERIAL_1 */
218 struct ao_stm_usart ao_stm_usart2;
220 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
223 ao_serial2_getchar(void)
225 return ao_usart_getchar(&ao_stm_usart2);
229 ao_serial2_putchar(char c)
231 ao_usart_putchar(&ao_stm_usart2, c);
235 ao_serial2_pollchar(void)
237 return ao_usart_pollchar(&ao_stm_usart2);
241 ao_serial2_set_speed(uint8_t speed)
243 ao_usart_set_speed(&ao_stm_usart2, speed);
245 #endif /* HAS_SERIAL_2 */
249 struct ao_stm_usart ao_stm_usart3;
251 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
254 ao_serial3_getchar(void)
256 return ao_usart_getchar(&ao_stm_usart3);
260 ao_serial3_putchar(char c)
262 ao_usart_putchar(&ao_stm_usart3, c);
266 ao_serial3_pollchar(void)
268 return ao_usart_pollchar(&ao_stm_usart3);
272 ao_serial3_set_speed(uint8_t speed)
274 ao_usart_set_speed(&ao_stm_usart3, speed);
276 #endif /* HAS_SERIAL_3 */
288 #if SERIAL_1_PA9_PA10
289 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
291 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
292 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
295 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
297 stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
298 stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
300 #error "No SERIAL_1 port configuration specified"
304 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
306 ao_stm_usart1.reg = &stm_usart1;
307 ao_usart_init(&ao_stm_usart1);
309 stm_nvic_set_enable(STM_ISR_USART1_POS);
310 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
311 #if USE_SERIAL_1_STDIN
312 ao_add_stdio(ao_serial1_pollchar,
326 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
328 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
329 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
332 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
334 stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
335 stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
337 #error "No SERIAL_2 port configuration specified"
341 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
343 ao_stm_usart2.reg = &stm_usart2;
344 ao_usart_init(&ao_stm_usart2);
346 stm_nvic_set_enable(STM_ISR_USART2_POS);
347 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
348 #if USE_SERIAL_2_STDIN
349 ao_add_stdio(ao_serial2_pollchar,
362 #if SERIAL_3_PB10_PB11
363 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
365 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
366 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
368 #if SERIAL_3_PC10_PC11
369 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
371 stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
372 stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
375 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
377 stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
378 stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
380 #error "No SERIAL_3 port configuration specified"
385 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
387 ao_stm_usart3.reg = &stm_usart3;
388 ao_usart_init(&ao_stm_usart3);
390 stm_nvic_set_enable(STM_ISR_USART3_POS);
391 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
392 #if USE_SERIAL_3_STDIN
393 ao_add_stdio(ao_serial3_pollchar,