2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
30 _ao_usart_tx_start(struct ao_stm_usart *usart)
32 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
34 usart->tx_started = 1;
35 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
47 if (sr & (1 << STM_USART_SR_RXNE)) {
48 char c = usart->reg->dr;
49 if (!ao_fifo_full(usart->rx_fifo))
50 ao_fifo_insert(usart->rx_fifo, c);
51 ao_wakeup(&usart->rx_fifo);
53 ao_wakeup(&ao_stdin_ready);
55 if (sr & (1 << STM_USART_SR_TC)) {
56 usart->tx_started = 0;
57 _ao_usart_tx_start(usart);
58 ao_wakeup(&usart->tx_fifo);
63 _ao_usart_pollchar(struct ao_stm_usart *usart)
67 if (ao_fifo_empty(usart->rx_fifo))
71 ao_fifo_remove(usart->rx_fifo,u);
78 ao_usart_getchar(struct ao_stm_usart *usart)
81 ao_arch_block_interrupts();
82 while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
83 ao_sleep(&usart->rx_fifo);
84 ao_arch_release_interrupts();
89 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
91 return ao_sleep_for(&usart->rx_fifo, timeout);
95 ao_usart_putchar(struct ao_stm_usart *usart, char c)
97 ao_arch_block_interrupts();
98 while (ao_fifo_full(usart->tx_fifo))
99 ao_sleep(&usart->tx_fifo);
100 ao_fifo_insert(usart->tx_fifo, c);
101 _ao_usart_tx_start(usart);
102 ao_arch_release_interrupts();
106 ao_usart_drain(struct ao_stm_usart *usart)
108 ao_arch_block_interrupts();
109 while (!ao_fifo_empty(usart->tx_fifo))
110 ao_sleep(&usart->tx_fifo);
111 ao_arch_release_interrupts();
114 static const struct {
116 } ao_usart_speeds[] = {
117 [AO_SERIAL_SPEED_4800] = {
120 [AO_SERIAL_SPEED_9600] = {
123 [AO_SERIAL_SPEED_19200] = {
126 [AO_SERIAL_SPEED_57600] = {
129 [AO_SERIAL_SPEED_115200] = {
135 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
137 if (speed > AO_SERIAL_SPEED_115200)
139 usart->reg->brr = ao_usart_speeds[speed].brr;
143 ao_usart_init(struct ao_stm_usart *usart)
145 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
146 (1 << STM_USART_CR1_UE) |
147 (0 << STM_USART_CR1_M) |
148 (0 << STM_USART_CR1_WAKE) |
149 (0 << STM_USART_CR1_PCE) |
150 (0 << STM_USART_CR1_PS) |
151 (0 << STM_USART_CR1_PEIE) |
152 (0 << STM_USART_CR1_TXEIE) |
153 (1 << STM_USART_CR1_TCIE) |
154 (1 << STM_USART_CR1_RXNEIE) |
155 (0 << STM_USART_CR1_IDLEIE) |
156 (1 << STM_USART_CR1_TE) |
157 (1 << STM_USART_CR1_RE) |
158 (0 << STM_USART_CR1_RWU) |
159 (0 << STM_USART_CR1_SBK));
161 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
162 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
163 (0 << STM_USART_CR2_CLKEN) |
164 (0 << STM_USART_CR2_CPOL) |
165 (0 << STM_USART_CR2_CPHA) |
166 (0 << STM_USART_CR2_LBCL) |
167 (0 << STM_USART_CR2_LBDIE) |
168 (0 << STM_USART_CR2_LBDL) |
169 (0 << STM_USART_CR2_ADD));
171 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
172 (0 << STM_USART_CR3_CTSIE) |
173 (0 << STM_USART_CR3_CTSE) |
174 (0 << STM_USART_CR3_RTSE) |
175 (0 << STM_USART_CR3_DMAT) |
176 (0 << STM_USART_CR3_DMAR) |
177 (0 << STM_USART_CR3_SCEN) |
178 (0 << STM_USART_CR3_NACK) |
179 (0 << STM_USART_CR3_HDSEL) |
180 (0 << STM_USART_CR3_IRLP) |
181 (0 << STM_USART_CR3_IREN) |
182 (0 << STM_USART_CR3_EIE));
184 /* Pick a 9600 baud rate */
185 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
189 ao_usart_set_flow(struct ao_stm_usart *usart)
191 usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
192 (1 << STM_USART_CR3_RTSE));
197 struct ao_stm_usart ao_stm_usart1;
199 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
202 ao_serial1_getchar(void)
204 return ao_usart_getchar(&ao_stm_usart1);
208 ao_serial1_putchar(char c)
210 ao_usart_putchar(&ao_stm_usart1, c);
214 _ao_serial1_pollchar(void)
216 return _ao_usart_pollchar(&ao_stm_usart1);
220 _ao_serial1_sleep_for(uint16_t timeout)
222 return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
226 ao_serial1_drain(void)
228 ao_usart_drain(&ao_stm_usart1);
232 ao_serial1_set_speed(uint8_t speed)
234 ao_usart_set_speed(&ao_stm_usart1, speed);
236 #endif /* HAS_SERIAL_1 */
240 struct ao_stm_usart ao_stm_usart2;
242 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
245 ao_serial2_getchar(void)
247 return ao_usart_getchar(&ao_stm_usart2);
251 ao_serial2_putchar(char c)
253 ao_usart_putchar(&ao_stm_usart2, c);
257 _ao_serial2_pollchar(void)
259 return _ao_usart_pollchar(&ao_stm_usart2);
263 _ao_serial2_sleep_for(uint16_t timeout)
265 return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
269 ao_serial2_drain(void)
271 ao_usart_drain(&ao_stm_usart2);
275 ao_serial2_set_speed(uint8_t speed)
277 ao_usart_set_speed(&ao_stm_usart2, speed);
279 #endif /* HAS_SERIAL_2 */
283 struct ao_stm_usart ao_stm_usart3;
285 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
288 ao_serial3_getchar(void)
290 return ao_usart_getchar(&ao_stm_usart3);
294 ao_serial3_putchar(char c)
296 ao_usart_putchar(&ao_stm_usart3, c);
300 _ao_serial3_pollchar(void)
302 return _ao_usart_pollchar(&ao_stm_usart3);
306 _ao_serial3_sleep_for(uint16_t timeout)
308 return _ao_usart_sleep_for(&ao_stm_usart3, timeout);
312 ao_serial3_set_speed(uint8_t speed)
314 ao_usart_set_speed(&ao_stm_usart3, speed);
316 #endif /* HAS_SERIAL_3 */
328 #if SERIAL_1_PA9_PA10
329 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
331 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
332 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
335 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
337 stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
338 stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
340 #error "No SERIAL_1 port configuration specified"
344 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
346 ao_stm_usart1.reg = &stm_usart1;
347 ao_usart_init(&ao_stm_usart1);
349 stm_nvic_set_enable(STM_ISR_USART1_POS);
350 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
351 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
352 ao_add_stdio(_ao_serial1_pollchar,
366 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
368 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
369 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
370 #if USE_SERIAL_2_FLOW
371 stm_afr_set(&stm_gpioa, 0, STM_AFR_AF7);
372 stm_afr_set(&stm_gpioa, 1, STM_AFR_AF7);
376 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
378 stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
379 stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
380 #if USE_SERIAL_2_FLOW
381 #error "Don't know how to set flowcontrol for serial 2 on PD"
384 #error "No SERIAL_2 port configuration specified"
388 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
390 ao_stm_usart2.reg = &stm_usart2;
391 ao_usart_init(&ao_stm_usart2);
392 #if USE_SERIAL_2_FLOW
393 ao_usart_set_flow(&ao_stm_usart2);
396 stm_nvic_set_enable(STM_ISR_USART2_POS);
397 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
398 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
399 ao_add_stdio(_ao_serial2_pollchar,
412 #if SERIAL_3_PB10_PB11
413 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
415 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
416 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
418 #if SERIAL_3_PC10_PC11
419 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
421 stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
422 stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
425 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
427 stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
428 stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
430 #error "No SERIAL_3 port configuration specified"
435 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
437 ao_stm_usart3.reg = &stm_usart3;
438 ao_usart_init(&ao_stm_usart3);
440 stm_nvic_set_enable(STM_ISR_USART3_POS);
441 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
442 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
443 ao_add_stdio(_ao_serial3_pollchar,