2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 struct ao_fifo rx_fifo;
22 struct ao_fifo tx_fifo;
23 struct stm_usart *reg;
32 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
37 ao_usart_tx_start(struct ao_stm_usart *usart)
39 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
41 usart->tx_started = 1;
42 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
47 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
54 if (sr & (1 << STM_USART_SR_RXNE)) {
55 char c = usart->reg->dr;
56 if (!ao_fifo_full(usart->rx_fifo))
57 ao_fifo_insert(usart->rx_fifo, c);
58 ao_wakeup(&usart->rx_fifo);
60 ao_wakeup(&ao_stdin_ready);
62 if (sr & (1 << STM_USART_SR_TC)) {
63 usart->tx_started = 0;
64 ao_usart_tx_start(usart);
65 ao_wakeup(&usart->tx_fifo);
70 ao_usart_getchar(struct ao_stm_usart *usart)
74 while (ao_fifo_empty(usart->rx_fifo))
75 ao_sleep(&usart->rx_fifo);
76 ao_fifo_remove(usart->rx_fifo, c);
82 ao_usart_pollchar(struct ao_stm_usart *usart)
86 if (ao_fifo_empty(usart->rx_fifo)) {
90 ao_fifo_remove(usart->rx_fifo,c);
96 ao_usart_putchar(struct ao_stm_usart *usart, char c)
99 while (ao_fifo_full(usart->tx_fifo))
100 ao_sleep(&usart->tx_fifo);
101 ao_fifo_insert(usart->tx_fifo, c);
102 ao_usart_tx_start(usart);
107 ao_usart_drain(struct ao_stm_usart *usart)
110 while (!ao_fifo_empty(usart->tx_fifo))
111 ao_sleep(&usart->tx_fifo);
115 static const struct {
117 } ao_usart_speeds[] = {
118 [AO_SERIAL_SPEED_4800] = {
121 [AO_SERIAL_SPEED_9600] = {
124 [AO_SERIAL_SPEED_19200] = {
127 [AO_SERIAL_SPEED_57600] = {
133 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
135 if (speed > AO_SERIAL_SPEED_57600)
137 usart->reg->brr = ao_usart_speeds[speed].brr;
141 ao_usart_init(struct ao_stm_usart *usart)
143 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
144 (1 << STM_USART_CR1_UE) |
145 (0 << STM_USART_CR1_M) |
146 (0 << STM_USART_CR1_WAKE) |
147 (0 << STM_USART_CR1_PCE) |
148 (0 << STM_USART_CR1_PS) |
149 (0 << STM_USART_CR1_PEIE) |
150 (0 << STM_USART_CR1_TXEIE) |
151 (1 << STM_USART_CR1_TCIE) |
152 (1 << STM_USART_CR1_RXNEIE) |
153 (0 << STM_USART_CR1_IDLEIE) |
154 (1 << STM_USART_CR1_TE) |
155 (1 << STM_USART_CR1_RE) |
156 (0 << STM_USART_CR1_RWU) |
157 (0 << STM_USART_CR1_SBK));
159 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
160 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
161 (0 << STM_USART_CR2_CLKEN) |
162 (0 << STM_USART_CR2_CPOL) |
163 (0 << STM_USART_CR2_CPHA) |
164 (0 << STM_USART_CR2_LBCL) |
165 (0 << STM_USART_CR2_LBDIE) |
166 (0 << STM_USART_CR2_LBDL) |
167 (0 << STM_USART_CR2_ADD));
169 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
170 (0 << STM_USART_CR3_CTSIE) |
171 (0 << STM_USART_CR3_CTSE) |
172 (0 << STM_USART_CR3_RTSE) |
173 (0 << STM_USART_CR3_DMAT) |
174 (0 << STM_USART_CR3_DMAR) |
175 (0 << STM_USART_CR3_SCEN) |
176 (0 << STM_USART_CR3_NACK) |
177 (0 << STM_USART_CR3_HDSEL) |
178 (0 << STM_USART_CR3_IRLP) |
179 (0 << STM_USART_CR3_IREN) |
180 (0 << STM_USART_CR3_EIE));
182 /* Pick a 9600 baud rate */
183 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
188 struct ao_stm_usart ao_stm_usart1;
190 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
193 ao_serial1_getchar(void)
195 return ao_usart_getchar(&ao_stm_usart1);
199 ao_serial1_putchar(char c)
201 ao_usart_putchar(&ao_stm_usart1, c);
205 ao_serial1_pollchar(void)
207 return ao_usart_pollchar(&ao_stm_usart1);
211 ao_serial1_set_speed(uint8_t speed)
213 ao_usart_set_speed(&ao_stm_usart1, speed);
215 #endif /* HAS_SERIAL_1 */
219 struct ao_stm_usart ao_stm_usart2;
221 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
224 ao_serial2_getchar(void)
226 return ao_usart_getchar(&ao_stm_usart2);
230 ao_serial2_putchar(char c)
232 ao_usart_putchar(&ao_stm_usart2, c);
236 ao_serial2_pollchar(void)
238 return ao_usart_pollchar(&ao_stm_usart2);
242 ao_serial2_set_speed(uint8_t speed)
244 ao_usart_set_speed(&ao_stm_usart2, speed);
246 #endif /* HAS_SERIAL_2 */
250 struct ao_stm_usart ao_stm_usart3;
252 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
255 ao_serial3_getchar(void)
257 return ao_usart_getchar(&ao_stm_usart3);
261 ao_serial3_putchar(char c)
263 ao_usart_putchar(&ao_stm_usart3, c);
267 ao_serial3_pollchar(void)
269 return ao_usart_pollchar(&ao_stm_usart3);
273 ao_serial3_set_speed(uint8_t speed)
275 ao_usart_set_speed(&ao_stm_usart3, speed);
277 #endif /* HAS_SERIAL_3 */
289 #if SERIAL_1_PA9_PA10
290 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
292 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
293 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
296 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
298 stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
299 stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
301 #error "No SERIAL_1 port configuration specified"
305 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
307 ao_stm_usart1.reg = &stm_usart1;
308 ao_usart_init(&ao_stm_usart1);
310 stm_nvic_set_enable(STM_ISR_USART1_POS);
311 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
312 #if USE_SERIAL_1_STDIN
313 ao_add_stdio(ao_serial1_pollchar,
327 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
329 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
330 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
333 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
335 stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
336 stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
338 #error "No SERIAL_2 port configuration specified"
342 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
344 ao_stm_usart2.reg = &stm_usart2;
345 ao_usart_init(&ao_stm_usart2);
347 stm_nvic_set_enable(STM_ISR_USART2_POS);
348 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
349 #if USE_SERIAL_2_STDIN
350 ao_add_stdio(ao_serial2_pollchar,
363 #if SERIAL_3_PB10_PB11
364 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
366 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
367 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
369 #if SERIAL_3_PC10_PC11
370 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
372 stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
373 stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
376 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
378 stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
379 stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
381 #error "No SERIAL_3 port configuration specified"
386 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
388 ao_stm_usart3.reg = &stm_usart3;
389 ao_usart_init(&ao_stm_usart3);
391 stm_nvic_set_enable(STM_ISR_USART3_POS);
392 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
393 #if USE_SERIAL_3_STDIN
394 ao_add_stdio(ao_serial3_pollchar,