2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
30 _ao_usart_tx_start(struct ao_stm_usart *usart)
32 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
34 usart->tx_started = 1;
35 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
47 if (sr & (1 << STM_USART_SR_RXNE)) {
48 char c = usart->reg->dr;
49 if (!ao_fifo_full(usart->rx_fifo))
50 ao_fifo_insert(usart->rx_fifo, c);
51 ao_wakeup(&usart->rx_fifo);
53 ao_wakeup(&ao_stdin_ready);
55 if (sr & (1 << STM_USART_SR_TC)) {
56 usart->tx_started = 0;
57 _ao_usart_tx_start(usart);
58 ao_wakeup(&usart->tx_fifo);
63 _ao_usart_pollchar(struct ao_stm_usart *usart)
67 if (ao_fifo_empty(usart->rx_fifo))
71 ao_fifo_remove(usart->rx_fifo,u);
78 ao_usart_getchar(struct ao_stm_usart *usart)
81 ao_arch_block_interrupts();
82 while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
83 ao_sleep(&usart->rx_fifo);
84 ao_arch_release_interrupts();
89 ao_usart_putchar(struct ao_stm_usart *usart, char c)
91 ao_arch_block_interrupts();
92 while (ao_fifo_full(usart->tx_fifo))
93 ao_sleep(&usart->tx_fifo);
94 ao_fifo_insert(usart->tx_fifo, c);
95 _ao_usart_tx_start(usart);
96 ao_arch_release_interrupts();
100 ao_usart_drain(struct ao_stm_usart *usart)
102 ao_arch_block_interrupts();
103 while (!ao_fifo_empty(usart->tx_fifo))
104 ao_sleep(&usart->tx_fifo);
105 ao_arch_release_interrupts();
108 static const struct {
110 } ao_usart_speeds[] = {
111 [AO_SERIAL_SPEED_4800] = {
114 [AO_SERIAL_SPEED_9600] = {
117 [AO_SERIAL_SPEED_19200] = {
120 [AO_SERIAL_SPEED_57600] = {
123 [AO_SERIAL_SPEED_115200] = {
129 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
131 if (speed > AO_SERIAL_SPEED_115200)
133 usart->reg->brr = ao_usart_speeds[speed].brr;
137 ao_usart_init(struct ao_stm_usart *usart)
139 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
140 (1 << STM_USART_CR1_UE) |
141 (0 << STM_USART_CR1_M) |
142 (0 << STM_USART_CR1_WAKE) |
143 (0 << STM_USART_CR1_PCE) |
144 (0 << STM_USART_CR1_PS) |
145 (0 << STM_USART_CR1_PEIE) |
146 (0 << STM_USART_CR1_TXEIE) |
147 (1 << STM_USART_CR1_TCIE) |
148 (1 << STM_USART_CR1_RXNEIE) |
149 (0 << STM_USART_CR1_IDLEIE) |
150 (1 << STM_USART_CR1_TE) |
151 (1 << STM_USART_CR1_RE) |
152 (0 << STM_USART_CR1_RWU) |
153 (0 << STM_USART_CR1_SBK));
155 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
156 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
157 (0 << STM_USART_CR2_CLKEN) |
158 (0 << STM_USART_CR2_CPOL) |
159 (0 << STM_USART_CR2_CPHA) |
160 (0 << STM_USART_CR2_LBCL) |
161 (0 << STM_USART_CR2_LBDIE) |
162 (0 << STM_USART_CR2_LBDL) |
163 (0 << STM_USART_CR2_ADD));
165 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
166 (0 << STM_USART_CR3_CTSIE) |
167 (0 << STM_USART_CR3_CTSE) |
168 (0 << STM_USART_CR3_RTSE) |
169 (0 << STM_USART_CR3_DMAT) |
170 (0 << STM_USART_CR3_DMAR) |
171 (0 << STM_USART_CR3_SCEN) |
172 (0 << STM_USART_CR3_NACK) |
173 (0 << STM_USART_CR3_HDSEL) |
174 (0 << STM_USART_CR3_IRLP) |
175 (0 << STM_USART_CR3_IREN) |
176 (0 << STM_USART_CR3_EIE));
178 /* Pick a 9600 baud rate */
179 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
184 struct ao_stm_usart ao_stm_usart1;
186 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
189 ao_serial1_getchar(void)
191 return ao_usart_getchar(&ao_stm_usart1);
195 ao_serial1_putchar(char c)
197 ao_usart_putchar(&ao_stm_usart1, c);
201 _ao_serial1_pollchar(void)
203 return _ao_usart_pollchar(&ao_stm_usart1);
207 ao_serial1_set_speed(uint8_t speed)
209 ao_usart_set_speed(&ao_stm_usart1, speed);
211 #endif /* HAS_SERIAL_1 */
215 struct ao_stm_usart ao_stm_usart2;
217 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
220 ao_serial2_getchar(void)
222 return ao_usart_getchar(&ao_stm_usart2);
226 ao_serial2_putchar(char c)
228 ao_usart_putchar(&ao_stm_usart2, c);
232 _ao_serial2_pollchar(void)
234 return _ao_usart_pollchar(&ao_stm_usart2);
238 ao_serial2_set_speed(uint8_t speed)
240 ao_usart_set_speed(&ao_stm_usart2, speed);
242 #endif /* HAS_SERIAL_2 */
246 struct ao_stm_usart ao_stm_usart3;
248 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
251 ao_serial3_getchar(void)
253 return ao_usart_getchar(&ao_stm_usart3);
257 ao_serial3_putchar(char c)
259 ao_usart_putchar(&ao_stm_usart3, c);
263 _ao_serial3_pollchar(void)
265 return _ao_usart_pollchar(&ao_stm_usart3);
269 ao_serial3_set_speed(uint8_t speed)
271 ao_usart_set_speed(&ao_stm_usart3, speed);
273 #endif /* HAS_SERIAL_3 */
285 #if SERIAL_1_PA9_PA10
286 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
288 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
289 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
292 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
294 stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
295 stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
297 #error "No SERIAL_1 port configuration specified"
301 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
303 ao_stm_usart1.reg = &stm_usart1;
304 ao_usart_init(&ao_stm_usart1);
306 stm_nvic_set_enable(STM_ISR_USART1_POS);
307 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
308 #if USE_SERIAL_1_STDIN
309 ao_add_stdio(_ao_serial1_pollchar,
323 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
325 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
326 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
329 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
331 stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
332 stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
334 #error "No SERIAL_2 port configuration specified"
338 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
340 ao_stm_usart2.reg = &stm_usart2;
341 ao_usart_init(&ao_stm_usart2);
343 stm_nvic_set_enable(STM_ISR_USART2_POS);
344 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
345 #if USE_SERIAL_2_STDIN
346 ao_add_stdio(_ao_serial2_pollchar,
359 #if SERIAL_3_PB10_PB11
360 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
362 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
363 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
365 #if SERIAL_3_PC10_PC11
366 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
368 stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
369 stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
372 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
374 stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
375 stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
377 #error "No SERIAL_3 port configuration specified"
382 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
384 ao_stm_usart3.reg = &stm_usart3;
385 ao_usart_init(&ao_stm_usart3);
387 stm_nvic_set_enable(STM_ISR_USART3_POS);
388 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
389 #if USE_SERIAL_3_STDIN
390 ao_add_stdio(_ao_serial3_pollchar,