2 * Copyright © 2019 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
18 _ao_usart_tx_start(struct ao_samd21_usart *usart)
20 if (!ao_fifo_empty(usart->tx_fifo)) {
21 #if HAS_SERIAL_SW_FLOW
22 if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts, foo) == 1) {
23 ao_exti_enable(usart->gpio_cts, usart->pin_cts);
27 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_DRE))
29 usart->tx_running = 1;
30 usart->reg->intenset = (1 << SAMD21_SERCOM_INTFLAG_DRE) | (1 << SAMD21_SERCOM_INTFLAG_TXC);
31 ao_fifo_remove(usart->tx_fifo, usart->reg->data);
32 ao_wakeup(&usart->tx_fifo);
40 _ao_usart_rx(struct ao_samd21_usart *usart, int is_stdin)
42 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_RXC)) {
43 uint8_t data = (uint8_t) usart->reg->data;
44 if (!ao_fifo_full(usart->rx_fifo)) {
45 ao_fifo_insert(usart->rx_fifo, data);
46 ao_wakeup(&usart->rx_fifo);
48 ao_wakeup(&ao_stdin_ready);
49 #if HAS_SERIAL_SW_FLOW
50 /* If the fifo is nearly full, turn off RTS and wait
51 * for it to drain a bunch
53 if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
54 ao_gpio_set(usart->gpio_rts, usart->pin_rts, usart->pin_rts, 1);
63 ao_usart_isr(struct ao_samd21_usart *usart, int is_stdin)
65 _ao_usart_rx(usart, is_stdin);
67 if (!_ao_usart_tx_start(usart))
68 usart->reg->intenclr = (1 << SAMD21_SERCOM_INTFLAG_DRE);
70 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_TXC)) {
71 usart->tx_running = 0;
72 usart->reg->intenclr = (1 << SAMD21_SERCOM_INTFLAG_TXC);
73 if (usart->draining) {
75 ao_wakeup(&usart->tx_fifo);
80 static const uint32_t ao_usart_speeds[] = {
81 [AO_SERIAL_SPEED_4800] = 4800,
82 [AO_SERIAL_SPEED_9600] = 9600,
83 [AO_SERIAL_SPEED_19200] = 19200,
84 [AO_SERIAL_SPEED_57600] = 57600,
85 [AO_SERIAL_SPEED_115200] = 115200,
89 ao_usart_set_speed(struct ao_samd21_usart *usart, uint8_t speed)
91 struct samd21_sercom *reg = usart->reg;
92 uint64_t top = (uint64_t) ao_usart_speeds[speed] << (4 + 16);
93 uint16_t baud = (uint16_t) (65536 - (top + AO_SYSCLK/2) / AO_SYSCLK);
94 uint32_t ctrla = reg->ctrla;
96 if (ctrla & (1UL << SAMD21_SERCOM_CTRLA_ENABLE)) {
97 usart->reg->ctrla = ctrla & ~(1UL << SAMD21_SERCOM_CTRLA_ENABLE);
98 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
101 usart->reg->baud = baud;
102 if (ctrla & (1UL << SAMD21_SERCOM_CTRLA_ENABLE)) {
103 usart->reg->ctrla = ctrla;
104 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
110 ao_usart_init(struct ao_samd21_usart *usart, bool hw_flow, uint8_t id, uint8_t txpo, uint8_t rxpo)
112 struct samd21_sercom *reg = usart->reg;
116 /* Send a clock along */
117 samd21_gclk_clkctrl(0, SAMD21_GCLK_CLKCTRL_ID_SERCOM0_CORE + id);
119 samd21_nvic_set_enable(SAMD21_NVIC_ISR_SERCOM0_POS + id);
120 samd21_nvic_set_priority(SAMD21_NVIC_ISR_SERCOM0_POS + id, 4);
123 samd21_pm.apbcmask |= (1 << (SAMD21_PM_APBCMASK_SERCOM0 + id));
126 reg->ctrla = (1 << SAMD21_SERCOM_CTRLA_SWRST);
128 while ((reg->ctrla & (1 << SAMD21_SERCOM_CTRLA_SWRST)) ||
129 (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_SWRST)))
132 reg->ctrlb = ((0 << SAMD21_SERCOM_CTRLB_CHSIZE) |
133 (0 << SAMD21_SERCOM_CTRLB_SBMODE) |
134 (0 << SAMD21_SERCOM_CTRLB_COLDEN) |
135 (0 << SAMD21_SERCOM_CTRLB_SFDE) |
136 (0 << SAMD21_SERCOM_CTRLB_ENC) |
137 (0 << SAMD21_SERCOM_CTRLB_PMODE) |
138 (1 << SAMD21_SERCOM_CTRLB_TXEN) |
139 (1 << SAMD21_SERCOM_CTRLB_RXEN) |
140 (3 << SAMD21_SERCOM_CTRLB_FIFOCLR));
142 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
144 /* finish setup and enable the hardware */
145 reg->ctrla = ((0 << SAMD21_SERCOM_CTRLA_SWRST) |
146 (1 << SAMD21_SERCOM_CTRLA_ENABLE) |
147 (1 << SAMD21_SERCOM_CTRLA_MODE) |
148 (1 << SAMD21_SERCOM_CTRLA_RUNSTDBY) |
149 (0 << SAMD21_SERCOM_CTRLA_IBON) |
150 (0 << SAMD21_SERCOM_CTRLA_SAMPR) |
151 (txpo << SAMD21_SERCOM_CTRLA_TXPO) | /* pad[2] */
152 (rxpo << SAMD21_SERCOM_CTRLA_RXPO) | /* pad[3] */
153 (0 << SAMD21_SERCOM_CTRLA_SAMPA) |
154 (0 << SAMD21_SERCOM_CTRLA_FORM) | /* no parity */
155 (0 << SAMD21_SERCOM_CTRLA_CMODE) | /* async */
156 (0 << SAMD21_SERCOM_CTRLA_CPOL) |
157 (1 << SAMD21_SERCOM_CTRLA_DORD)); /* LSB first */
159 /* Enable receive interrupt */
160 reg->intenset = (1 << SAMD21_SERCOM_INTFLAG_RXC);
162 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
168 _ao_usart_pollchar(struct ao_samd21_usart *usart)
172 if (ao_fifo_empty(usart->rx_fifo))
176 ao_fifo_remove(usart->rx_fifo, u);
177 #if HAS_SERIAL_SW_FLOW
178 /* If we've cleared RTS, check if there's space now and turn it back on */
179 if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
180 ao_gpio_set(usart->gpio_rts, usart->pin_rts, foo, 0);
190 ao_usart_getchar(struct ao_samd21_usart *usart)
193 ao_arch_block_interrupts();
194 while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
195 ao_sleep(&usart->rx_fifo);
196 ao_arch_release_interrupts();
201 ao_usart_putchar(struct ao_samd21_usart *usart, char c)
203 ao_arch_block_interrupts();
204 while (ao_fifo_full(usart->tx_fifo))
205 ao_sleep(&usart->tx_fifo);
206 ao_fifo_insert(usart->tx_fifo, c);
207 _ao_usart_tx_start(usart);
208 ao_arch_release_interrupts();
212 ao_usart_drain(struct ao_samd21_usart *usart)
214 ao_arch_block_interrupts();
215 while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
217 ao_sleep(&usart->tx_fifo);
219 ao_arch_release_interrupts();
224 struct ao_samd21_usart ao_samd21_usart0;
226 void samd21_sercom0_isr(void) { ao_usart_isr(&ao_samd21_usart0, USE_SERIAL_0_STDIN); }
229 ao_serial0_getchar(void)
231 return ao_usart_getchar(&ao_samd21_usart0);
235 ao_serial0_putchar(char c)
237 ao_usart_putchar(&ao_samd21_usart0, c);
241 _ao_serial0_pollchar(void)
243 return _ao_usart_pollchar(&ao_samd21_usart0);
247 ao_serial0_drain(void)
249 ao_usart_drain(&ao_samd21_usart0);
253 ao_serial0_set_speed(uint8_t speed)
255 ao_usart_drain(&ao_samd21_usart0);
256 ao_usart_set_speed(&ao_samd21_usart0, speed);
258 #endif /* HAS_SERIAL_0 */
262 struct ao_samd21_usart ao_samd21_usart1;
264 void samd21_sercom1_isr(void) { ao_usart_isr(&ao_samd21_usart1, USE_SERIAL_1_STDIN); }
267 ao_serial1_getchar(void)
269 return ao_usart_getchar(&ao_samd21_usart1);
273 ao_serial1_putchar(char c)
275 ao_usart_putchar(&ao_samd21_usart1, c);
279 _ao_serial1_pollchar(void)
281 return _ao_usart_pollchar(&ao_samd21_usart1);
285 ao_serial1_drain(void)
287 ao_usart_drain(&ao_samd21_usart1);
291 ao_serial1_set_speed(uint8_t speed)
293 ao_usart_drain(&ao_samd21_usart1);
294 ao_usart_set_speed(&ao_samd21_usart1, speed);
296 #endif /* HAS_SERIAL_1 */
304 #if SERIAL_0_PA10_PA11
306 ao_enable_port(&samd21_port_a);
307 samd21_port_pmux_set(&samd21_port_a, 10, SAMD21_PORT_PMUX_FUNC_C);
308 samd21_port_pmux_set(&samd21_port_a, 11, SAMD21_PORT_PMUX_FUNC_C);
309 txpo = SAMD21_SERCOM_CTRLA_TXPO_TX_2; /* pad 2 */
310 rxpo = SAMD21_SERCOM_CTRLA_RXPO_RX_3; /* pad 3 */
311 #elif SERIAL_0_PA08_PA09
313 ao_enable_port(&samd21_port_a);
314 samd21_port_pmux_set(&samd21_port_a, 8, SAMD21_PORT_PMUX_FUNC_C);
315 samd21_port_pmux_set(&samd21_port_a, 9, SAMD21_PORT_PMUX_FUNC_C);
316 txpo = SAMD21_SERCOM_CTRLA_TXPO_TX_0; /* pad 0 */
317 rxpo = SAMD21_SERCOM_CTRLA_RXPO_RX_1; /* pad 1 */
319 #error "No SERIAL_0 port configuration specified"
322 ao_samd21_usart0.reg = &samd21_sercom0;
323 ao_usart_init(&ao_samd21_usart0, 0, 0, txpo, rxpo);
325 #if USE_SERIAL_0_STDIN
326 ao_add_stdio(_ao_serial0_pollchar,
333 #if SERIAL_1_PA00_PA01
335 ao_enable_port(&samd21_port_a);
336 samd21_port_pmux_set(&samd21_port_a, 0, SAMD21_PORT_PMUX_FUNC_D);
337 samd21_port_pmux_set(&samd21_port_a, 1, SAMD21_PORT_PMUX_FUNC_D);
338 txpo = SAMD21_SERCOM_CTRLA_TXPO_TX_0;
339 rxpo = SAMD21_SERCOM_CTRLA_RXPO_RX_1;
341 #error "No SERIAL_1 port configuration specified"
344 ao_samd21_usart1.reg = &samd21_sercom1;
345 ao_usart_init(&ao_samd21_usart1, 0, 1, txpo, rxpo);
347 #if USE_SERIAL_1_STDIN
348 ao_add_stdio(_ao_serial1_pollchar,