2 * Copyright © 2019 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
18 _ao_usart_tx_start(struct ao_samd21_usart *usart)
20 if (!ao_fifo_empty(usart->tx_fifo)) {
21 #if HAS_SERIAL_SW_FLOW
22 if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts, foo) == 1) {
23 ao_exti_enable(usart->gpio_cts, usart->pin_cts);
27 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_DRE))
29 usart->tx_running = 1;
30 usart->reg->intenset = (1 << SAMD21_SERCOM_INTFLAG_DRE) | (1 << SAMD21_SERCOM_INTFLAG_TXC);
31 ao_fifo_remove(usart->tx_fifo, usart->reg->data);
32 ao_wakeup(&usart->tx_fifo);
40 _ao_usart_rx(struct ao_samd21_usart *usart, int is_stdin)
42 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_RXC)) {
43 if (!ao_fifo_full(usart->rx_fifo)) {
44 ao_fifo_insert(usart->rx_fifo, usart->reg->data);
45 ao_wakeup(&usart->rx_fifo);
47 ao_wakeup(&ao_stdin_ready);
48 #if HAS_SERIAL_SW_FLOW
49 /* If the fifo is nearly full, turn off RTS and wait
50 * for it to drain a bunch
52 if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
53 ao_gpio_set(usart->gpio_rts, usart->pin_rts, usart->pin_rts, 1);
58 usart->reg->intenclr = (1 << SAMD21_SERCOM_INTFLAG_RXC);
64 ao_usart_isr(struct ao_samd21_usart *usart, int is_stdin)
66 _ao_usart_rx(usart, is_stdin);
68 if (!_ao_usart_tx_start(usart))
69 usart->reg->intenclr = (1 << SAMD21_SERCOM_INTFLAG_DRE);
71 if (usart->reg->intflag & (1 << SAMD21_SERCOM_INTFLAG_TXC)) {
72 usart->tx_running = 0;
73 usart->reg->intenclr = (1 << SAMD21_SERCOM_INTFLAG_TXC);
74 if (usart->draining) {
76 ao_wakeup(&usart->tx_fifo);
81 static const uint32_t ao_usart_speeds[] = {
82 [AO_SERIAL_SPEED_4800] = 4800,
83 [AO_SERIAL_SPEED_9600] = 9600,
84 [AO_SERIAL_SPEED_19200] = 19200,
85 [AO_SERIAL_SPEED_57600] = 57600,
86 [AO_SERIAL_SPEED_115200] = 115200,
90 ao_usart_set_speed(struct ao_samd21_usart *usart, uint8_t speed)
92 struct samd21_sercom *reg = usart->reg;
93 uint64_t top = (uint64_t) ao_usart_speeds[speed] << (4 + 16);
94 uint16_t baud = (uint16_t) (65536 - (top + AO_SYSCLK/2) / AO_SYSCLK);
95 uint32_t ctrla = reg->ctrla;
97 if (ctrla & (1UL << SAMD21_SERCOM_CTRLA_ENABLE)) {
98 usart->reg->ctrla = ctrla & ~(1UL << SAMD21_SERCOM_CTRLA_ENABLE);
99 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
102 usart->reg->baud = baud;
103 if (ctrla & (1UL << SAMD21_SERCOM_CTRLA_ENABLE)) {
104 usart->reg->ctrla = ctrla;
105 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
111 ao_usart_init(struct ao_samd21_usart *usart, bool hw_flow, uint8_t id, uint8_t txpo, uint8_t rxpo)
113 struct samd21_sercom *reg = usart->reg;
117 /* Send a clock along */
118 samd21_gclk_clkctrl(0, SAMD21_GCLK_CLKCTRL_ID_SERCOM0_CORE + id);
120 samd21_nvic_set_enable(SAMD21_NVIC_ISR_SERCOM0_POS + id);
121 samd21_nvic_set_priority(SAMD21_NVIC_ISR_SERCOM0_POS + id, 4);
124 samd21_pm.apbcmask |= (1 << (SAMD21_PM_APBCMASK_SERCOM0 + id));
127 reg->ctrla = (1 << SAMD21_SERCOM_CTRLA_SWRST);
129 while ((reg->ctrla & (1 << SAMD21_SERCOM_CTRLA_SWRST)) ||
130 (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_SWRST)))
133 reg->ctrlb = ((0 << SAMD21_SERCOM_CTRLB_CHSIZE) |
134 (0 << SAMD21_SERCOM_CTRLB_SBMODE) |
135 (0 << SAMD21_SERCOM_CTRLB_COLDEN) |
136 (0 << SAMD21_SERCOM_CTRLB_SFDE) |
137 (0 << SAMD21_SERCOM_CTRLB_ENC) |
138 (0 << SAMD21_SERCOM_CTRLB_PMODE) |
139 (1 << SAMD21_SERCOM_CTRLB_TXEN) |
140 (1 << SAMD21_SERCOM_CTRLB_RXEN) |
141 (3 << SAMD21_SERCOM_CTRLB_FIFOCLR));
143 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
145 /* finish setup and enable the hardware */
146 reg->ctrla = ((0 << SAMD21_SERCOM_CTRLA_SWRST) |
147 (1 << SAMD21_SERCOM_CTRLA_ENABLE) |
148 (1 << SAMD21_SERCOM_CTRLA_MODE) |
149 (1 << SAMD21_SERCOM_CTRLA_RUNSTDBY) |
150 (0 << SAMD21_SERCOM_CTRLA_IBON) |
151 (0 << SAMD21_SERCOM_CTRLA_SAMPR) |
152 (txpo << SAMD21_SERCOM_CTRLA_TXPO) | /* pad[2] */
153 (rxpo << SAMD21_SERCOM_CTRLA_RXPO) | /* pad[3] */
154 (0 << SAMD21_SERCOM_CTRLA_SAMPA) |
155 (0 << SAMD21_SERCOM_CTRLA_FORM) | /* no parity */
156 (0 << SAMD21_SERCOM_CTRLA_CMODE) | /* async */
157 (0 << SAMD21_SERCOM_CTRLA_CPOL) |
158 (1 << SAMD21_SERCOM_CTRLA_DORD)); /* LSB first */
160 while (reg->syncbusy & (1 << SAMD21_SERCOM_SYNCBUSY_ENABLE))
163 /* Enable receive interrupt */
164 reg->intenset = (1 << SAMD21_SERCOM_INTFLAG_RXC);
168 _ao_usart_pollchar(struct ao_samd21_usart *usart)
172 if (ao_fifo_empty(usart->rx_fifo))
176 ao_fifo_remove(usart->rx_fifo, u);
177 if ((usart->reg->intenset & (1 << SAMD21_SERCOM_INTFLAG_RXC)) == 0) {
178 if (ao_fifo_barely(usart->rx_fifo))
179 usart->reg->intenset = (1 << SAMD21_SERCOM_INTFLAG_RXC);
181 #if HAS_SERIAL_SW_FLOW
182 /* If we've cleared RTS, check if there's space now and turn it back on */
183 if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
184 ao_gpio_set(usart->gpio_rts, usart->pin_rts, foo, 0);
194 ao_usart_getchar(struct ao_samd21_usart *usart)
197 ao_arch_block_interrupts();
198 while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
199 ao_sleep(&usart->rx_fifo);
200 ao_arch_release_interrupts();
205 ao_usart_putchar(struct ao_samd21_usart *usart, char c)
207 ao_arch_block_interrupts();
208 while (ao_fifo_full(usart->tx_fifo))
209 ao_sleep(&usart->tx_fifo);
210 ao_fifo_insert(usart->tx_fifo, c);
211 _ao_usart_tx_start(usart);
212 ao_arch_release_interrupts();
216 ao_usart_drain(struct ao_samd21_usart *usart)
218 ao_arch_block_interrupts();
219 while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
221 ao_sleep(&usart->tx_fifo);
223 ao_arch_release_interrupts();
228 struct ao_samd21_usart ao_samd21_usart0;
230 void samd21_sercom0_isr(void) { ao_usart_isr(&ao_samd21_usart0, USE_SERIAL_0_STDIN); }
233 ao_serial0_getchar(void)
235 return ao_usart_getchar(&ao_samd21_usart0);
239 ao_serial0_putchar(char c)
241 ao_usart_putchar(&ao_samd21_usart0, c);
245 _ao_serial0_pollchar(void)
247 return _ao_usart_pollchar(&ao_samd21_usart0);
251 ao_serial0_drain(void)
253 ao_usart_drain(&ao_samd21_usart0);
257 ao_serial0_set_speed(uint8_t speed)
259 ao_usart_drain(&ao_samd21_usart0);
260 ao_usart_set_speed(&ao_samd21_usart0, speed);
262 #endif /* HAS_SERIAL_0 */
266 struct ao_samd21_usart ao_samd21_usart1;
268 void samd21_sercom1_isr(void) { ao_usart_isr(&ao_samd21_usart1, USE_SERIAL_1_STDIN); }
271 ao_serial1_getchar(void)
273 return ao_usart_getchar(&ao_samd21_usart1);
277 ao_serial1_putchar(char c)
279 ao_usart_putchar(&ao_samd21_usart1, c);
283 _ao_serial1_pollchar(void)
285 return _ao_usart_pollchar(&ao_samd21_usart1);
289 ao_serial1_drain(void)
291 ao_usart_drain(&ao_samd21_usart1);
295 ao_serial1_set_speed(uint8_t speed)
297 ao_usart_drain(&ao_samd21_usart1);
298 ao_usart_set_speed(&ao_samd21_usart1, speed);
300 #endif /* HAS_SERIAL_1 */
308 #if SERIAL_0_PA10_PA11
310 ao_enable_port(&samd21_port_a);
311 samd21_port_pmux_set(&samd21_port_a, 10, SAMD21_PORT_PMUX_FUNC_C);
312 samd21_port_pmux_set(&samd21_port_a, 11, SAMD21_PORT_PMUX_FUNC_C);
313 txpo = SAMD21_SERCOM_CTRLA_TXPO_TX_2; /* pad 2 */
314 rxpo = SAMD21_SERCOM_CTRLA_RXPO_RX_3; /* pad 3 */
316 #error "No SERIAL_0 port configuration specified"
319 ao_samd21_usart0.reg = &samd21_sercom0;
320 ao_usart_init(&ao_samd21_usart0, 0, 0, txpo, rxpo);
322 #if USE_SERIAL_0_STDIN
323 ao_add_stdio(_ao_serial0_pollchar,
330 #if SERIAL_1_PA00_PA01
332 ao_enable_port(&samd21_port_a);
333 samd21_port_pmux_set(&samd21_port_a, 0, SAMD21_PORT_PMUX_FUNC_D);
334 samd21_port_pmux_set(&samd21_port_a, 1, SAMD21_PORT_PMUX_FUNC_D);
335 txpo = SAMD21_SERCOM_CTRLA_TXPO_TX_0;
336 rxpo = SAMD21_SERCOM_CTRLA_RXPO_RX_1;
338 #error "No SERIAL_1 port configuration specified"
341 ao_samd21_usart1.reg = &samd21_sercom1;
342 ao_usart_init(&ao_samd21_usart1, 0, 1, txpo, rxpo);
344 #if USE_SERIAL_1_STDIN
345 ao_add_stdio(_ao_serial1_pollchar,