2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 /* 8MHz High speed external crystal */
22 #define AO_HSE 8000000
24 /* PLLVCO = 96MHz (so that USB will work*/
26 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12)
28 /* SYSCLK = 32MHz (no need to go faster than CPU) */
30 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
32 /* HCLK = 32MHz (CPU clock) */
33 #define AO_AHB_PRESCALER 1
34 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
36 /* Run APB1 at 16MHz (HCLK/2) */
37 #define AO_APB1_PRESCALER 2
38 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
40 /* Run APB2 at 16MHz (HCLK/2) */
41 #define AO_APB2_PRESCALER 2
42 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
44 #define HAS_SERIAL_1 1
45 #define USE_SERIAL_1_STDIN 1
46 #define SERIAL_1_PB6_PB7 0
47 #define SERIAL_1_PA9_PA10 1
49 #define HAS_SERIAL_2 0
50 #define USE_SERIAL_2_STDIN 0
51 #define SERIAL_2_PA2_PA3 0
52 #define SERIAL_2_PD5_PD6 0
54 #define HAS_SERIAL_3 1
55 #define USE_SERIAL_3_STDIN 0
56 #define SERIAL_3_PB10_PB11 0
57 #define SERIAL_3_PC10_PC11 1
58 #define SERIAL_3_PD8_PD9 0
60 #define ao_gps_getchar ao_serial3_getchar
61 #define ao_gps_putchar ao_serial3_putchar
62 #define ao_gps_set_speed ao_serial3_set_speed
68 #define SPI_1_PA5_PA6_PA7 1
69 #define SPI_1_PB3_PB4_PB5 0
70 #define SPI_1_PE13_PE14_PE15 0
73 #define SPI_2_PB13_PB14_PB15 1
74 #define SPI_2_PD1_PD3_PD4 0
77 #define I2C_1_PB8_PB9 1
80 #define I2C_2_PB10_PB11 1
82 #define PACKET_HAS_SLAVE 1
84 #define LOW_LEVEL_DEBUG 1
86 #define LED_PORT_ENABLE STM_RCC_AHBENR_GPIOCEN
87 #define LED_PORT stm_gpioc
89 #define LED_PIN_GREEN 9
90 #define AO_LED_RED (1 << LED_PIN_RED)
91 #define AO_LED_GREEN (1 << LED_PIN_GREEN)
93 #define LEDS_AVAILABLE (AO_LED_RED | AO_LED_GREEN)
97 #define AO_ADC_RING 32
98 #define AO_ADC_NUM_SENSE 6
102 int16_t sense[AO_ADC_NUM_SENSE];
108 #define AO_ADC_SENSE_A 0
109 #define AO_ADC_SENSE_A_PORT stm_gpioa
110 #define AO_ADC_SENSE_A_PIN 0
112 #define AO_ADC_SENSE_B 1
113 #define AO_ADC_SENSE_B_PORT stm_gpioa
114 #define AO_ADC_SENSE_B_PIN 1
116 #define AO_ADC_SENSE_C 2
117 #define AO_ADC_SENSE_C_PORT stm_gpioa
118 #define AO_ADC_SENSE_C_PIN 2
120 #define AO_ADC_SENSE_D 3
121 #define AO_ADC_SENSE_D_PORT stm_gpioa
122 #define AO_ADC_SENSE_D_PIN 3
124 #define AO_ADC_SENSE_E 4
125 #define AO_ADC_SENSE_E_PORT stm_gpioa
126 #define AO_ADC_SENSE_E_PIN 4
128 #define AO_ADC_SENSE_F 22
129 #define AO_ADC_SENSE_F_PORT stm_gpioe
130 #define AO_ADC_SENSE_F_PIN 7
132 #define AO_ADC_V_BATT 8
133 #define AO_ADC_V_BATT_PORT stm_gpiob
134 #define AO_ADC_V_BATT_PIN 0
136 #define AO_ADC_V_PBATT 9
137 #define AO_ADC_V_PBATT_PORT stm_gpiob
138 #define AO_ADC_V_PBATT_PIN 1
140 #define AO_ADC_TEMP 16
142 #define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN) | \
143 (1 << STM_RCC_AHBENR_GPIOEEN) | \
144 (1 << STM_RCC_AHBENR_GPIOBEN))
146 #define AO_NUM_ADC_PIN (AO_ADC_NUM_SENSE + 2)
148 #define AO_ADC_PIN0_PORT AO_ADC_SENSE_A_PORT
149 #define AO_ADC_PIN0_PIN AO_ADC_SENSE_A_PIN
150 #define AO_ADC_PIN1_PORT AO_ADC_SENSE_B_PORT
151 #define AO_ADC_PIN1_PIN AO_ADC_SENSE_B_PIN
152 #define AO_ADC_PIN2_PORT AO_ADC_SENSE_C_PORT
153 #define AO_ADC_PIN2_PIN AO_ADC_SENSE_C_PIN
154 #define AO_ADC_PIN3_PORT AO_ADC_SENSE_D_PORT
155 #define AO_ADC_PIN3_PIN AO_ADC_SENSE_D_PIN
156 #define AO_ADC_PIN4_PORT AO_ADC_SENSE_E_PORT
157 #define AO_ADC_PIN4_PIN AO_ADC_SENSE_E_PIN
158 #define AO_ADC_PIN5_PORT AO_ADC_SENSE_F_PORT
159 #define AO_ADC_PIN5_PIN AO_ADC_SENSE_F_PIN
160 #define AO_ADC_PIN6_PORT AO_ADC_V_BATT_PORT
161 #define AO_ADC_PIN6_PIN AO_ADC_V_BATT_PIN
162 #define AO_ADC_PIN7_PORT AO_ADC_V_PBATT_PORT
163 #define AO_ADC_PIN7_PIN AO_ADC_V_PBATT_PIN
165 #define AO_NUM_ADC (AO_ADC_NUM_SENSE + 3)
167 #define AO_ADC_SQ1 AO_ADC_SENSE_A
168 #define AO_ADC_SQ2 AO_ADC_SENSE_B
169 #define AO_ADC_SQ3 AO_ADC_SENSE_C
170 #define AO_ADC_SQ4 AO_ADC_SENSE_D
171 #define AO_ADC_SQ5 AO_ADC_SENSE_E
172 #define AO_ADC_SQ6 AO_ADC_SENSE_F
173 #define AO_ADC_SQ7 AO_ADC_V_BATT
174 #define AO_ADC_SQ8 AO_ADC_V_PBATT
175 #define AO_ADC_SQ9 AO_ADC_TEMP
177 #endif /* _AO_PINS_H_ */