2 * Copyright © 2013 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
19 #include <ao_serial.h>
21 struct ao_fifo ao_usart_rx_fifo;
22 struct ao_fifo ao_usart_tx_fifo;
23 uint8_t ao_usart_tx_avail;
24 uint8_t ao_usart_tx_avail_min;
26 #define LPC_USART_TX_FIFO_SIZE 16
33 while (!(lpc_usart.lsr & (1 << LPC_USART_LSR_TEMT)))
35 lpc_usart.rbr_thr = c;
39 _ao_serial_tx_start(void)
41 if (!ao_fifo_empty(ao_usart_tx_fifo) && ao_usart_tx_avail) {
43 if (ao_usart_tx_avail < ao_usart_tx_avail_min)
44 ao_usart_tx_avail_min = ao_usart_tx_avail;
45 ao_fifo_remove(ao_usart_tx_fifo, lpc_usart.rbr_thr);
52 uint8_t wake_input = 0;
53 (void) lpc_usart.iir_fcr;
55 while (lpc_usart.lsr & (1 << LPC_USART_LSR_RDR)) {
56 char c = lpc_usart.rbr_thr;
57 if (!ao_fifo_full(ao_usart_rx_fifo))
58 ao_fifo_insert(ao_usart_rx_fifo, c);
61 if (lpc_usart.lsr & (1 << LPC_USART_LSR_THRE)) {
62 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
63 _ao_serial_tx_start();
64 ao_wakeup(&ao_usart_tx_fifo);
67 ao_wakeup(&ao_usart_rx_fifo);
69 ao_wakeup(&ao_stdin_ready);
74 _ao_serial0_pollchar(void)
78 if (ao_fifo_empty(ao_usart_rx_fifo))
82 ao_fifo_remove(ao_usart_rx_fifo,u);
89 ao_serial0_getchar(void)
92 ao_arch_block_interrupts();
93 while ((c = _ao_serial0_pollchar()) == AO_READ_AGAIN)
94 ao_sleep(&ao_usart_rx_fifo);
95 ao_arch_release_interrupts();
100 ao_serial0_putchar(char c)
102 ao_arch_block_interrupts();
103 while (ao_fifo_full(ao_usart_tx_fifo))
104 ao_sleep(&ao_usart_tx_fifo);
105 ao_fifo_insert(ao_usart_tx_fifo, c);
106 _ao_serial_tx_start();
107 ao_arch_release_interrupts();
111 ao_serial0_drain(void)
113 ao_arch_block_interrupts();
114 while (!ao_fifo_empty(ao_usart_tx_fifo))
115 ao_sleep(&ao_usart_tx_fifo);
116 ao_arch_release_interrupts();
119 #include "ao_serial_lpc.h"
122 ao_serial0_set_speed(uint8_t speed)
124 if (speed > AO_SERIAL_SPEED_115200)
127 /* Flip to allow access to divisor latches */
128 lpc_usart.lcr |= (1 << LPC_USART_LCR_DLAB);
131 lpc_usart.rbr_thr = ao_usart_speeds[speed].dl & 0xff;
134 lpc_usart.ier = (ao_usart_speeds[speed].dl >> 8) & 0xff;
136 lpc_usart.fdr = ((ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
137 (ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
139 /* Turn access to divisor latches back off */
140 lpc_usart.lcr &= ~(1 << LPC_USART_LCR_DLAB);
147 lpc_ioconf.pio0_18 = ((LPC_IOCONF_FUNC_PIO0_18_RXD << LPC_IOCONF_FUNC) |
148 (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
149 (0 << LPC_IOCONF_HYS) |
150 (0 << LPC_IOCONF_INV) |
151 (0 << LPC_IOCONF_OD));
152 lpc_ioconf.pio0_19 = ((LPC_IOCONF_FUNC_PIO0_19_TXD << LPC_IOCONF_FUNC) |
153 (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
154 (0 << LPC_IOCONF_HYS) |
155 (0 << LPC_IOCONF_INV) |
156 (0 << LPC_IOCONF_OD));
159 /* Turn on the USART */
160 lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_USART);
162 /* Turn on the USART clock */
163 lpc_scb.uartclkdiv = AO_LPC_CLKOUT / AO_LPC_USARTCLK;
165 /* Configure USART */
167 /* Enable FIFOs, reset fifo contents, interrupt on 1 received char */
168 lpc_usart.iir_fcr = ((1 << LPC_USART_FCR_FIFOEN) |
169 (1 << LPC_USART_FCR_RXFIFORES) |
170 (1 << LPC_USART_FCR_TXFIFORES) |
171 (LPC_USART_FCR_RXTL_1 << LPC_USART_FCR_RXTL));
173 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
174 ao_usart_tx_avail_min = LPC_USART_TX_FIFO_SIZE;
177 lpc_usart.lcr = ((LPC_USART_LCR_WLS_8 << LPC_USART_LCR_WLS) |
178 (LPC_USART_LCR_SBS_1 << LPC_USART_LCR_SBS) |
179 (0 << LPC_USART_LCR_PE) |
180 (LPC_USART_LCR_PS_ODD << LPC_USART_LCR_PS) |
181 (0 << LPC_USART_LCR_BC) |
182 (0 << LPC_USART_LCR_DLAB));
184 /* Disable flow control */
185 lpc_usart.mcr = ((0 << LPC_USART_MCR_DTRCTRL) |
186 (0 << LPC_USART_MCR_RTSCTRL) |
187 (0 << LPC_USART_MCR_LMS) |
188 (0 << LPC_USART_MCR_RTSEN) |
189 (0 << LPC_USART_MCR_CTSEN));
191 /* 16x oversampling */
192 lpc_usart.osr = ((0 << LPC_USART_OSR_OSFRAC) |
193 ((16 - 1) << LPC_USART_OSR_OSINT) |
194 (0 << LPC_USART_OSR_FDINT));
197 lpc_usart.hden = ((0 << LPC_USART_HDEN_HDEN));
200 ao_serial0_set_speed(AO_SERIAL_SPEED_9600);
202 /* Enable interrupts */
203 lpc_usart.ier = ((1 << LPC_USART_IER_RBRINTEN) |
204 (1 << LPC_USART_IER_THREINTEN));
206 lpc_nvic_set_enable(LPC_ISR_USART_POS);
207 lpc_nvic_set_priority(LPC_ISR_USART_POS, 0);
208 #if USE_SERIAL_0_STDIN
209 ao_add_stdio(_ao_serial0_pollchar,