2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 #define HAS_TASK_QUEUE 1
24 /* 16MHz High speed external crystal */
25 #define AO_HSE 16000000
27 /* PLLVCO = 96MHz (so that USB will work) */
29 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_6)
31 /* SYSCLK = 32MHz (no need to go faster than CPU) */
33 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
35 /* HCLK = 32MHz (CPU clock) */
36 #define AO_AHB_PRESCALER 1
37 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
39 /* Run APB1 at 16MHz (HCLK/2) */
40 #define AO_APB1_PRESCALER 2
41 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
43 /* Run APB2 at 16MHz (HCLK/2) */
44 #define AO_APB2_PRESCALER 2
45 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
47 #define HAS_SERIAL_1 0
48 #define USE_SERIAL_1_STDIN 0
49 #define SERIAL_1_PB6_PB7 0
50 #define SERIAL_1_PA9_PA10 0
52 #define HAS_SERIAL_2 0
53 #define USE_SERIAL_2_STDIN 0
54 #define SERIAL_2_PA2_PA3 0
55 #define SERIAL_2_PD5_PD6 0
57 #define HAS_SERIAL_3 0
58 #define USE_SERIAL_3_STDIN 0
59 #define SERIAL_3_PB10_PB11 0
60 #define SERIAL_3_PC10_PC11 0
61 #define SERIAL_3_PD8_PD9 0
63 #define AO_CONFIG_MAX_SIZE 1024
66 #define USE_INTERNAL_FLASH 0
67 #define USE_EEPROM_CONFIG 1
68 #define USE_STORAGE_CONFIG 0
71 #define HAS_BATTERY_REPORT 1
72 #define BEEPER_CHANNEL 1
73 #define BEEPER_TIMER 4
74 #define BEEPER_PORT (&stm_gpiob)
77 #define HAS_TELEMETRY 0
79 #define HAS_COMPANION 0
82 #define SPI_1_PA5_PA6_PA7 0
83 #define SPI_1_PB3_PB4_PB5 1 /* IMU */
84 #define SPI_1_PE13_PE14_PE15 0
85 #define SPI_1_OSPEEDR STM_OSPEEDR_10MHz
88 #define SPI_2_PB13_PB14_PB15 0 /* Flash, Companion, Radio */
89 #define SPI_2_PD1_PD3_PD4 0
90 #define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
92 #define SPI_2_PORT (&stm_gpiob)
93 #define SPI_2_SCK_PIN 13
94 #define SPI_2_MISO_PIN 14
95 #define SPI_2_MOSI_PIN 15
98 #define I2C_1_PB8_PB9 0
101 #define I2C_2_PB10_PB11 0
103 #define PACKET_HAS_SLAVE 0
104 #define PACKET_HAS_MASTER 0
106 #define LOW_LEVEL_DEBUG 0
108 #define LEDS_AVAILABLE 0
113 #define HAS_ADC_TEMP 1
121 #define HAS_IGNITE_REPORT 1
122 #define AO_PYRO_NUM 2
124 #define AO_SENSE_PYRO(p,n) ((p)->adc.sense[n])
125 #define AO_IGNITER_CLOSED 400
126 #define AO_IGNITER_OPEN 60
129 #define AO_PYRO_PORT_0 (&stm_gpiob)
130 #define AO_PYRO_PIN_0 0
132 #define AO_ADC_SENSE_A 1
133 #define AO_ADC_SENSE_A_PORT (&stm_gpioa)
134 #define AO_ADC_SENSE_A_PIN 1
137 #define AO_PYRO_PORT_1 (&stm_gpiob)
138 #define AO_PYRO_PIN_1 11
140 #define AO_ADC_SENSE_B 0
141 #define AO_ADC_SENSE_B_PORT (&stm_gpioa)
142 #define AO_ADC_SENSE_B_PIN 0
148 #define AO_DATA_RING 32
149 #define AO_ADC_NUM_SENSE 2
152 int16_t sense[AO_ADC_NUM_SENSE];
157 #define AO_ADC_DUMP(p) \
158 printf("tick: %5u A: %5d B: %5d batt: %5d\n", \
160 (p)->adc.sense[0], (p)->adc.sense[1], \
163 #define AO_ADC_V_BATT 2
164 #define AO_ADC_V_BATT_PORT (&stm_gpioa)
165 #define AO_ADC_V_BATT_PIN 2
167 #define AO_ADC_TEMP 16
169 #define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN) | \
170 (1 << STM_RCC_AHBENR_GPIOEEN) | \
171 (1 << STM_RCC_AHBENR_GPIOBEN))
173 #define AO_NUM_ADC_PIN (AO_ADC_NUM_SENSE + 1)
175 #define AO_ADC_PIN0_PORT AO_ADC_SENSE_A_PORT
176 #define AO_ADC_PIN0_PIN AO_ADC_SENSE_A_PIN
177 #define AO_ADC_PIN1_PORT AO_ADC_SENSE_B_PORT
178 #define AO_ADC_PIN1_PIN AO_ADC_SENSE_B_PIN
179 #define AO_ADC_PIN2_PORT AO_ADC_V_BATT_PORT
180 #define AO_ADC_PIN2_PIN AO_ADC_V_BATT_PIN
182 #define AO_NUM_ADC (AO_NUM_ADC_PIN + 1)
184 #define AO_ADC_SQ1 AO_ADC_SENSE_A
185 #define AO_ADC_SQ2 AO_ADC_SENSE_B
186 #define AO_ADC_SQ3 AO_ADC_V_BATT
187 #define AO_ADC_SQ4 AO_ADC_TEMP
190 * Voltage divider on ADC battery sampler
192 #define AO_BATTERY_DIV_PLUS 100 /* 100k */
193 #define AO_BATTERY_DIV_MINUS 27 /* 27k */
196 * Voltage divider on ADC igniter samplers
198 #define AO_IGNITE_DIV_PLUS 100 /* 100k */
199 #define AO_IGNITE_DIV_MINUS 27 /* 27k */
202 * ADC reference in decivolts
204 #define AO_ADC_REFERENCE_DV 33
211 #define AO_BMX160_INT_PORT (&stm_gpioc)
212 #define AO_BMX160_INT_PIN 13
213 #define AO_BMX160_SPI_BUS (AO_SPI_1_PB3_PB4_PB5 | AO_SPI_MODE_0)
214 #define AO_BMX160_SPI_CS_PORT (&stm_gpioa)
215 #define AO_BMX160_SPI_CS_PIN 15
218 #define ao_data_along(packet) ((packet)->bmx160.acc_x)
219 #define ao_data_across(packet) (-(packet)->bmx160.acc_y)
220 #define ao_data_through(packet) ((packet)->bmx160.acc_z)
222 #define ao_data_roll(packet) ((packet)->bmx160.gyr_x)
223 #define ao_data_pitch(packet) (-(packet)->bmx160.gyr_y)
224 #define ao_data_yaw(packet) ((packet)->bmx160.gyr_z)
226 #define ao_data_mag_along(packet) ((packet)->bmx160.mag_x)
227 #define ao_data_mag_across(packet) (-(packet)->bmx160.mag_y)
228 #define ao_data_mag_through(packet) ((packet)->bmx160.mag_z)
230 #define ao_data_accel_cook(packet) (-ao_data_along(packet))
236 #define HAS_MONITOR 0
237 #define LEGACY_MONITOR 0
238 #define HAS_MONITOR_PUT 1
239 #define AO_MONITOR_LED 0
242 #endif /* _AO_PINS_H_ */