2 * Copyright © 2010 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 /* Total bytes of available storage */
22 uint32_t ao_storage_total;
24 /* Block size - device is erased in these units. At least 256 bytes */
25 uint32_t ao_storage_block;
27 /* Byte offset of config block. Will be ao_storage_block bytes long */
28 uint32_t ao_storage_config;
30 /* Storage unit size - device reads and writes must be within blocks of this size. Usually 256 bytes. */
31 uint16_t ao_storage_unit;
35 * Each flash chip is arranged in 64kB sectors; the
36 * chip cannot erase in units smaller than that.
38 * Writing happens in units of 256 byte pages and
39 * can only change bits from 1 to 0. So, you can rewrite
40 * the same contents, or append to an existing page easily enough
43 #define M25_WREN 0x06 /* Write Enable */
44 #define M25_WRDI 0x04 /* Write Disable */
45 #define M25_RDID 0x9f /* Read Identification */
46 #define M25_RDSR 0x05 /* Read Status Register */
47 #define M25_WRSR 0x01 /* Write Status Register */
48 #define M25_READ 0x03 /* Read Data Bytes */
49 #define M25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
50 #define M25_PP 0x02 /* Page Program */
51 #define M25_SE 0xd8 /* Sector Erase */
52 #define M25_BE 0xc7 /* Bulk Erase */
53 #define M25_DP 0xb9 /* Deep Power-down */
56 #define M25_MANUF_OFFSET 0
57 #define M25_MEMORY_TYPE_OFFSET 1
58 #define M25_CAPACITY_OFFSET 2
59 #define M25_UID_OFFSET 3
60 #define M25_CFI_OFFSET 4
61 #define M25_RDID_LEN 4 /* that's all we need */
63 #define M25_CAPACITY_128KB 0x11
64 #define M25_CAPACITY_256KB 0x12
65 #define M25_CAPACITY_512KB 0x13
66 #define M25_CAPACITY_1MB 0x14
67 #define M25_CAPACITY_2MB 0x15
70 * Status register bits
73 #define M25_STATUS_SRWD (1 << 7) /* Status register write disable */
74 #define M25_STATUS_BP_MASK (7 << 2) /* Block protect bits */
75 #define M25_STATUS_BP_SHIFT (2)
76 #define M25_STATUS_WEL (1 << 1) /* Write enable latch */
77 #define M25_STATUS_WIP (1 << 0) /* Write in progress */
80 * On teleterra, the m25 chip select pins are
81 * wired on P0_0 through P0_3.
85 static uint8_t ao_m25_size[M25_MAX_CHIPS]; /* number of sectors in each chip */
86 static ao_port_t ao_m25_pin[M25_MAX_CHIPS]; /* chip select pin for each chip */
87 static uint8_t ao_m25_numchips; /* number of chips detected */
89 static uint8_t ao_m25_total; /* total sectors available */
90 static ao_port_t ao_m25_wip; /* write in progress */
92 static uint8_t ao_m25_mutex;
95 * This little array is abused to send and receive data. A particular
96 * caution -- the read and write addresses are written into the last
97 * three bytes of the array by ao_m25_set_page_address and then the
98 * first byte is used by ao_m25_wait_wip and ao_m25_write_enable, neither
99 * of which touch those last three bytes.
102 static uint8_t ao_m25_instruction[4];
104 #define M25_SELECT(cs) ao_spi_get_mask(AO_M25_SPI_CS_PORT,cs,AO_M25_SPI_BUS, AO_SPI_SPEED_FAST)
105 #define M25_DESELECT(cs) ao_spi_put_mask(AO_M25_SPI_CS_PORT,cs,AO_M25_SPI_BUS)
107 #define M25_BLOCK_SHIFT 16
108 #define M25_BLOCK 65536L
109 #define M25_POS_TO_SECTOR(pos) ((uint8_t) ((pos) >> M25_BLOCK_SHIFT))
110 #define M25_SECTOR_TO_POS(sector) (((uint32_t) (sector)) << M25_BLOCK_SHIFT)
113 * Block until the specified chip is done writing
116 ao_m25_wait_wip(ao_port_t cs)
118 if (ao_m25_wip & cs) {
120 ao_m25_instruction[0] = M25_RDSR;
121 ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
123 ao_spi_recv(ao_m25_instruction, 1, AO_M25_SPI_BUS);
124 } while (ao_m25_instruction[0] & M25_STATUS_WIP);
131 * Set the write enable latch so that page program and sector
132 * erase commands will work. Also mark the chip as busy writing
133 * so that future operations will block until the WIP bit goes off
136 ao_m25_write_enable(ao_port_t cs)
139 ao_m25_instruction[0] = M25_WREN;
140 ao_spi_send(&ao_m25_instruction, 1, AO_M25_SPI_BUS);
147 * Returns the number of 64kB sectors
150 ao_m25_read_capacity(ao_port_t cs)
154 ao_m25_instruction[0] = M25_RDID;
155 ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
156 ao_spi_recv(ao_m25_instruction, M25_RDID_LEN, AO_M25_SPI_BUS);
159 /* Check to see if the chip is present */
160 if (ao_m25_instruction[0] == 0xff)
162 capacity = ao_m25_instruction[M25_CAPACITY_OFFSET];
164 /* Sanity check capacity number */
165 if (capacity < 0x11 || 0x1f < capacity)
167 return 1 << (capacity - 0x10);
171 ao_m25_set_address(uint32_t pos)
174 #if M25_MAX_CHIPS > 1
178 for (chip = 0; chip < ao_m25_numchips; chip++) {
179 size = ao_m25_size[chip];
180 if (M25_POS_TO_SECTOR(pos) < size)
182 pos -= M25_SECTOR_TO_POS(size);
184 if (chip == ao_m25_numchips)
187 mask = ao_m25_pin[chip];
189 mask = AO_M25_SPI_CS_MASK;
191 ao_m25_wait_wip(mask);
193 ao_m25_instruction[1] = pos >> 16;
194 ao_m25_instruction[2] = pos >> 8;
195 ao_m25_instruction[3] = pos;
200 * Scan the possible chip select lines
201 * to see which flash chips are connected
206 #if M25_MAX_CHIPS > 1
213 #if M25_MAX_CHIPS > 1
215 for (pin = 1; pin != 0; pin <<= 1) {
216 if (AO_M25_SPI_CS_MASK & pin) {
217 size = ao_m25_read_capacity(pin);
219 ao_m25_size[ao_m25_numchips] = size;
220 ao_m25_pin[ao_m25_numchips] = pin;
221 ao_m25_total += size;
227 ao_m25_total = ao_m25_read_capacity(AO_M25_SPI_CS_MASK);
231 ao_storage_total = M25_SECTOR_TO_POS(ao_m25_total);
232 ao_storage_block = M25_BLOCK;
233 ao_storage_config = ao_storage_total - M25_BLOCK;
234 ao_storage_unit = 256;
239 * Erase the specified sector
242 ao_storage_erase(uint32_t pos)
246 if (pos >= ao_storage_total || pos + ao_storage_block > ao_storage_total)
249 ao_mutex_get(&ao_m25_mutex);
252 cs = ao_m25_set_address(pos);
254 ao_m25_write_enable(cs);
256 ao_m25_instruction[0] = M25_SE;
258 ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
262 ao_mutex_put(&ao_m25_mutex);
270 ao_storage_device_write(uint32_t pos, void *d, uint16_t len)
274 if (pos >= ao_storage_total || pos + len > ao_storage_total)
277 ao_mutex_get(&ao_m25_mutex);
280 cs = ao_m25_set_address(pos);
281 ao_m25_write_enable(cs);
283 ao_m25_instruction[0] = M25_PP;
285 ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
286 ao_spi_send(d, len, AO_M25_SPI_BUS);
289 ao_mutex_put(&ao_m25_mutex);
297 ao_storage_device_read(uint32_t pos, void *d, uint16_t len)
301 if (pos >= ao_storage_total || pos + len > ao_storage_total)
303 ao_mutex_get(&ao_m25_mutex);
306 cs = ao_m25_set_address(pos);
308 /* No need to use the FAST_READ as we're running at only 8MHz */
309 ao_m25_instruction[0] = M25_READ;
311 ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
312 ao_spi_recv(d, len, AO_M25_SPI_BUS);
315 ao_mutex_put(&ao_m25_mutex);
320 ao_storage_flush(void)
325 ao_storage_setup(void)
327 ao_mutex_get(&ao_m25_mutex);
329 ao_mutex_put(&ao_m25_mutex);
333 ao_storage_device_info(void)
338 #if M25_MAX_CHIPS > 1
342 ao_mutex_get(&ao_m25_mutex);
344 ao_mutex_put(&ao_m25_mutex);
346 #if M25_MAX_CHIPS > 1
347 printf ("Detected chips %d size %d\n", ao_m25_numchips, ao_m25_total);
348 for (chip = 0; chip < ao_m25_numchips; chip++)
349 printf ("Flash chip %d select %02x size %d\n",
350 chip, ao_m25_pin[chip], ao_m25_size[chip]);
352 printf ("Detected chips 1 size %d\n", ao_m25_total);
356 printf ("Available chips:\n");
357 for (cs = 1; cs != 0; cs <<= 1) {
358 if ((AO_M25_SPI_CS_MASK & cs) == 0)
361 ao_mutex_get(&ao_m25_mutex);
363 ao_m25_instruction[0] = M25_RDID;
364 ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
365 ao_spi_recv(ao_m25_instruction, M25_RDID_LEN, AO_M25_SPI_BUS);
368 printf ("Select %02x manf %02x type %02x cap %02x uid %02x\n",
370 ao_m25_instruction[M25_MANUF_OFFSET],
371 ao_m25_instruction[M25_MEMORY_TYPE_OFFSET],
372 ao_m25_instruction[M25_CAPACITY_OFFSET],
373 ao_m25_instruction[M25_UID_OFFSET]);
374 ao_mutex_put(&ao_m25_mutex);
380 ao_storage_device_init(void)
382 ao_spi_init_cs (AO_M25_SPI_CS_PORT, AO_M25_SPI_CS_MASK);