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1 /*
2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along
15  * with this program; if not, write to the Free Software Foundation, Inc.,
16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
17  */
18
19 #include <ao.h>
20 #include <ao_cc1200.h>
21 #include <ao_exti.h>
22 #include <ao_fec.h>
23 #include <ao_packet.h>
24 #if HAS_PAD
25 #include <ao_pad.h>
26 #endif
27
28 static uint8_t ao_radio_mutex;
29
30 static uint8_t ao_radio_wake;           /* radio ready. Also used as sleep address */
31 static uint8_t ao_radio_abort;          /* radio operation should abort */
32
33 int8_t  ao_radio_rssi;                  /* Last received RSSI value */
34
35 #ifndef CC1200_DEBUG
36 #define CC1200_DEBUG            0
37 #endif
38
39 #ifndef CC1200_LOW_LEVEL_DEBUG
40 #define CC1200_LOW_LEVEL_DEBUG  0
41 #endif
42
43 #define CC1200_TRACE            0
44 #define CC1200_APRS_TRACE       0
45
46 extern const uint32_t   ao_radio_cal;
47
48 #ifdef AO_CC1200_FOSC
49 #define FOSC    AO_CC1200_FOSC
50 #else
51 #define FOSC    40000000
52 #endif
53
54 #ifndef AO_CC1200_SPI_SPEED
55 #error AO_CC1200_SPI_SPEED undefined
56 #endif
57
58 #define ao_radio_select()       ao_spi_get_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS,AO_CC1200_SPI_SPEED)
59 #define ao_radio_deselect()     ao_spi_put_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS)
60 #define ao_radio_spi_send(d,l)  ao_spi_send((d), (l), AO_CC1200_SPI_BUS)
61 #define ao_radio_spi_send_fixed(d,l) ao_spi_send_fixed((d), (l), AO_CC1200_SPI_BUS)
62 #define ao_radio_spi_recv(d,l)  ao_spi_recv((d), (l), AO_CC1200_SPI_BUS)
63 #define ao_radio_duplex(o,i,l)  ao_spi_duplex((o), (i), (l), AO_CC1200_SPI_BUS)
64
65 static uint8_t
66 ao_radio_reg_read(uint16_t addr)
67 {
68         uint8_t data[2];
69         uint8_t d;
70
71 #if CC1200_TRACE
72         printf("\t\tao_radio_reg_read (%04x): ", addr); flush();
73 #endif
74         if (CC1200_IS_EXTENDED(addr)) {
75                 data[0] = ((1 << CC1200_READ)  |
76                            (0 << CC1200_BURST) |
77                            CC1200_EXTENDED);
78                 data[1] = addr;
79                 d = 2;
80         } else {
81                 data[0] = ((1 << CC1200_READ)  |
82                            (0 << CC1200_BURST) |
83                            addr);
84                 d = 1;
85         }
86         ao_radio_select();
87         ao_radio_spi_send(data, d);
88         ao_radio_spi_recv(data, 1);
89         ao_radio_deselect();
90 #if CC1200_TRACE
91         printf (" %02x\n", data[0]);
92 #endif
93         return data[0];
94 }
95
96 static void
97 ao_radio_reg_write(uint16_t addr, uint8_t value)
98 {
99         uint8_t data[3];
100         uint8_t d;
101
102 #if CC1200_TRACE
103         printf("\t\tao_radio_reg_write (%04x): %02x\n", addr, value);
104 #endif
105         if (CC1200_IS_EXTENDED(addr)) {
106                 data[0] = ((0 << CC1200_READ)  |
107                            (0 << CC1200_BURST) |
108                            CC1200_EXTENDED);
109                 data[1] = addr;
110                 d = 2;
111         } else {
112                 data[0] = ((0 << CC1200_READ)  |
113                            (0 << CC1200_BURST) |
114                            addr);
115                 d = 1;
116         }
117         data[d] = value;
118         ao_radio_select();
119         ao_radio_spi_send(data, d+1);
120         ao_radio_deselect();
121 #if CC1200_TRACE
122         (void) ao_radio_reg_read(addr);
123 #endif
124 }
125
126 static uint8_t
127 ao_radio_strobe(uint8_t addr)
128 {
129         uint8_t in;
130
131 #if CC1200_TRACE
132         printf("\t\tao_radio_strobe (%02x): ", addr); flush();
133 #endif
134         ao_radio_select();
135         ao_radio_duplex(&addr, &in, 1);
136         ao_radio_deselect();
137 #if CC1200_TRACE
138         printf("%02x\n", in); flush();
139 #endif
140         return in;
141 }
142
143 static uint8_t
144 ao_radio_fifo_read(uint8_t *data, uint8_t len)
145 {
146         uint8_t addr = ((1 << CC1200_READ)  |
147                         (1 << CC1200_BURST) |
148                         CC1200_FIFO);
149         uint8_t status;
150
151         ao_radio_select();
152         ao_radio_duplex(&addr, &status, 1);
153         ao_radio_spi_recv(data, len);
154         ao_radio_deselect();
155         return status;
156 }
157
158 static uint8_t
159 ao_radio_fifo_write_start(void)
160 {
161         uint8_t addr = ((0 << CC1200_READ)  |
162                         (1 << CC1200_BURST) |
163                         CC1200_FIFO);
164         uint8_t status;
165
166         ao_radio_select();
167         ao_radio_duplex(&addr, &status, 1);
168         return status;
169 }
170
171 static inline uint8_t ao_radio_fifo_write_stop(uint8_t status) {
172         ao_radio_deselect();
173         return status;
174 }
175
176 static uint8_t
177 ao_radio_fifo_write(const uint8_t *data, uint8_t len)
178 {
179         uint8_t status = ao_radio_fifo_write_start();
180         ao_radio_spi_send(data, len);
181         return ao_radio_fifo_write_stop(status);
182 }
183
184 static uint8_t
185 ao_radio_fifo_write_fixed(uint8_t data, uint8_t len)
186 {
187         uint8_t status = ao_radio_fifo_write_start();
188         ao_radio_spi_send_fixed(data, len);
189         return ao_radio_fifo_write_stop(status);
190 }
191
192 static uint8_t
193 ao_radio_int_pin(void)
194 {
195         return ao_gpio_get(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
196 }
197
198 static uint8_t
199 ao_radio_status(void)
200 {
201         return ao_radio_strobe (CC1200_SNOP);
202 }
203
204 void
205 ao_radio_recv_abort(void)
206 {
207         ao_radio_abort = 1;
208         ao_wakeup(&ao_radio_wake);
209 }
210
211 #define ao_radio_rdf_value 0x55
212
213 static void
214 ao_radio_isr(void)
215 {
216         ao_exti_disable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
217         ao_radio_wake = 1;
218         ao_wakeup(&ao_radio_wake);
219 }
220
221 static void
222 ao_radio_start_tx(void)
223 {
224         ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
225         ao_radio_strobe(CC1200_STX);
226 }
227
228 static void
229 ao_radio_start_rx(void)
230 {
231         ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
232         ao_radio_strobe(CC1200_SRX);
233 }
234
235 static void
236 ao_radio_idle(void)
237 {
238         for (;;) {
239                 uint8_t state = (ao_radio_strobe(CC1200_SIDLE) >> CC1200_STATUS_STATE) & CC1200_STATUS_STATE_MASK;
240                 if (state == CC1200_STATUS_STATE_IDLE)
241                         break;
242                 if (state == CC1200_STATUS_STATE_TX_FIFO_ERROR)
243                         ao_radio_strobe(CC1200_SFTX);
244                 if (state == CC1200_STATUS_STATE_RX_FIFO_ERROR)
245                         ao_radio_strobe(CC1200_SFRX);
246         }
247         /* Flush any pending data in the fifos */
248         ao_radio_strobe(CC1200_SFTX);
249         ao_radio_strobe(CC1200_SFRX);
250         /* Make sure the RF calibration is current */
251         ao_radio_strobe(CC1200_SCAL);
252 }
253
254 /*
255  * Packet deviation
256  *
257  *      fdev = fosc >> 22 * (256 + dev_m) << dev_e
258  *
259  * Deviation for 38400 baud should be 20.5kHz:
260  *
261  *      40e6 / (2 ** 22) * (256 + 13) * (2 ** 3) = 20523Hz
262  *
263  * Deviation for 9600 baud should be 5.125kHz:
264  *
265  *      40e6 / (2 ** 22) * (256 + 13) * (2 ** 1) = 5131Hz
266  *
267  * Deviation for 2400 baud should be 1.28125kHz, but cc1111 and
268  * cc115l can't do that, so we'll use 1.5kHz instead:
269  *
270  *      40e6 / (2 ** 21) * (79) = 1506Hz
271  */
272
273 #define PACKET_DEV_M_384        13
274 #define PACKET_DEV_E_384        3
275
276 #define PACKET_DEV_M_96         13
277 #define PACKET_DEV_E_96         1
278
279 #define PACKET_DEV_M_24         79
280 #define PACKET_DEV_E_24         0
281
282 /*
283  * For our packet data
284  *
285  *              (2**20 + DATARATE_M) * 2 ** DATARATE_E
286  *      Rdata = -------------------------------------- * fosc
287  *                           2 ** 39
288  *
289  * Given the bit period of the baseband, T, the bandwidth of the
290  * baseband signal is B = 1/(2T).  The overall bandwidth of the
291  * modulated signal is then Channel bandwidth = 2Δf + 2B.
292  *
293  * 38400 -- 2 * 20500 + 38400 = 79.4 kHz
294  *  9600 -- 2 * 5.125 +  9600 = 19.9 kHz
295  *  2400 -- 2 * 1.5   +  2400 =  5.4 khz
296  *
297  * Symbol rate 38400 Baud:
298  *
299  *      DATARATE_M = 1013008
300  *      DATARATE_E = 8
301  *      CHANBW = 104.16667
302  *
303  * Symbol rate 9600 Baud:
304  *
305  *      DATARATE_M = 1013008
306  *      DATARATE_E = 6
307  *      CHANBW = 26.042 (round to 19.8)
308  *
309  * Symbol rate 2400 Baud:
310  *
311  *      DATARATE_M = 1013008
312  *      DATARATE_E = 4
313  *      CHANBW = 5.0 (round to 9.5)
314  */
315
316 #if FOSC == 40000000
317 #define PACKET_SYMBOL_RATE_M            1013008
318 #define PACKET_SYMBOL_RATE_E_384        8
319 #define PACKET_SYMBOL_RATE_E_96         6
320 #define PACKET_SYMBOL_RATE_E_24         4
321 #endif
322
323 #if FOSC == 32000000
324 #define PACKET_SYMBOL_RATE_M            239914
325 #define PACKET_SYMBOL_RATE_E_384        9
326 #define PACKET_SYMBOL_RATE_E_96         7
327 #define PACKET_SYMBOL_RATE_E_24         5
328 #endif
329
330 /* 200 / 2 = 100 */
331 #define PACKET_CHAN_BW_384      ((CC1200_CHAN_BW_ADC_CIC_DECFACT_12 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
332                                  (16 << CC1200_CHAN_BW_BB_CIC_DECFACT))
333
334 /* 200 / 10 = 20 */
335 #define PACKET_CHAN_BW_96       ((CC1200_CHAN_BW_ADC_CIC_DECFACT_48 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
336                                  (16 << CC1200_CHAN_BW_BB_CIC_DECFACT))
337
338 /* 200 / 25 = 8 */
339 #define PACKET_CHAN_BW_24       ((CC1200_CHAN_BW_ADC_CIC_DECFACT_48 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
340                                  (44 << CC1200_CHAN_BW_BB_CIC_DECFACT))
341
342 static const uint16_t packet_setup[] = {
343         CC1200_SYMBOL_RATE1,            ((PACKET_SYMBOL_RATE_M >> 8) & 0xff),
344         CC1200_SYMBOL_RATE0,            ((PACKET_SYMBOL_RATE_M >> 0) & 0xff),
345         CC1200_PKT_CFG2,                                 /* Packet Configuration Reg. 2 */
346                 ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
347                  (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
348                  (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
349         CC1200_PKT_CFG1,                                 /* Packet Configuration Reg. 1 */
350                 ((1 << CC1200_PKT_CFG1_FEC_EN) |
351                  (1 << CC1200_PKT_CFG1_WHITE_DATA) |
352                  (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
353                  (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
354                  (CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES << CC1200_PKT_CFG1_CRC_CFG) |
355                  (1 << CC1200_PKT_CFG1_APPEND_STATUS)),
356         CC1200_PREAMBLE_CFG1,   ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
357                                  (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
358 };
359
360 static const uint16_t packet_setup_384[] = {
361         CC1200_DEVIATION_M,     PACKET_DEV_M_384,
362         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
363                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
364                                  (PACKET_DEV_E_384 << CC1200_MODCFG_DEV_E_DEV_E)),
365         CC1200_SYMBOL_RATE2,    ((PACKET_SYMBOL_RATE_E_384 << CC1200_SYMBOL_RATE2_DATARATE_E) |
366                                  (((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
367         CC1200_CHAN_BW,         PACKET_CHAN_BW_384,
368         CC1200_MDMCFG2,                                  /* General Modem Parameter Configuration Reg. 2 */
369                 ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
370                  (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
371                  (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
372                  (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
373 };
374
375 static const uint16_t packet_setup_96[] = {
376         CC1200_DEVIATION_M,     PACKET_DEV_M_96,
377         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
378                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
379                                  (PACKET_DEV_E_96 << CC1200_MODCFG_DEV_E_DEV_E)),
380         CC1200_SYMBOL_RATE2,    ((PACKET_SYMBOL_RATE_E_96 << CC1200_SYMBOL_RATE2_DATARATE_E) |
381                                  (((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
382         CC1200_CHAN_BW,         PACKET_CHAN_BW_96,
383         CC1200_MDMCFG2,                                  /* General Modem Parameter Configuration Reg. 2 */
384                 ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
385                  (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
386                  (CC1200_MDMCFG2_UPSAMPLER_P_32 << CC1200_MDMCFG2_UPSAMPLER_P) |
387                  (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
388 };
389
390 static const uint16_t packet_setup_24[] = {
391         CC1200_DEVIATION_M,     PACKET_DEV_M_24,
392         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
393                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
394                                  (PACKET_DEV_E_24 << CC1200_MODCFG_DEV_E_DEV_E)),
395         CC1200_SYMBOL_RATE2,    ((PACKET_SYMBOL_RATE_E_24 << CC1200_SYMBOL_RATE2_DATARATE_E) |
396                                  (((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
397         CC1200_CHAN_BW,         PACKET_CHAN_BW_24,
398         CC1200_MDMCFG2,                                  /* General Modem Parameter Configuration Reg. 2 */
399                 ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
400                  (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
401                  (CC1200_MDMCFG2_UPSAMPLER_P_64 << CC1200_MDMCFG2_UPSAMPLER_P) |
402                  (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
403 };
404
405 /*
406  * RDF deviation is 3kHz
407  *
408  *      fdev = fosc >> 22 * (256 + dev_m) << dev_e      dev_e != 0
409  *      fdev = fosc >> 21 * dev_m                       dev_e == 0
410  *
411  *      40e6 / (2 ** 21) * 157 = 2995Hz
412  */
413
414 #define RDF_DEV_E       0
415 #define RDF_DEV_M       157
416
417 /*
418  * For our RDF beacon, set the symbol rate to 2kBaud (for a 1kHz tone)
419  *
420  *              (2**20 + DATARATE_M) * 2 ** DATARATE_E
421  *      Rdata = -------------------------------------- * fosc
422  *                           2 ** 39
423  *
424  *      DATARATE_M = 669411
425  *      DATARATE_E = 4
426  *
427  * To make the tone last for 200ms, we need 2000 * .2 = 400 bits or 50 bytes
428  */
429 #define RDF_SYMBOL_RATE_E       4
430 #define RDF_SYMBOL_RATE_M       669411
431 #define RDF_PACKET_LEN  50
432
433 static const uint16_t rdf_setup[] = {
434         CC1200_DEVIATION_M,     RDF_DEV_M,
435         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
436                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
437                                  (RDF_DEV_E << CC1200_MODCFG_DEV_E_DEV_E)),
438         CC1200_SYMBOL_RATE2,    ((RDF_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
439                                  (((RDF_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
440         CC1200_SYMBOL_RATE1,    ((RDF_SYMBOL_RATE_M >> 8) & 0xff),
441         CC1200_SYMBOL_RATE0,    ((RDF_SYMBOL_RATE_M >> 0) & 0xff),
442         CC1200_PKT_CFG2,                                 /* Packet Configuration Reg. 2 */
443                 ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
444                  (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
445                  (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
446         CC1200_PKT_CFG1,                                 /* Packet Configuration Reg. 1 */
447                 ((0 << CC1200_PKT_CFG1_FEC_EN) |
448                  (0 << CC1200_PKT_CFG1_WHITE_DATA) |
449                  (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
450                  (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
451                  (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
452                  (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
453         CC1200_PREAMBLE_CFG1,
454                 ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
455                  (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
456         CC1200_MDMCFG2,                                  /* General Modem Parameter Configuration Reg. 2 */
457                 ((0 << CC1200_MDMCFG2_ASK_SHAPE) |
458                  (0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
459                  (12 << CC1200_MDMCFG2_UPSAMPLER_P) |
460                  (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
461 };
462
463 /*
464  * APRS deviation is 3kHz
465  *
466  *      fdev = fosc >> 22 * (256 + dev_m) << dev_e      dev_e != 0
467  *      fdev = fosc >> 21 * dev_m                       dev_e == 0
468  *
469  *      40e6 / (2 ** 21) * 157 = 2995Hz
470  */
471
472 #define APRS_DEV_E      0
473 #define APRS_DEV_M      157
474
475 /*
476  * For our APRS beacon, set the symbol rate to 9.6kBaud (8x oversampling for 1200 baud data rate)
477  *
478  *              (2**20 + DATARATE_M) * 2 ** DATARATE_E
479  *      Rdata = -------------------------------------- * fosc
480  *                           2 ** 39
481  *
482  *      DATARATE_M = 1013008
483  *      DATARATE_E = 6
484  *
485  *      Rdata = 9599.998593330383301
486  *
487  */
488 #define APRS_SYMBOL_RATE_E      6
489 #define APRS_SYMBOL_RATE_M      1013008
490 #define APRS_BUFFER_SIZE        64
491
492 static const uint16_t aprs_setup[] = {
493         CC1200_DEVIATION_M,     APRS_DEV_M,
494         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
495                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
496                                  (APRS_DEV_E << CC1200_MODCFG_DEV_E_DEV_E)),
497         CC1200_SYMBOL_RATE2,    ((APRS_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
498                                  (((APRS_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
499         CC1200_SYMBOL_RATE1,    ((APRS_SYMBOL_RATE_M >> 8) & 0xff),
500         CC1200_SYMBOL_RATE0,    ((APRS_SYMBOL_RATE_M >> 0) & 0xff),
501         CC1200_PKT_CFG2,                                 /* Packet Configuration Reg. 2 */
502                 ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
503                  (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
504                  (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
505         CC1200_PKT_CFG1,                                 /* Packet Configuration Reg. 1 */
506                 ((0 << CC1200_PKT_CFG1_FEC_EN) |
507                  (0 << CC1200_PKT_CFG1_WHITE_DATA) |
508                  (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
509                  (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
510                  (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
511                  (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
512         CC1200_PKT_CFG0,                                 /* Packet Configuration Reg. 0 */
513                 ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
514                  (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
515                  (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
516                  (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
517         CC1200_PREAMBLE_CFG1,
518                 ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
519                  (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
520         CC1200_MDMCFG2,                                  /* General Modem Parameter Configuration Reg. 2 */
521                 ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
522                  (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
523                  (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
524                  (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
525         CC1200_FIFO_CFG,
526                 ((0 << CC1200_FIFO_CFG_CRC_AUTOFLUSH) |
527                  (APRS_BUFFER_SIZE << CC1200_FIFO_CFG_FIFO_THR)),
528 };
529
530 /*
531  * For Test mode, we want an unmodulated carrier. To do that, we
532  * set the deviation to zero and enable a preamble so that the radio
533  * turns on before we send any data
534  */
535
536 static const uint16_t test_setup[] = {
537         CC1200_DEVIATION_M,     0,
538         CC1200_MODCFG_DEV_E,    ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
539                                  (CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
540                                  (0 << CC1200_MODCFG_DEV_E_DEV_E)),
541         CC1200_SYMBOL_RATE2,            ((APRS_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
542                                  (((APRS_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
543         CC1200_SYMBOL_RATE1,            ((APRS_SYMBOL_RATE_M >> 8) & 0xff),
544         CC1200_SYMBOL_RATE0,            ((APRS_SYMBOL_RATE_M >> 0) & 0xff),
545         CC1200_PKT_CFG2,        ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
546                                  (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
547         CC1200_PKT_CFG1,        ((0 << CC1200_PKT_CFG1_WHITE_DATA) |
548                                  (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
549                                  (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
550                                  (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
551         CC1200_PREAMBLE_CFG1,   ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
552                                  (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
553 };
554
555 #define AO_PKT_CFG0_INFINITE ((CC1200_PKT_CFG0_LENGTH_CONFIG_INFINITE << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
556                               (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |      \
557                               (0 << CC1200_PKT_CFG0_UART_MODE_EN) |     \
558                               (0 << CC1200_PKT_CFG0_UART_SWAP_EN))
559
560 #define AO_PKT_CFG0_FIXED ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
561                            (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |         \
562                            (0 << CC1200_PKT_CFG0_UART_MODE_EN) |        \
563                            (0 << CC1200_PKT_CFG0_UART_SWAP_EN))
564
565 static uint16_t ao_radio_mode;
566
567 #define AO_RADIO_MODE_BITS_PACKET       1
568 #define AO_RADIO_MODE_BITS_TX_BUF       4
569 #define AO_RADIO_MODE_BITS_TX_FINISH    8
570 #define AO_RADIO_MODE_BITS_RX           16
571 #define AO_RADIO_MODE_BITS_RDF          32
572 #define AO_RADIO_MODE_BITS_APRS         64
573 #define AO_RADIO_MODE_BITS_TEST         128
574 #define AO_RADIO_MODE_BITS_INFINITE     256
575 #define AO_RADIO_MODE_BITS_FIXED        512
576
577 #define AO_RADIO_MODE_NONE              0
578 #define AO_RADIO_MODE_PACKET_TX         (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_FIXED    | AO_RADIO_MODE_BITS_TX_FINISH)
579 #define AO_RADIO_MODE_PACKET_RX         (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_FIXED    | AO_RADIO_MODE_BITS_RX)
580 #define AO_RADIO_MODE_RDF               (AO_RADIO_MODE_BITS_RDF    | AO_RADIO_MODE_BITS_FIXED    | AO_RADIO_MODE_BITS_TX_FINISH)
581 #define AO_RADIO_MODE_APRS_BUF          (AO_RADIO_MODE_BITS_APRS   | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
582 #define AO_RADIO_MODE_APRS_LAST_BUF     (AO_RADIO_MODE_BITS_APRS   | AO_RADIO_MODE_BITS_FIXED    | AO_RADIO_MODE_BITS_TX_BUF)
583 #define AO_RADIO_MODE_APRS_FINISH       (AO_RADIO_MODE_BITS_APRS   | AO_RADIO_MODE_BITS_FIXED    | AO_RADIO_MODE_BITS_TX_FINISH)
584 #define AO_RADIO_MODE_TEST              (AO_RADIO_MODE_BITS_TEST   | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
585
586 static void
587 _ao_radio_set_regs(const uint16_t *regs, int nreg)
588 {
589         int i;
590
591         for (i = 0; i < nreg; i++) {
592                 ao_radio_reg_write(regs[0], regs[1]);
593                 regs += 2;
594         }
595 }
596
597 #define ao_radio_set_regs(setup) _ao_radio_set_regs(setup, (sizeof (setup) / sizeof(setup[0])) >> 1)
598
599 static void
600 ao_radio_set_mode(uint16_t new_mode)
601 {
602         uint16_t changes;
603
604         if (new_mode == ao_radio_mode)
605                 return;
606
607         changes = new_mode & (~ao_radio_mode);
608
609         if (changes & AO_RADIO_MODE_BITS_PACKET) {
610                 ao_radio_set_regs(packet_setup);
611
612                 switch (ao_config.radio_rate) {
613                 default:
614                 case AO_RADIO_RATE_38400:
615                         ao_radio_set_regs(packet_setup_384);
616                         break;
617                 case AO_RADIO_RATE_9600:
618                         ao_radio_set_regs(packet_setup_96);
619                         break;
620                 case AO_RADIO_RATE_2400:
621                         ao_radio_set_regs(packet_setup_24);
622                         break;
623                 }
624         }
625
626         if (changes & AO_RADIO_MODE_BITS_TX_BUF) {
627                 ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_TXFIFO_THR);
628                 ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH);
629         }
630
631         if (changes & AO_RADIO_MODE_BITS_TX_FINISH) {
632                 ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_PKT_SYNC_RXTX);
633                 ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH);
634         }
635
636         if (changes & AO_RADIO_MODE_BITS_RX) {
637                 ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP);
638                 ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_RISING|AO_EXTI_PRIORITY_HIGH);
639         }
640
641         if (changes & AO_RADIO_MODE_BITS_RDF)
642                 ao_radio_set_regs(rdf_setup);
643
644         if (changes & AO_RADIO_MODE_BITS_APRS)
645                 ao_radio_set_regs(aprs_setup);
646
647         if (changes & AO_RADIO_MODE_BITS_TEST)
648                 ao_radio_set_regs(test_setup);
649
650         if (changes & AO_RADIO_MODE_BITS_INFINITE)
651                 ao_radio_reg_write(CC1200_PKT_CFG0, AO_PKT_CFG0_INFINITE);
652
653         if (changes & AO_RADIO_MODE_BITS_FIXED)
654                 ao_radio_reg_write(CC1200_PKT_CFG0, AO_PKT_CFG0_FIXED);
655
656         ao_radio_mode = new_mode;
657 }
658
659 static const uint16_t radio_setup[] = {
660 #include "ao_cc1200_CC1200.h"
661 };
662
663 static uint8_t  ao_radio_configured = 0;
664
665 static void
666 ao_radio_setup(void)
667 {
668         ao_radio_strobe(CC1200_SRES);
669
670         ao_radio_set_regs(radio_setup);
671
672         ao_radio_mode = 0;
673
674         ao_radio_idle();
675
676         ao_config_get();
677
678         ao_radio_configured = 1;
679 }
680
681 static void
682 ao_radio_set_len(uint8_t len)
683 {
684         static uint8_t  last_len;
685
686         if (len != last_len) {
687                 ao_radio_reg_write(CC1200_PKT_LEN, len);
688                 last_len = len;
689         }
690 }
691
692 static void
693 ao_radio_get(uint8_t len)
694 {
695         static uint32_t last_radio_setting;
696         static uint8_t  last_radio_rate;
697
698         ao_mutex_get(&ao_radio_mutex);
699
700         if (!ao_radio_configured)
701                 ao_radio_setup();
702         if (ao_config.radio_setting != last_radio_setting) {
703                 ao_radio_reg_write(CC1200_FREQ2, ao_config.radio_setting >> 16);
704                 ao_radio_reg_write(CC1200_FREQ1, ao_config.radio_setting >> 8);
705                 ao_radio_reg_write(CC1200_FREQ0, ao_config.radio_setting);
706                 last_radio_setting = ao_config.radio_setting;
707                 ao_radio_strobe(CC1200_SCAL);
708         }
709         if (ao_config.radio_rate != last_radio_rate) {
710                 ao_radio_mode &= ~AO_RADIO_MODE_BITS_PACKET;
711                 last_radio_rate = ao_config.radio_rate;
712         }
713         ao_radio_set_len(len);
714 }
715
716 #define ao_radio_put()  ao_mutex_put(&ao_radio_mutex)
717
718 static inline uint8_t
719 ao_radio_state(void)
720 {
721         return (ao_radio_status() >> CC1200_STATUS_STATE) & CC1200_STATUS_STATE_MASK;
722 }
723
724 #if CC1200_DEBUG
725 void
726 ao_radio_show_state(char *where)
727 {
728         printf("%s: state %d len %d rxbytes %d\n",
729                where, ao_radio_state(),
730                ao_radio_reg_read(CC1200_PKT_LEN),
731                ao_radio_reg_read(CC1200_NUM_RXBYTES));
732 }
733 #else
734 #define ao_radio_show_state(where)
735 #endif
736
737 /* Wait for the radio to signal an interrupt
738  */
739 static void
740 ao_radio_wait_isr(uint16_t timeout)
741 {
742         ao_arch_block_interrupts();
743         while (!ao_radio_wake && !ao_radio_abort)
744                 if (ao_sleep_for(&ao_radio_wake, timeout))
745                         ao_radio_abort = 1;
746         ao_arch_release_interrupts();
747 }
748
749 static void
750 ao_rdf_start(uint8_t len)
751 {
752         ao_radio_abort = 0;
753         ao_radio_get(len);
754
755         ao_radio_set_mode(AO_RADIO_MODE_RDF);
756         ao_radio_wake = 0;
757 }
758
759 static void
760 ao_radio_run(void)
761 {
762         ao_radio_wake = 0;
763         ao_radio_abort = 0;
764         ao_radio_start_tx();
765         ao_radio_wait_isr(0);
766         if (!ao_radio_wake)
767                 ao_radio_idle();
768         ao_radio_put();
769 }
770
771 void
772 ao_radio_rdf(void)
773 {
774         ao_rdf_start(AO_RADIO_RDF_LEN);
775
776         ao_radio_fifo_write_fixed(ao_radio_rdf_value, AO_RADIO_RDF_LEN);
777
778         ao_radio_run();
779 }
780
781 void
782 ao_radio_continuity(uint8_t c)
783 {
784         uint8_t i;
785         uint8_t status;
786
787         ao_rdf_start(AO_RADIO_CONT_TOTAL_LEN);
788
789         status = ao_radio_fifo_write_start();
790         for (i = 0; i < 3; i++) {
791                 ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_PAUSE_LEN);
792                 if (i < c)
793                         ao_radio_spi_send_fixed(ao_radio_rdf_value, AO_RADIO_CONT_TONE_LEN);
794                 else
795                         ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_TONE_LEN);
796         }
797         ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_PAUSE_LEN);
798         status = ao_radio_fifo_write_stop(status);
799         (void) status;
800         ao_radio_run();
801 }
802
803 void
804 ao_radio_rdf_abort(void)
805 {
806         ao_radio_abort = 1;
807         ao_wakeup(&ao_radio_wake);
808 }
809
810 static uint8_t radio_on;
811
812 void
813 ao_radio_test_on(void)
814 {
815         if (!radio_on) {
816 #if HAS_MONITOR
817                 ao_monitor_disable();
818 #endif
819 #if PACKET_HAS_SLAVE
820                 ao_packet_slave_stop();
821 #endif
822 #if HAS_PAD
823                 ao_pad_disable();
824 #endif
825                 ao_radio_get(0xff);
826                 ao_radio_set_mode(AO_RADIO_MODE_TEST);
827                 ao_radio_strobe(CC1200_STX);
828 #if CC1200_TRACE
829                 { int t;
830                         for (t = 0; t < 10; t++) {
831                                 printf ("status: %02x\n", ao_radio_status());
832                                 ao_delay(AO_MS_TO_TICKS(100));
833                         }
834                 }
835 #endif
836                 radio_on = 1;
837         }
838 }
839
840 void
841 ao_radio_test_off(void)
842 {
843         if (radio_on) {
844                 ao_radio_idle();
845                 ao_radio_put();
846                 radio_on = 0;
847 #if HAS_MONITOR
848                 ao_monitor_enable();
849 #endif
850 #if HAS_PAD
851                 ao_pad_enable();
852 #endif
853         }
854 }
855
856 static void
857 ao_radio_test_cmd(void)
858 {
859         uint8_t mode = 2;
860         ao_cmd_white();
861         if (ao_cmd_lex_c != '\n')
862                 mode = ao_cmd_decimal();
863         mode++;
864         if ((mode & 2))
865                 ao_radio_test_on();
866         if (mode == 3) {
867                 printf ("Hit a character to stop..."); flush();
868                 getchar();
869                 putchar('\n');
870         }
871         if ((mode & 1))
872                 ao_radio_test_off();
873 }
874
875 void
876 ao_radio_send(const void *d, uint8_t size)
877 {
878         ao_radio_get(size);
879         ao_radio_set_mode(AO_RADIO_MODE_PACKET_TX);
880
881         ao_radio_fifo_write(d, size);
882
883         ao_radio_run();
884 }
885
886 void
887 ao_radio_send_aprs(ao_radio_fill_func fill)
888 {
889         uint8_t buf[APRS_BUFFER_SIZE];
890         int     cnt;
891         int     total = 0;
892         uint8_t done = 0;
893         uint8_t started = 0;
894
895         ao_radio_abort = 0;
896         ao_radio_get(0xff);
897         ao_radio_wake = 0;
898         while (!done && !ao_radio_abort) {
899                 cnt = (*fill)(buf, sizeof(buf));
900                 if (cnt < 0) {
901                         done = 1;
902                         cnt = -cnt;
903                 }
904                 total += cnt;
905
906                 /* At the last buffer, set the total length */
907                 if (done)
908                         ao_radio_set_len(total & 0xff);
909
910                 /* Wait for some space in the fifo */
911                 while (started && ao_radio_int_pin() != 0 && !ao_radio_abort) {
912                         ao_radio_wake = 0;
913                         ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
914                         ao_radio_wait_isr(AO_MS_TO_TICKS(1000));
915                 }
916                 if (ao_radio_abort)
917                         break;
918
919                 if (done)
920                         ao_radio_set_mode(AO_RADIO_MODE_APRS_FINISH);
921                 else
922                         ao_radio_set_mode(AO_RADIO_MODE_APRS_BUF);
923
924                 ao_radio_fifo_write(buf, cnt);
925                 if (!started) {
926                         ao_radio_strobe(CC1200_STX);
927                         started = 1;
928                 }
929         }
930         /* Wait for the transmitter to go idle */
931         while (started && ao_radio_int_pin() != 0 && !ao_radio_abort) {
932                 ao_radio_wake = 0;
933                 ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
934                 ao_radio_wait_isr(AO_MS_TO_TICKS(1000));
935         }
936         if (ao_radio_abort)
937                 ao_radio_idle();
938         ao_radio_put();
939 }
940
941 #if 0
942 static uint8_t
943 ao_radio_marc_state(void)
944 {
945         return ao_radio_reg_read(CC1200_MARCSTATE);
946 }
947
948 static uint8_t
949 ao_radio_modem_status1(void)
950 {
951         return ao_radio_reg_read(CC1200_MODEM_STATUS1);
952 }
953
954 static uint8_t
955 ao_radio_modem_status0(void)
956 {
957         return ao_radio_reg_read(CC1200_MODEM_STATUS0);
958 }
959
960 struct ao_radio_state {
961         char    where[4];
962         uint8_t marc_state;
963         uint8_t marc_status1;
964         uint8_t marc_status0;
965         uint8_t modem_status1;
966         uint8_t modem_status0;
967 };
968
969 static void
970 ao_radio_fill_state(char *where, struct ao_radio_state *s)
971 {
972         strcpy(s->where, where);
973         s->marc_state = ao_radio_marc_state();
974         s->marc_status1 = ao_radio_reg_read(CC1200_MARC_STATUS1);
975         s->marc_status0 = ao_radio_reg_read(CC1200_MARC_STATUS0);
976         s->modem_status1 = ao_radio_modem_status1();
977         s->modem_status0 = ao_radio_modem_status0();
978 }
979
980 static void
981 ao_radio_dump_state(struct ao_radio_state *s)
982 {
983         printf ("%s: marc %2x marc1 %2x marc0 %2x modem1 %2x modem0 %2x\n",
984                 s->where, s->marc_state, s->marc_status1, s->marc_status0, s->modem_status1, s->modem_status0);
985 }
986 #endif
987
988 uint8_t
989 ao_radio_recv(void *d, uint8_t size, uint8_t timeout)
990 {
991         uint8_t success = 0;
992
993         ao_radio_abort = 0;
994         ao_radio_get(size - 2);
995         ao_radio_set_mode(AO_RADIO_MODE_PACKET_RX);
996         ao_radio_wake = 0;
997         ao_radio_start_rx();
998
999         while (!ao_radio_abort) {
1000                 ao_radio_wait_isr(timeout);
1001                 if (ao_radio_wake) {
1002                         uint8_t         marc_status1 = ao_radio_reg_read(CC1200_MARC_STATUS1);
1003
1004                         /* Check the receiver status to see what happened
1005                          */
1006                         switch (marc_status1) {
1007                         case CC1200_MARC_STATUS1_RX_FINISHED:
1008                         case CC1200_MARC_STATUS1_ADDRESS:
1009                         case CC1200_MARC_STATUS1_CRC:
1010                                 /* Normal return, go fetch the bytes from the FIFO
1011                                  * and give them back to the caller
1012                                  */
1013                                 success = 1;
1014                                 break;
1015                         case CC1200_MARC_STATUS1_RX_TIMEOUT:
1016                         case CC1200_MARC_STATUS1_RX_TERMINATION:
1017                         case CC1200_MARC_STATUS1_EWOR_SYNC_LOST:
1018                         case CC1200_MARC_STATUS1_MAXIMUM_LENGTH:
1019                         case CC1200_MARC_STATUS1_RX_FIFO_OVERFLOW:
1020                         case CC1200_MARC_STATUS1_RX_FIFO_UNDERFLOW:
1021                                 /* Something weird happened; reset the radio and
1022                                  * return failure
1023                                  */
1024                                 success = 0;
1025                                 break;
1026                         default:
1027                                 /* some other status; go wait for the radio to do something useful
1028                                  */
1029                                 continue;
1030                         }
1031                         break;
1032                 } else {
1033                         uint8_t modem_status1 = ao_radio_reg_read(CC1200_MODEM_STATUS1);
1034
1035                         /* Check to see if the packet header has been seen, in which case we'll
1036                          * want to keep waiting for the rest of the packet to appear
1037                          */
1038                         if (modem_status1 & (1 << CC1200_MODEM_STATUS1_SYNC_FOUND))
1039                         {
1040                                 ao_radio_abort = 0;
1041
1042                                 /* Set a timeout based on the packet length so that we make sure to
1043                                  * wait long enough to receive the whole thing.
1044                                  *
1045                                  * timeout = bits * FEC expansion / rate
1046                                  */
1047                                 switch (ao_config.radio_rate) {
1048                                 default:
1049                                 case AO_RADIO_RATE_38400:
1050                                         timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 384) + 1;
1051                                         break;
1052                                 case AO_RADIO_RATE_9600:
1053                                         timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 96) + 1;
1054                                         break;
1055                                 case AO_RADIO_RATE_2400:
1056                                         timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 24) + 1;
1057                                         break;
1058                                 }
1059                         }
1060                 }
1061         }
1062
1063         if (success) {
1064                 int8_t  rssi;
1065                 uint8_t status;
1066
1067                 status = ao_radio_fifo_read(d, size);
1068                 (void) status;
1069                 rssi = ((int8_t *) d)[size - 2];
1070                 ao_radio_rssi = rssi;
1071
1072                 /* Bound it to the representable range */
1073                 if (rssi > -11)
1074                         rssi = -11;
1075
1076                 /* Write it back to the packet */
1077                 ((int8_t *) d)[size-2] = AO_RADIO_FROM_RSSI(rssi);
1078         } else {
1079                 ao_radio_idle();
1080                 ao_radio_rssi = 0;
1081         }
1082
1083         ao_radio_put();
1084         return success;
1085 }
1086
1087
1088 #if CC1200_DEBUG
1089 static char *cc1200_state_name[] = {
1090         [CC1200_STATUS_STATE_IDLE] = "IDLE",
1091         [CC1200_STATUS_STATE_RX] = "RX",
1092         [CC1200_STATUS_STATE_TX] = "TX",
1093         [CC1200_STATUS_STATE_FSTXON] = "FSTXON",
1094         [CC1200_STATUS_STATE_CALIBRATE] = "CALIBRATE",
1095         [CC1200_STATUS_STATE_SETTLING] = "SETTLING",
1096         [CC1200_STATUS_STATE_RX_FIFO_ERROR] = "RX_FIFO_ERROR",
1097         [CC1200_STATUS_STATE_TX_FIFO_ERROR] = "TX_FIFO_ERROR",
1098 };
1099
1100 struct ao_cc1200_reg {
1101         uint16_t        addr;
1102         char            *name;
1103 };
1104
1105 static const struct ao_cc1200_reg ao_cc1200_reg[] = {
1106         { .addr = CC1200_IOCFG3,        .name = "IOCFG3" },
1107         { .addr = CC1200_IOCFG2,        .name = "IOCFG2" },
1108         { .addr = CC1200_IOCFG1,        .name = "IOCFG1" },
1109         { .addr = CC1200_IOCFG0,        .name = "IOCFG0" },
1110         { .addr = CC1200_SYNC3, .name = "SYNC3" },
1111         { .addr = CC1200_SYNC2, .name = "SYNC2" },
1112         { .addr = CC1200_SYNC1, .name = "SYNC1" },
1113         { .addr = CC1200_SYNC0, .name = "SYNC0" },
1114         { .addr = CC1200_SYNC_CFG1,     .name = "SYNC_CFG1" },
1115         { .addr = CC1200_SYNC_CFG0,     .name = "SYNC_CFG0" },
1116         { .addr = CC1200_DEVIATION_M,   .name = "DEVIATION_M" },
1117         { .addr = CC1200_MODCFG_DEV_E,  .name = "MODCFG_DEV_E" },
1118         { .addr = CC1200_DCFILT_CFG,    .name = "DCFILT_CFG" },
1119         { .addr = CC1200_PREAMBLE_CFG1, .name = "PREAMBLE_CFG1" },
1120         { .addr = CC1200_PREAMBLE_CFG0, .name = "PREAMBLE_CFG0" },
1121         { .addr = CC1200_IQIC,  .name = "IQIC" },
1122         { .addr = CC1200_CHAN_BW,       .name = "CHAN_BW" },
1123         { .addr = CC1200_MDMCFG2,       .name = "MDMCFG2" },
1124         { .addr = CC1200_MDMCFG1,       .name = "MDMCFG1" },
1125         { .addr = CC1200_MDMCFG0,       .name = "MDMCFG0" },
1126         { .addr = CC1200_SYMBOL_RATE2,  .name = "SYMBOL_RATE2" },
1127         { .addr = CC1200_SYMBOL_RATE1,  .name = "SYMBOL_RATE1" },
1128         { .addr = CC1200_SYMBOL_RATE0,  .name = "SYMBOL_RATE0" },
1129         { .addr = CC1200_AGC_REF,       .name = "AGC_REF" },
1130         { .addr = CC1200_AGC_CS_THR,    .name = "AGC_CS_THR" },
1131         { .addr = CC1200_AGC_GAIN_ADJUST,       .name = "AGC_GAIN_ADJUST" },
1132         { .addr = CC1200_AGC_CFG3,      .name = "AGC_CFG3" },
1133         { .addr = CC1200_AGC_CFG2,      .name = "AGC_CFG2" },
1134         { .addr = CC1200_AGC_CFG1,      .name = "AGC_CFG1" },
1135         { .addr = CC1200_AGC_CFG0,      .name = "AGC_CFG0" },
1136         { .addr = CC1200_FIFO_CFG,      .name = "FIFO_CFG" },
1137         { .addr = CC1200_DEV_ADDR,      .name = "DEV_ADDR" },
1138         { .addr = CC1200_SETTLING_CFG,  .name = "SETTLING_CFG" },
1139         { .addr = CC1200_FS_CFG,        .name = "FS_CFG" },
1140         { .addr = CC1200_WOR_CFG1,      .name = "WOR_CFG1" },
1141         { .addr = CC1200_WOR_CFG0,      .name = "WOR_CFG0" },
1142         { .addr = CC1200_WOR_EVENT0_MSB,        .name = "WOR_EVENT0_MSB" },
1143         { .addr = CC1200_WOR_EVENT0_LSB,        .name = "WOR_EVENT0_LSB" },
1144         { .addr = CC1200_RXDCM_TIME,            .name = "RXDCM_TIME" },
1145         { .addr = CC1200_PKT_CFG2,      .name = "PKT_CFG2" },
1146         { .addr = CC1200_PKT_CFG1,      .name = "PKT_CFG1" },
1147         { .addr = CC1200_PKT_CFG0,      .name = "PKT_CFG0" },
1148         { .addr = CC1200_RFEND_CFG1,    .name = "RFEND_CFG1" },
1149         { .addr = CC1200_RFEND_CFG0,    .name = "RFEND_CFG0" },
1150         { .addr = CC1200_PA_CFG1,       .name = "PA_CFG1" },
1151         { .addr = CC1200_PA_CFG0,       .name = "PA_CFG0" },
1152         { .addr = CC1200_PKT_LEN,       .name = "PKT_LEN" },
1153         { .addr = CC1200_IF_MIX_CFG,    .name = "IF_MIX_CFG" },
1154         { .addr = CC1200_FREQOFF_CFG,   .name = "FREQOFF_CFG" },
1155         { .addr = CC1200_TOC_CFG,       .name = "TOC_CFG" },
1156         { .addr = CC1200_MARC_SPARE,    .name = "MARC_SPARE" },
1157         { .addr = CC1200_ECG_CFG,       .name = "ECG_CFG" },
1158         { .addr = CC1200_EXT_CTRL,      .name = "EXT_CTRL" },
1159         { .addr = CC1200_RCCAL_FINE,    .name = "RCCAL_FINE" },
1160         { .addr = CC1200_RCCAL_COARSE,  .name = "RCCAL_COARSE" },
1161         { .addr = CC1200_RCCAL_OFFSET,  .name = "RCCAL_OFFSET" },
1162         { .addr = CC1200_FREQOFF1,      .name = "FREQOFF1" },
1163         { .addr = CC1200_FREQOFF0,      .name = "FREQOFF0" },
1164         { .addr = CC1200_FREQ2, .name = "FREQ2" },
1165         { .addr = CC1200_FREQ1, .name = "FREQ1" },
1166         { .addr = CC1200_FREQ0, .name = "FREQ0" },
1167         { .addr = CC1200_IF_ADC2,       .name = "IF_ADC2" },
1168         { .addr = CC1200_IF_ADC1,       .name = "IF_ADC1" },
1169         { .addr = CC1200_IF_ADC0,       .name = "IF_ADC0" },
1170         { .addr = CC1200_FS_DIG1,       .name = "FS_DIG1" },
1171         { .addr = CC1200_FS_DIG0,       .name = "FS_DIG0" },
1172         { .addr = CC1200_FS_CAL3,       .name = "FS_CAL3" },
1173         { .addr = CC1200_FS_CAL2,       .name = "FS_CAL2" },
1174         { .addr = CC1200_FS_CAL1,       .name = "FS_CAL1" },
1175         { .addr = CC1200_FS_CAL0,       .name = "FS_CAL0" },
1176         { .addr = CC1200_FS_CHP,        .name = "FS_CHP" },
1177         { .addr = CC1200_FS_DIVTWO,     .name = "FS_DIVTWO" },
1178         { .addr = CC1200_FS_DSM1,       .name = "FS_DSM1" },
1179         { .addr = CC1200_FS_DSM0,       .name = "FS_DSM0" },
1180         { .addr = CC1200_FS_DVC1,       .name = "FS_DVC1" },
1181         { .addr = CC1200_FS_DVC0,       .name = "FS_DVC0" },
1182         { .addr = CC1200_FS_LBI,        .name = "FS_LBI" },
1183         { .addr = CC1200_FS_PFD,        .name = "FS_PFD" },
1184         { .addr = CC1200_FS_PRE,        .name = "FS_PRE" },
1185         { .addr = CC1200_FS_REG_DIV_CML,        .name = "FS_REG_DIV_CML" },
1186         { .addr = CC1200_FS_SPARE,      .name = "FS_SPARE" },
1187         { .addr = CC1200_FS_VCO4,       .name = "FS_VCO4" },
1188         { .addr = CC1200_FS_VCO3,       .name = "FS_VCO3" },
1189         { .addr = CC1200_FS_VCO2,       .name = "FS_VCO2" },
1190         { .addr = CC1200_FS_VCO1,       .name = "FS_VCO1" },
1191         { .addr = CC1200_FS_VCO0,       .name = "FS_VCO0" },
1192         { .addr = CC1200_GBIAS6,        .name = "GBIAS6" },
1193         { .addr = CC1200_GBIAS5,        .name = "GBIAS5" },
1194         { .addr = CC1200_GBIAS4,        .name = "GBIAS4" },
1195         { .addr = CC1200_GBIAS3,        .name = "GBIAS3" },
1196         { .addr = CC1200_GBIAS2,        .name = "GBIAS2" },
1197         { .addr = CC1200_GBIAS1,        .name = "GBIAS1" },
1198         { .addr = CC1200_GBIAS0,        .name = "GBIAS0" },
1199         { .addr = CC1200_IFAMP, .name = "IFAMP" },
1200         { .addr = CC1200_LNA,   .name = "LNA" },
1201         { .addr = CC1200_RXMIX, .name = "RXMIX" },
1202         { .addr = CC1200_XOSC5, .name = "XOSC5" },
1203         { .addr = CC1200_XOSC4, .name = "XOSC4" },
1204         { .addr = CC1200_XOSC3, .name = "XOSC3" },
1205         { .addr = CC1200_XOSC2, .name = "XOSC2" },
1206         { .addr = CC1200_XOSC1, .name = "XOSC1" },
1207         { .addr = CC1200_XOSC0, .name = "XOSC0" },
1208         { .addr = CC1200_ANALOG_SPARE,  .name = "ANALOG_SPARE" },
1209         { .addr = CC1200_PA_CFG3,       .name = "PA_CFG3" },
1210         { .addr = CC1200_WOR_TIME1,     .name = "WOR_TIME1" },
1211         { .addr = CC1200_WOR_TIME0,     .name = "WOR_TIME0" },
1212         { .addr = CC1200_WOR_CAPTURE1,  .name = "WOR_CAPTURE1" },
1213         { .addr = CC1200_WOR_CAPTURE0,  .name = "WOR_CAPTURE0" },
1214         { .addr = CC1200_BIST,  .name = "BIST" },
1215         { .addr = CC1200_DCFILTOFFSET_I1,       .name = "DCFILTOFFSET_I1" },
1216         { .addr = CC1200_DCFILTOFFSET_I0,       .name = "DCFILTOFFSET_I0" },
1217         { .addr = CC1200_DCFILTOFFSET_Q1,       .name = "DCFILTOFFSET_Q1" },
1218         { .addr = CC1200_DCFILTOFFSET_Q0,       .name = "DCFILTOFFSET_Q0" },
1219         { .addr = CC1200_IQIE_I1,       .name = "IQIE_I1" },
1220         { .addr = CC1200_IQIE_I0,       .name = "IQIE_I0" },
1221         { .addr = CC1200_IQIE_Q1,       .name = "IQIE_Q1" },
1222         { .addr = CC1200_IQIE_Q0,       .name = "IQIE_Q0" },
1223         { .addr = CC1200_RSSI1, .name = "RSSI1" },
1224         { .addr = CC1200_RSSI0, .name = "RSSI0" },
1225         { .addr = CC1200_MARCSTATE,     .name = "MARCSTATE" },
1226         { .addr = CC1200_LQI_VAL,       .name = "LQI_VAL" },
1227         { .addr = CC1200_PQT_SYNC_ERR,  .name = "PQT_SYNC_ERR" },
1228         { .addr = CC1200_DEM_STATUS,    .name = "DEM_STATUS" },
1229         { .addr = CC1200_FREQOFF_EST1,  .name = "FREQOFF_EST1" },
1230         { .addr = CC1200_FREQOFF_EST0,  .name = "FREQOFF_EST0" },
1231         { .addr = CC1200_AGC_GAIN3,     .name = "AGC_GAIN3" },
1232         { .addr = CC1200_AGC_GAIN2,     .name = "AGC_GAIN2" },
1233         { .addr = CC1200_AGC_GAIN1,     .name = "AGC_GAIN1" },
1234         { .addr = CC1200_AGC_GAIN0,     .name = "AGC_GAIN0" },
1235         { .addr = CC1200_SOFT_RX_DATA_OUT,      .name = "SOFT_RX_DATA_OUT" },
1236         { .addr = CC1200_SOFT_TX_DATA_IN,       .name = "SOFT_TX_DATA_IN" },
1237         { .addr = CC1200_ASK_SOFT_RX_DATA,      .name = "ASK_SOFT_RX_DATA" },
1238         { .addr = CC1200_RNDGEN,        .name = "RNDGEN" },
1239         { .addr = CC1200_MAGN2, .name = "MAGN2" },
1240         { .addr = CC1200_MAGN1, .name = "MAGN1" },
1241         { .addr = CC1200_MAGN0, .name = "MAGN0" },
1242         { .addr = CC1200_ANG1,  .name = "ANG1" },
1243         { .addr = CC1200_ANG0,  .name = "ANG0" },
1244         { .addr = CC1200_CHFILT_I2,     .name = "CHFILT_I2" },
1245         { .addr = CC1200_CHFILT_I1,     .name = "CHFILT_I1" },
1246         { .addr = CC1200_CHFILT_I0,     .name = "CHFILT_I0" },
1247         { .addr = CC1200_CHFILT_Q2,     .name = "CHFILT_Q2" },
1248         { .addr = CC1200_CHFILT_Q1,     .name = "CHFILT_Q1" },
1249         { .addr = CC1200_CHFILT_Q0,     .name = "CHFILT_Q0" },
1250         { .addr = CC1200_GPIO_STATUS,   .name = "GPIO_STATUS" },
1251         { .addr = CC1200_FSCAL_CTRL,    .name = "FSCAL_CTRL" },
1252         { .addr = CC1200_PHASE_ADJUST,  .name = "PHASE_ADJUST" },
1253         { .addr = CC1200_PARTNUMBER,    .name = "PARTNUMBER" },
1254         { .addr = CC1200_PARTVERSION,   .name = "PARTVERSION" },
1255         { .addr = CC1200_SERIAL_STATUS, .name = "SERIAL_STATUS" },
1256         { .addr = CC1200_MODEM_STATUS1, .name = "MODEM_STATUS1" },
1257         { .addr = CC1200_MODEM_STATUS0, .name = "MODEM_STATUS0" },
1258         { .addr = CC1200_MARC_STATUS1,  .name = "MARC_STATUS1" },
1259         { .addr = CC1200_MARC_STATUS0,  .name = "MARC_STATUS0" },
1260         { .addr = CC1200_PA_IFAMP_TEST, .name = "PA_IFAMP_TEST" },
1261         { .addr = CC1200_FSRF_TEST,     .name = "FSRF_TEST" },
1262         { .addr = CC1200_PRE_TEST,      .name = "PRE_TEST" },
1263         { .addr = CC1200_PRE_OVR,       .name = "PRE_OVR" },
1264         { .addr = CC1200_ADC_TEST,      .name = "ADC_TEST" },
1265         { .addr = CC1200_DVC_TEST,      .name = "DVC_TEST" },
1266         { .addr = CC1200_ATEST, .name = "ATEST" },
1267         { .addr = CC1200_ATEST_LVDS,    .name = "ATEST_LVDS" },
1268         { .addr = CC1200_ATEST_MODE,    .name = "ATEST_MODE" },
1269         { .addr = CC1200_XOSC_TEST1,    .name = "XOSC_TEST1" },
1270         { .addr = CC1200_XOSC_TEST0,    .name = "XOSC_TEST0" },
1271         { .addr = CC1200_RXFIRST,       .name = "RXFIRST" },
1272         { .addr = CC1200_TXFIRST,       .name = "TXFIRST" },
1273         { .addr = CC1200_RXLAST,        .name = "RXLAST" },
1274         { .addr = CC1200_TXLAST,        .name = "TXLAST" },
1275         { .addr = CC1200_NUM_TXBYTES,   .name = "NUM_TXBYTES" },
1276         { .addr = CC1200_NUM_RXBYTES,   .name = "NUM_RXBYTES" },
1277         { .addr = CC1200_FIFO_NUM_TXBYTES,      .name = "FIFO_NUM_TXBYTES" },
1278         { .addr = CC1200_FIFO_NUM_RXBYTES,      .name = "FIFO_NUM_RXBYTES" },
1279 };
1280
1281 #define AO_NUM_CC1200_REG       (sizeof ao_cc1200_reg / sizeof ao_cc1200_reg[0])
1282
1283 static uint8_t
1284 ao_radio_get_marc_status(void)
1285 {
1286         return ao_radio_reg_read(CC1200_MARC_STATUS1);
1287 }
1288
1289 static void ao_radio_show(void) {
1290         uint8_t status;
1291         unsigned int    i;
1292
1293         ao_mutex_get(&ao_radio_mutex);
1294         status = ao_radio_status();
1295         printf ("Status:   %02x\n", status);
1296         printf ("CHIP_RDY: %d\n", (status >> CC1200_STATUS_CHIP_RDY) & 1);
1297         printf ("STATE:    %s\n", cc1200_state_name[(status >> CC1200_STATUS_STATE) & CC1200_STATUS_STATE_MASK]);
1298         printf ("MARC:     %02x\n", ao_radio_get_marc_status());
1299
1300         for (i = 0; i < AO_NUM_CC1200_REG; i++)
1301                 printf ("\t%02x %-20.20s\n", ao_radio_reg_read(ao_cc1200_reg[i].addr), ao_cc1200_reg[i].name);
1302
1303         ao_radio_put();
1304 }
1305
1306 static void ao_radio_beep(void) {
1307         ao_radio_rdf();
1308 }
1309
1310 static void ao_radio_packet(void) {
1311         static const uint8_t packet[] = {
1312 #if 1
1313                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1314                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1315                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1316                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1317 #else
1318                 3, 1, 2, 3
1319 #endif
1320         };
1321
1322         ao_radio_send(packet, sizeof (packet));
1323 }
1324
1325 void
1326 ao_radio_test_recv(void)
1327 {
1328         static uint8_t  bytes[34];
1329         uint8_t b;
1330
1331         if (ao_radio_recv(bytes, 34, 0)) {
1332                 if (bytes[33] & 0x80)
1333                         printf ("CRC OK");
1334                 else
1335                         printf ("CRC BAD");
1336                 printf (" RSSI %d", AO_RSSI_FROM_RADIO(bytes[32]));
1337                 for (b = 0; b < 32; b++)
1338                         printf (" %02x", bytes[b]);
1339
1340                 printf (" RSSI %02x LQI %02x", bytes[32], bytes[33]);
1341                 printf ("\n");
1342         }
1343 }
1344
1345 #if HAS_APRS
1346 #include <ao_aprs.h>
1347
1348 static void
1349 ao_radio_aprs(void)
1350 {
1351 #if PACKET_HAS_SLAVE
1352         ao_packet_slave_stop();
1353 #endif
1354         ao_aprs_send();
1355 }
1356 #endif
1357 #endif
1358
1359 #if CC1200_LOW_LEVEL_DEBUG
1360 static void
1361 ao_radio_strobe_test(void)
1362 {
1363         uint8_t addr;
1364         uint8_t r;
1365
1366         addr = ao_cmd_hex();
1367         if (ao_cmd_status != ao_cmd_success)
1368                 return;
1369         r = ao_radio_strobe(addr);
1370         printf ("Strobe %02x -> %02x (rdy %d state %d)\n",
1371                 addr,
1372                 r,
1373                 r >> 7,
1374                 (r >> 4) & 0x7);
1375 }
1376
1377 static void
1378 ao_radio_write_test(void)
1379 {
1380         uint16_t        addr;
1381         uint8_t         data;
1382
1383         addr = ao_cmd_hex();
1384         if (ao_cmd_status != ao_cmd_success)
1385                 return;
1386         data = ao_cmd_hex();
1387         if (ao_cmd_status != ao_cmd_success)
1388                 return;
1389         printf ("Write %04x = %02x\n", addr, data);
1390         ao_radio_reg_write(addr, data);
1391 }
1392
1393 static void
1394 ao_radio_read_test(void)
1395 {
1396         uint16_t        addr;
1397         uint8_t         data;
1398
1399         addr = ao_cmd_hex();
1400         if (ao_cmd_status != ao_cmd_success)
1401                 return;
1402         data = ao_radio_reg_read(addr);
1403         printf ("Read %04x = %02x\n", addr, data);
1404 }
1405 #endif
1406
1407 static const struct ao_cmds ao_radio_cmds[] = {
1408         { ao_radio_test_cmd,    "C <1 start, 0 stop, none both>\0Radio carrier test" },
1409 #if CC1200_DEBUG
1410 #if HAS_APRS
1411         { ao_radio_aprs,        "G\0Send APRS packet" },
1412 #endif
1413         { ao_radio_show,        "R\0Show CC1200 status" },
1414         { ao_radio_beep,        "b\0Emit an RDF beacon" },
1415         { ao_radio_packet,      "p\0Send a test packet" },
1416         { ao_radio_test_recv,   "q\0Recv a test packet" },
1417 #endif
1418 #if CC1200_LOW_LEVEL_DEBUG
1419         { ao_radio_strobe_test, "A <value>\0Strobe radio" },
1420         { ao_radio_write_test,  "W <addr> <value>\0Write radio reg" },
1421         { ao_radio_read_test,   "B <addr>\0Read radio reg" },
1422 #endif
1423         { 0, NULL }
1424 };
1425
1426 void
1427 ao_radio_init(void)
1428 {
1429         ao_radio_configured = 0;
1430         ao_spi_init_cs (AO_CC1200_SPI_CS_PORT, (1 << AO_CC1200_SPI_CS_PIN));
1431
1432 #if 0
1433         AO_CC1200_SPI_CS_PORT->bsrr = ((uint32_t) (1 << AO_CC1200_SPI_CS_PIN));
1434         for (i = 0; i < 10000; i++) {
1435                 if ((SPI_2_PORT->idr & (1 << SPI_2_MISO_PIN)) == 0)
1436                         break;
1437         }
1438         AO_CC1200_SPI_CS_PORT->bsrr = (1 << AO_CC1200_SPI_CS_PIN);
1439         if (i == 10000)
1440                 ao_panic(AO_PANIC_SELF_TEST_CC1200);
1441 #endif
1442
1443         /* Enable the EXTI interrupt for the appropriate pin */
1444         ao_enable_port(AO_CC1200_INT_PORT);
1445         ao_exti_setup(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN,
1446                       AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH,
1447                       ao_radio_isr);
1448
1449         ao_cmd_register(&ao_radio_cmds[0]);
1450 }