2 * Copyright © 2019 Bdale Garbee <bdale@gag.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
17 #include "ao_ads124s0x.h"
25 #define PRINTD(l, ...) do { if (DEBUG & (l)) { printf ("\r%5u %s: ", ao_tick_count, __func__); printf(__VA_ARGS__); flush(); } } while(0)
30 struct ao_ads124s0x_sample ao_ads124s0x_current;
32 uint8_t ao_ads124s0x_drdy;
35 ao_ads124s0x_start(void) {
36 ao_spi_get_bit(AO_ADS124S0X_SPI_CS_PORT,
37 AO_ADS124S0X_SPI_CS_PIN,
39 AO_ADS124S0X_SPI_SPEED);
43 ao_ads124s0x_stop(void) {
44 ao_spi_put_bit(AO_ADS124S0X_SPI_CS_PORT,
45 AO_ADS124S0X_SPI_CS_PIN,
46 AO_ADS124S0X_SPI_BUS);
50 ao_ads124s0x_reg_read(uint8_t addr)
54 d[0] = addr | AO_ADS124S0X_RREG;
58 ao_spi_duplex(d, d, 3, AO_ADS124S0X_SPI_BUS);
61 PRINTD(DEBUG_LOW, "read %x = %x\n", addr, d[0]);
68 ao_ads124s0x_reg_write(uint8_t addr, uint8_t value)
72 PRINTD(DEBUG_LOW, "write %x %x\n", addr, value);
73 d[0] = addr | AO_ADS124S0X_WREG;
77 ao_spi_send(d, 3, AO_ADS124S0X_SPI_BUS);
84 ao_ads124s0x_isr(void)
86 ao_ads124s0x_drdy = 1;
87 ao_wakeup(&ao_ads124s0x_drdy);
91 ao_ads124s0x_setup(void)
97 ao_gpio_set(AO_ADS124S0X_RESET_PORT, AO_ADS124S0X_RESET_PIN, 1);
101 uint8_t devid = ao_ads124s0x_reg_read(AO_ADS124S0X_ID);
102 if ((devid & 7) != AO_ADS124S0X_ID_ADS124S06)
103 ao_panic(AO_PANIC_SELF_TEST_ADS124S0X);
105 ao_exti_setup(AO_ADS124S0X_DRDY_PORT, AO_ADS124S0X_DRDY_PIN,
106 AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH,
109 /* run converter at 4ksps so we can scan 4 channels at 1ksps using
110 full duplex ala datasheet section 9.5.4.3 */
112 d[0] = AO_ADS124S0X_INPMUX | AO_ADS124S0X_WREG;
113 d[1] = 8; /* write 8 registers starting with INPMUX */
114 d[2] = 0x0c; /* input mux AIN0 relative to AINCOM */
115 d[3] = 0x00; /* default first conversion delay, pga disabled */
116 d[4] = 0x1e; /* gchop disabled, internal clock, continuous
117 conversion, low-latency filter, 4000 SPS */
118 d[5] = 0x00; /* ref monitor disabled, ref buffers bypassed, ref
119 set to REFP0/REFN0, internal reference off */
120 d[6] = 0x00; /* pga otuput rail, low side power switch, excitation
121 current source all off */
122 d[7] = 0xff; /* idac1 and idac2 disconnected */
123 d[8] = 0x00; /* all vbias disconnected */
124 d[9] = 0x10; /* sys monitor off, spi timeout disabled, crc disabled,
125 prepending status byte disabled */
126 ao_ads124s0x_start();
127 ao_spi_send(d, 10, AO_ADS124S0X_SPI_BUS);
130 /* start conversions */
132 d[0] = AO_ADS124S0X_START;
133 ao_ads124s0x_start();
134 ao_spi_send(d, 1, AO_ADS124S0X_SPI_BUS);
141 uint8_t d[3], curchan;
143 ao_ads124s0x_setup();
145 ao_exti_enable(AO_ADS124S0X_DRDY_PORT, AO_ADS124S0X_DRDY_PIN);
148 ao_arch_block_interrupts();
149 ao_ads124s0x_drdy = 0;
150 while (ao_ads124s0x_drdy == 0)
151 ao_sleep(&ao_ads124s0x_drdy);
152 ao_arch_release_interrupts();
155 nextchan = (nextchan + 1) % AO_ADS124S0X_CHANNELS;
157 d[0] = AO_ADS124S0X_INPMUX | AO_ADS124S0X_WREG;
159 d[2] = nextchan << 4 | 0x0c; ; /* relative to AINCOM */
160 ao_ads124s0x_start();
161 ao_spi_duplex(d, d, 3, AO_ADS124S0X_SPI_BUS);
164 ao_ads124s0x_current.ain[curchan] =
165 d[0] << 16 | d[1] << 8 | d[2];
168 // If nextchan == 0, we have a complete set of inputs
169 // and we need to log them somewhere
171 ao_ads124s0x_drdy = 0;
175 static struct ao_task ao_ads124s0x_task;
178 ao_ads124s0x_dump(void)
184 ao_add_task(&ao_ads124s0x_task, ao_ads124s0x, "ads124s0x");
187 printf ("ADS124S0X value %d %d %d %d\n",
188 ao_ads124s0x_current.ain[0],
189 ao_ads124s0x_current.ain[1],
190 ao_ads124s0x_current.ain[2],
191 ao_ads124s0x_current.ain[3]);
194 const struct ao_cmds ao_ads124s0x_cmds[] = {
195 { ao_ads124s0x_dump, "I\0Display ADS124S0X data" },
200 ao_ads124s0x_init(void)
202 ao_cmd_register(ao_ads124s0x_cmds);
204 ao_enable_output(AO_ADS124S0X_RESET_PORT, AO_ADS124S0X_RESET_PIN, 0);
206 ao_spi_init_cs(AO_ADS124S0X_SPI_CS_PORT,
207 (1 << AO_ADS124S0X_SPI_CS_PIN));
209 // ao_add_task(&ao_ads124s0x_task, ao_ads124s0x, "ads124s0x");