2 * Copyright © 2009 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
19 #include "ao_25lc1024.h"
21 #define EE_BLOCK_SIZE ((uint16_t) (256))
22 #define EE_BLOCK_SHIFT 8
23 #define EE_DEVICE_SIZE ((uint32_t) 128 * (uint32_t) 1024)
25 /* Total bytes of available storage */
26 __pdata uint32_t ao_storage_total;
28 /* Block size - device is erased in these units. At least 256 bytes */
29 __pdata uint32_t ao_storage_block;
31 /* Byte offset of config block. Will be ao_storage_block bytes long */
32 __pdata uint32_t ao_storage_config;
34 /* Storage unit size - device reads and writes must be within blocks of this size. Usually 256 bytes. */
35 __pdata uint16_t ao_storage_unit;
38 * Using SPI on USART 0, with P1_2 as the chip select
45 static __xdata uint8_t ao_ee_mutex;
47 #define ao_ee_delay() do { \
53 #define ao_ee_cs_low() ao_spi_get_bit(EE_CS_PORT, EE_CS_PIN, EE_CS, AO_EE_SPI_BUS, AO_SPI_SPEED_FAST)
55 #define ao_ee_cs_high() ao_spi_put_bit(EE_CS_PORT, EE_CS_PIN, EE_CS, AO_EE_SPI_BUS)
57 struct ao_ee_instruction {
60 } __xdata ao_ee_instruction;
63 ao_ee_write_enable(void)
66 ao_ee_instruction.instruction = EE_WREN;
67 ao_spi_send(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
75 ao_ee_instruction.instruction = EE_RDSR;
76 ao_spi_send(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
77 ao_spi_recv(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
79 return ao_ee_instruction.instruction;
83 ao_ee_wrsr(uint8_t status)
86 ao_ee_instruction.instruction = EE_WRSR;
87 ao_ee_instruction.address[0] = status;
88 ao_spi_send(&ao_ee_instruction, 2, AO_EE_SPI_BUS);
92 #define EE_BLOCK_NONE 0xffff
94 static __xdata uint8_t ao_ee_data[EE_BLOCK_SIZE];
95 static __pdata uint16_t ao_ee_block = EE_BLOCK_NONE;
96 static __pdata uint8_t ao_ee_block_dirty;
98 /* Write the current block to the EEPROM */
100 ao_ee_write_block(void)
104 status = ao_ee_rdsr();
105 if (status & (EE_STATUS_BP0|EE_STATUS_BP1|EE_STATUS_WPEN)) {
106 status &= ~(EE_STATUS_BP0|EE_STATUS_BP1|EE_STATUS_WPEN);
109 ao_ee_write_enable();
111 ao_ee_instruction.instruction = EE_WRITE;
112 ao_ee_instruction.address[0] = ao_ee_block >> 8;
113 ao_ee_instruction.address[1] = ao_ee_block;
114 ao_ee_instruction.address[2] = 0;
115 ao_spi_send(&ao_ee_instruction, 4, AO_EE_SPI_BUS);
116 ao_spi_send(ao_ee_data, EE_BLOCK_SIZE, AO_EE_SPI_BUS);
119 uint8_t status = ao_ee_rdsr();
120 if ((status & EE_STATUS_WIP) == 0)
125 /* Read the current block from the EEPROM */
127 ao_ee_read_block(void)
130 ao_ee_instruction.instruction = EE_READ;
131 ao_ee_instruction.address[0] = ao_ee_block >> 8;
132 ao_ee_instruction.address[1] = ao_ee_block;
133 ao_ee_instruction.address[2] = 0;
134 ao_spi_send(&ao_ee_instruction, 4, AO_EE_SPI_BUS);
135 ao_spi_recv(ao_ee_data, EE_BLOCK_SIZE, AO_EE_SPI_BUS);
140 ao_ee_flush_internal(void)
142 if (ao_ee_block_dirty) {
144 ao_ee_block_dirty = 0;
149 ao_ee_fill(uint16_t block)
151 if (block != ao_ee_block) {
152 ao_ee_flush_internal();
159 ao_storage_device_write(uint32_t pos, __xdata void *buf, uint16_t len) __reentrant
161 uint16_t block = (uint16_t) (pos >> EE_BLOCK_SHIFT);
163 /* Transfer the data */
164 ao_mutex_get(&ao_ee_mutex); {
165 if (len != EE_BLOCK_SIZE)
168 ao_ee_flush_internal();
171 ao_xmemcpy(ao_ee_data + (uint16_t) (pos & 0xff), buf, len);
172 ao_ee_block_dirty = 1;
173 } ao_mutex_put(&ao_ee_mutex);
178 ao_storage_device_read(uint32_t pos, __xdata void *buf, uint16_t len) __reentrant
180 uint16_t block = (uint16_t) (pos >> EE_BLOCK_SHIFT);
182 /* Transfer the data */
183 ao_mutex_get(&ao_ee_mutex); {
185 ao_xmemcpy(buf, ao_ee_data + (uint16_t) (pos & 0xff), len);
186 } ao_mutex_put(&ao_ee_mutex);
191 ao_storage_flush(void) __reentrant
193 ao_mutex_get(&ao_ee_mutex); {
194 ao_ee_flush_internal();
195 } ao_mutex_put(&ao_ee_mutex);
199 ao_storage_erase(uint32_t pos) __reentrant
201 ao_mutex_get(&ao_ee_mutex); {
202 ao_ee_flush_internal();
203 ao_ee_block = (uint16_t) (pos >> EE_BLOCK_SHIFT);
204 ao_xmemset(ao_ee_data, 0xff, EE_BLOCK_SIZE);
205 ao_ee_block_dirty = 1;
206 } ao_mutex_put(&ao_ee_mutex);
211 ee_store(void) __reentrant
216 ao_storage_setup(void)
218 if (ao_storage_total == 0) {
219 ao_storage_total = EE_DEVICE_SIZE;
220 ao_storage_block = EE_BLOCK_SIZE;
221 ao_storage_config = EE_DEVICE_SIZE - EE_BLOCK_SIZE;
222 ao_storage_unit = EE_BLOCK_SIZE;
227 ao_storage_device_info(void) __reentrant
232 * To initialize the chip, set up the CS line and
236 ao_storage_device_init(void)
239 ao_enable_output(EE_CS_PORT, EE_CS_PIN, EE_CS, 1);