2 * Copyright © 2011 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 * Atmega32u4 USART in MSPIM (master SPI mode)
24 __xdata uint8_t ao_spi_mutex;
26 /* Send bytes over SPI.
28 * This just polls; the SPI is set to go as fast as possible,
29 * so using interrupts would take way too long
32 ao_spi_send(void __xdata *block, uint16_t len) __reentrant
36 ao_mutex_get(&ao_spi_mutex);
38 while (!(UCSR1A & (1 << UDRE1)));
40 while (!(UCSR1A & (1 << RXC1)));
43 ao_mutex_put(&ao_spi_mutex);
46 /* Receive bytes over SPI.
48 * This sets up tow DMA engines, one reading the data and another
49 * writing constant values to the SPI transmitter as that is what
50 * clocks the data coming in.
53 ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
57 ao_mutex_get(&ao_spi_mutex);
59 while (!(UCSR1A & (1 << UDRE1)));
61 while (!(UCSR1A & (1 << RXC1)));
64 ao_mutex_put(&ao_spi_mutex);
68 * Initialize USART0 for SPI using config alt 2
74 * Chip select is the responsibility of the caller
78 #define XCK1_PORT PORTD
81 #define XMS1_PORT PORTE
87 /* Ensure the USART is powered */
88 PRR1 &= ~(1 << PRUSART1);
93 XCK1_DDR |= (1 << XCK1);
95 /* Clear chip select (which is negated) */
96 XMS1_PORT |= (1 < XMS1);
97 XMS1_DDR |= (1 << XMS1);
99 /* Set baud register to zero (required before turning transmitter on) */
102 UCSR1C = ((0x3 << UMSEL10) | /* Master SPI mode */
103 (0 << UCSZ10) | /* SPI mode 0 */
104 (0 << UCPOL1)); /* SPI mode 0 */
106 /* Enable transmitter and receiver */
107 UCSR1B = ((1 << RXEN1) |
110 /* It says that 0 is a legal value; we'll see... */