2 * Copyright © 2011 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 * AltOS always cranks the clock to the max frequency
28 /* disable RC clock */
29 CLKSEL0 &= ~(1 << RCE);
32 PLLCSR &= ~(1 << PLLE);
34 /* Enable external clock */
35 CLKSEL0 |= (1 << EXTE);
37 /* wait for external clock to be ready */
38 while ((CLKSTA & (1 << EXTON)) == 0)
41 /* select external clock */
42 CLKSEL0 |= (1 << CLKS);
44 /* Disable the clock prescaler */
46 CLKPR = (1 << CLKPCE);
48 /* Always run the system clock at 8MHz */
49 #if AVR_CLOCK > 12000000UL
56 /* Set up the PLL to use the crystal */
58 /* Use primary system clock as PLL source */
59 PLLFRQ = ((0 << PINMUX) | /* Use primary clock */
60 (0 << PLLUSB) | /* No divide by 2 for USB */
61 (0 << PLLTM0) | /* Disable high speed timer */
62 (0x4 << PDIV0)); /* 48MHz PLL clock */
64 /* Set the frequency of the crystal */
65 #if AVR_CLOCK > 12000000UL
66 PLLCSR |= (1 << PINDIV); /* For 16MHz crystal on Teensy board */
68 PLLCSR &= ~(1 << PINDIV); /* For 8MHz crystal on TeleScience board */
72 PLLCSR |= (1 << PLLE);
73 while (!(PLLCSR & (1 << PLOCK)))
76 set_sleep_mode(SLEEP_MODE_IDLE);