2 * Copyright © 2008 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 #include <sys/types.h>
31 #include <sys/ioctl.h>
33 #include "ccdbg-debug.h"
37 #define CC_RESET_N 0x4
38 #define CC_CLOCK_US (2)
40 /* Telemetrum has a 10k pull-up to 3.3v, a 0.001uF cap to ground
41 * and a 2.7k resistor to the reset line. This takes about 6us
42 * to settle, so we'll wait longer than that after changing the reset line
44 #define CC_RESET_US (12)
49 #define MOV_direct_data 0x75
51 #define MOV_Rn_data(n) (0x78 | (n))
52 #define DJNZ_Rn_rel(n) (0xd8 | (n))
53 #define MOV_A_direct 0xe5
54 #define MOV_direct1_direct2 0x85
55 #define MOV_direct_A 0xf5
56 #define MOV_DPTR_data16 0x90
57 #define MOV_A_data 0x74
58 #define MOVX_atDPTR_A 0xf0
59 #define MOVX_A_atDPTR 0xe0
65 /* 8051 special function registers
75 /* flash controller */
80 # define FCTL_BUSY 0x80
81 # define FCTL_BUSY_BIT 7
82 # define FCTL_SWBSY 0x40
83 # define FCTL_SWBSY_BIT 6
84 # define FCTL_CONTRD 0x10
85 # define FCTL_WRITE 0x02
86 # define FCTL_ERASE 0x01
91 /* clock controller */
93 #define CLKCON_OSC32K 0x80
94 #define CLKCON_OSC 0x40
95 #define CLKCON_TICKSPD 0x38
96 #define CLKCON_CLKSPD 0x07
106 /* Bit-addressable accumulator */
107 #define ACC(bit) (0xE0 | (bit))
109 /* Bit-addressable status word */
110 #define PSW(bit) (0xD0 | (bit))
116 struct cp_usb_async *cp_async;
120 struct hex_image *rom;
123 /* Intel hex file format data
135 struct hex_record *records[0];
144 #define CC_STATE_ACC 0x1
145 #define CC_STATE_PSW 0x2
146 #define CC_STATE_DP 0x4
148 #define CC_STATE_NSFR 5
153 uint8_t sfr[CC_STATE_NSFR];
156 #define HEX_RECORD_NORMAL 0x00
157 #define HEX_RECORD_EOF 0x01
158 #define HEX_RECORD_EXTENDED_ADDRESS 0x02
160 /* CC1111 debug port commands
162 #define CC_CHIP_ERASE 0x14
164 #define CC_WR_CONFIG 0x1d
165 #define CC_RD_CONFIG 0x24
166 # define CC_CONFIG_TIMERS_OFF (1 << 3)
167 # define CC_CONFIG_DMA_PAUSE (1 << 2)
168 # define CC_CONFIG_TIMER_SUSPEND (1 << 1)
169 # define CC_SET_FLASH_INFO_PAGE (1 << 0)
171 #define CC_GET_PC 0x28
172 #define CC_READ_STATUS 0x34
173 # define CC_STATUS_CHIP_ERASE_DONE (1 << 7)
174 # define CC_STATUS_PCON_IDLE (1 << 6)
175 # define CC_STATUS_CPU_HALTED (1 << 5)
176 # define CC_STATUS_POWER_MODE_0 (1 << 4)
177 # define CC_STATUS_HALT_STATUS (1 << 3)
178 # define CC_STATUS_DEBUG_LOCKED (1 << 2)
179 # define CC_STATUS_OSCILLATOR_STABLE (1 << 1)
180 # define CC_STATUS_STACK_OVERFLOW (1 << 0)
182 #define CC_SET_HW_BRKPNT 0x3b
183 # define CC_HW_BRKPNT_N(n) ((n) << 3)
184 # define CC_HW_BRKPNT_N_MASK (0x3 << 3)
185 # define CC_HW_BRKPNT_ENABLE (1 << 2)
188 #define CC_RESUME 0x4c
189 #define CC_DEBUG_INSTR(n) (0x54|(n))
190 #define CC_STEP_INSTR 0x5c
191 #define CC_STEP_REPLACE(n) (0x64|(n))
192 #define CC_GET_CHIP_ID 0x68
194 /* ccdbg-command.c */
196 ccdbg_debug_mode(struct ccdbg *dbg);
199 ccdbg_reset(struct ccdbg *dbg);
202 ccdbg_chip_erase(struct ccdbg *dbg);
205 ccdbg_wr_config(struct ccdbg *dbg, uint8_t config);
208 ccdbg_rd_config(struct ccdbg *dbg);
211 ccdbg_get_pc(struct ccdbg *dbg);
214 ccdbg_read_status(struct ccdbg *dbg);
217 ccdbg_set_hw_brkpnt(struct ccdbg *dbg, uint8_t number, uint8_t enable, uint16_t addr);
220 ccdbg_halt(struct ccdbg *dbg);
223 ccdbg_resume(struct ccdbg *dbg);
226 ccdbg_debug_instr(struct ccdbg *dbg, uint8_t *instr, int nbytes);
229 ccdbg_step_instr(struct ccdbg *dbg);
232 ccdbg_step_replace(struct ccdbg *dbg, uint8_t *instr, int nbytes);
235 ccdbg_get_chip_id(struct ccdbg *dbg);
238 ccdbg_execute(struct ccdbg *dbg, uint8_t *inst);
241 ccdbg_set_pc(struct ccdbg *dbg, uint16_t pc);
244 ccdbg_execute_hex_image(struct ccdbg *dbg, struct hex_image *image);
248 ccdbg_flash_hex_image(struct ccdbg *dbg, struct hex_image *image);
252 ccdbg_hex_file_read(FILE *file, char *name);
255 ccdbg_hex_file_free(struct hex_file *hex);
258 ccdbg_hex_image_create(struct hex_file *hex);
261 ccdbg_hex_image_free(struct hex_image *image);
264 ccdbg_hex_image_equal(struct hex_image *a, struct hex_image *b);
268 ccdbg_set_clock(uint32_t us);
271 ccdbg_half_clock(struct ccdbg *dbg);
274 ccdbg_wait_reset(struct ccdbg *dbg);
277 ccdbg_write(struct ccdbg *dbg, uint8_t mask, uint8_t value);
280 ccdbg_read(struct ccdbg *dbg, uint8_t *valuep);
286 ccdbg_close(struct ccdbg *dbg);
289 ccdbg_clock_1_0(struct ccdbg *dbg);
292 ccdbg_clock_0_1(struct ccdbg *dbg);
295 ccdbg_write_bit(struct ccdbg *dbg, uint8_t bit);
298 ccdbg_write_byte(struct ccdbg *dbg, uint8_t byte);
301 ccdbg_read_bit(struct ccdbg *dbg);
304 ccdbg_read_byte(struct ccdbg *dbg);
307 ccdbg_cmd_write(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
310 ccdbg_cmd_write_read8(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
313 ccdbg_cmd_write_read16(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
316 ccdbg_send(struct ccdbg *dbg, uint8_t mask, uint8_t set);
319 ccdbg_send_bit(struct ccdbg *dbg, uint8_t bit);
322 ccdbg_send_byte(struct ccdbg *dbg, uint8_t byte);
325 ccdbg_send_bytes(struct ccdbg *dbg, uint8_t *bytes, int nbytes);
328 ccdbg_recv_bit(struct ccdbg *dbg, int first, uint8_t *bit);
331 ccdbg_recv_byte(struct ccdbg *dbg, int first, uint8_t *byte);
334 ccdbg_recv_bytes(struct ccdbg *dbg, uint8_t *bytes, int nbytes);
337 ccdbg_sync_io(struct ccdbg *dbg);
340 ccdbg_print(char *format, uint8_t mask, uint8_t set);
345 ccdbg_manual(struct ccdbg *dbg, FILE *input);
349 ccdbg_write_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes);
352 ccdbg_read_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes);
355 ccdbg_write_uint8(struct ccdbg *dbg, uint16_t addr, uint8_t byte);
358 ccdbg_write_hex_image(struct ccdbg *dbg, struct hex_image *image, uint16_t offset);
361 ccdbg_read_hex_image(struct ccdbg *dbg, uint16_t address, uint16_t length);
364 ccdbg_read_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
367 ccdbg_write_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
371 ccdbg_set_rom(struct ccdbg *dbg, struct hex_image *rom);
374 ccdbg_rom_contains(struct ccdbg *dbg, uint16_t addr, int nbytes);
377 ccdbg_rom_replace_xmem(struct ccdbg *dbg,
378 uint16_t addrp, uint8_t *bytesp, int nbytes);
382 ccdbg_state_save(struct ccdbg *dbg, struct ccstate *state, unsigned int mask);
385 ccdbg_state_restore(struct ccdbg *dbg, struct ccstate *state);
388 ccdbg_state_replace_xmem(struct ccdbg *dbg, struct ccstate *state,
389 uint16_t addr, uint8_t *bytes, int nbytes);
392 ccdbg_state_replace_sfr(struct ccdbg *dbg, struct ccstate *state,
393 uint8_t addr, uint8_t *bytes, int nbytes);
395 #endif /* _CCDBG_H_ */