2 * Copyright © 2009 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #define DBG_CLOCK (1 << 3)
21 #define DBG_DATA (1 << 4)
22 #define DBG_RESET_N (1 << 5)
24 #define DBG_CLOCK_PIN (P0_3)
25 #define DBG_DATA_PIN (P0_4)
26 #define DBG_RESET_N_PIN (P0_5)
29 ao_dbg_send_bits(uint8_t msk, uint8_t val)
31 P0 = (P0 & ~msk) | (val & msk);
43 ao_dbg_send_byte(uint8_t byte)
49 for (b = 0; b < 8; b++) {
54 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA, DBG_CLOCK|d);
55 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA, 0 |d);
61 ao_dbg_recv_byte(void)
63 __xdata uint8_t byte, b;
66 for (b = 0; b < 8; b++) {
68 ao_dbg_send_bits(DBG_CLOCK, DBG_CLOCK);
71 ao_dbg_send_bits(DBG_CLOCK, 0);
79 #define MOV_direct_data 0x75
81 #define MOV_Rn_data(n) (0x78 | (n))
82 #define DJNZ_Rn_rel(n) (0xd8 | (n))
83 #define MOV_A_direct 0xe5
84 #define MOV_direct1_direct2 0x85
85 #define MOV_direct_A 0xf5
86 #define MOV_DPTR_data16 0x90
87 #define MOV_A_data 0x74
88 #define MOVX_atDPTR_A 0xf0
89 #define MOVX_A_atDPTR 0xe0
95 #define DEBUG_INSTR(l) (0x54 | (l))
100 #define SFR_DPL1 0x84
101 #define SFR_DPH1 0x85
103 __xdata uint8_t save_acc;
104 __xdata uint8_t save_psw;
105 __xdata uint8_t save_dpl0;
106 __xdata uint8_t save_dph0;
107 __xdata uint8_t save_dpl1;
108 __xdata uint8_t save_dph1;
111 ao_dbg_inst1(uint8_t a) __reentrant
113 ao_dbg_send_byte(DEBUG_INSTR(1));
115 return ao_dbg_recv_byte();
119 ao_dbg_inst2(uint8_t a, uint8_t b) __reentrant
121 ao_dbg_send_byte(DEBUG_INSTR(2));
124 return ao_dbg_recv_byte();
128 ao_dbg_inst3(uint8_t a, uint8_t b, uint8_t c) __reentrant
130 ao_dbg_send_byte(DEBUG_INSTR(3));
134 return ao_dbg_recv_byte();
138 ao_dbg_start_transfer(uint16_t addr)
140 save_acc = ao_dbg_inst1(NOP);
141 save_psw = ao_dbg_inst2(MOV_A_direct, SFR_PSW);
142 save_dpl0 = ao_dbg_inst2(MOV_A_direct, SFR_DPL0);
143 save_dph0 = ao_dbg_inst2(MOV_A_direct, SFR_DPH0);
144 save_dpl1 = ao_dbg_inst2(MOV_A_direct, SFR_DPL1);
145 save_dph1 = ao_dbg_inst2(MOV_A_direct, SFR_DPH1);
146 ao_dbg_inst3(MOV_DPTR_data16, addr >> 8, addr);
150 ao_dbg_end_transfer(void)
152 ao_dbg_inst3(MOV_direct_data, SFR_DPL0, save_dpl0);
153 ao_dbg_inst3(MOV_direct_data, SFR_DPH0, save_dph0);
154 ao_dbg_inst3(MOV_direct_data, SFR_DPL1, save_dpl1);
155 ao_dbg_inst3(MOV_direct_data, SFR_DPH1, save_dph1);
156 ao_dbg_inst3(MOV_direct_data, SFR_PSW, save_psw);
157 ao_dbg_inst2(MOV_A_data, save_acc);
161 ao_dbg_write_byte(uint8_t byte)
163 ao_dbg_inst2(MOV_A_data, byte);
164 ao_dbg_inst1(MOVX_atDPTR_A);
165 ao_dbg_inst1(INC_DPTR);
169 ao_dbg_read_byte(void)
171 ao_dbg_inst1(MOVX_A_atDPTR);
172 return ao_dbg_inst1(INC_DPTR);
176 ao_dbg_set_pins(void)
178 /* Disable peripheral use of P0 */
183 /* make P0_4 tri-state */
185 P2INP &= ~(P2INP_PDUP0_PULL_DOWN);
187 /* Raise RESET_N and CLOCK */
188 P0 = DBG_RESET_N | DBG_CLOCK;
190 /* RESET_N and CLOCK are outputs now */
191 P0DIR = DBG_RESET_N | DBG_CLOCK;
195 ao_dbg_long_delay(void)
199 for (n = 0; n < 20; n++)
204 ao_dbg_debug_mode(void)
208 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA|DBG_RESET_N);
210 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, 0 |DBG_DATA| 0 );
212 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
214 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, 0 |DBG_DATA| 0 );
216 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
218 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, 0 |DBG_DATA|DBG_RESET_N);
227 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA|DBG_RESET_N);
229 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
231 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
233 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
235 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA| 0 );
237 ao_dbg_send_bits(DBG_CLOCK|DBG_DATA|DBG_RESET_N, DBG_CLOCK|DBG_DATA|DBG_RESET_N);
258 if (ao_cmd_lex_c == '\n')
261 if (ao_cmd_status != ao_cmd_success)
263 ao_dbg_send_byte(ao_cmd_lex_i);
270 __xdata uint16_t count;
272 __xdata uint8_t byte;
274 if (ao_cmd_status != ao_cmd_success)
276 count = ao_cmd_lex_i;
278 ao_cmd_status = ao_cmd_syntax_error;
281 for (i = 0; i < count; i++) {
282 if (i && (i & 7) == 0)
284 byte = ao_dbg_recv_byte();
297 if ('0' <= c && c <= '9')
299 if ('a' <= c && c <= 'f')
300 return c - ('a' - 10);
301 if ('A' <= c && c <= 'F')
302 return c - ('A' - 10);
303 ao_cmd_status = ao_cmd_lex_error;
310 __xdata uint16_t count;
311 __xdata uint16_t addr;
316 count = ao_cmd_lex_i;
319 if (ao_cmd_status != ao_cmd_success)
321 ao_dbg_start_transfer(addr);
326 b = ao_dbg_read_byte();
329 ao_dbg_end_transfer();
336 __xdata uint16_t count;
337 __xdata uint16_t addr;
341 count = ao_cmd_lex_i;
344 if (ao_cmd_status != ao_cmd_success)
346 ao_dbg_start_transfer(addr);
348 b = getnibble() << 4;
350 if (ao_cmd_status != ao_cmd_success)
352 ao_dbg_write_byte(b);
354 ao_dbg_end_transfer();
357 __code struct ao_cmds ao_dbg_cmds[7] = {
358 { 'D', debug_enable, "D Enable debug mode" },
359 { 'G', debug_get, "G <count> Get data from debug port" },
360 { 'I', debug_input, "I <count> <addr> Input <count> bytes to target at <addr>" },
361 { 'O', debug_output, "O <count> <addr> Output <count> bytes to target at <addr>" },
362 { 'P', debug_put, "P <byte> ... Put data to debug port" },
363 { 'R', debug_reset, "R Reset target" },
364 { 0, debug_reset, 0 },
370 ao_cmd_register(&ao_dbg_cmds[0]);