2 * Copyright © 2008 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 #include <sys/types.h>
31 #include <sys/ioctl.h>
33 #include "ccdbg-debug.h"
34 #include "cc-bitbang.h"
41 #define MOV_direct_data 0x75
43 #define MOV_Rn_data(n) (0x78 | (n))
44 #define DJNZ_Rn_rel(n) (0xd8 | (n))
45 #define MOV_A_direct 0xe5
46 #define MOV_direct1_direct2 0x85
47 #define MOV_direct_A 0xf5
48 #define MOV_DPTR_data16 0x90
49 #define MOV_A_data 0x74
50 #define MOVX_atDPTR_A 0xf0
51 #define MOVX_A_atDPTR 0xe0
57 /* 8051 special function registers
67 /* flash controller */
72 # define FCTL_BUSY 0x80
73 # define FCTL_BUSY_BIT 7
74 # define FCTL_SWBSY 0x40
75 # define FCTL_SWBSY_BIT 6
76 # define FCTL_CONTRD 0x10
77 # define FCTL_WRITE 0x02
78 # define FCTL_ERASE 0x01
83 /* clock controller */
85 #define CLKCON_OSC32K 0x80
86 #define CLKCON_OSC 0x40
87 #define CLKCON_TICKSPD 0x38
88 #define CLKCON_CLKSPD 0x07
98 /* Bit-addressable accumulator */
99 #define ACC(bit) (0xE0 | (bit))
101 /* Bit-addressable status word */
102 #define PSW(bit) (0xD0 | (bit))
105 struct cc_bitbang *bb;
107 struct ao_hex_image *rom;
111 #define CC_STATE_ACC 0x1
112 #define CC_STATE_PSW 0x2
113 #define CC_STATE_DP 0x4
115 #define CC_STATE_NSFR 5
120 uint8_t sfr[CC_STATE_NSFR];
123 /* CC1111 debug port commands
125 #define CC_CHIP_ERASE 0x14
127 #define CC_WR_CONFIG 0x1d
128 #define CC_RD_CONFIG 0x24
129 # define CC_CONFIG_TIMERS_OFF (1 << 3)
130 # define CC_CONFIG_DMA_PAUSE (1 << 2)
131 # define CC_CONFIG_TIMER_SUSPEND (1 << 1)
132 # define CC_SET_FLASH_INFO_PAGE (1 << 0)
134 #define CC_GET_PC 0x28
135 #define CC_READ_STATUS 0x34
136 # define CC_STATUS_CHIP_ERASE_DONE (1 << 7)
137 # define CC_STATUS_PCON_IDLE (1 << 6)
138 # define CC_STATUS_CPU_HALTED (1 << 5)
139 # define CC_STATUS_POWER_MODE_0 (1 << 4)
140 # define CC_STATUS_HALT_STATUS (1 << 3)
141 # define CC_STATUS_DEBUG_LOCKED (1 << 2)
142 # define CC_STATUS_OSCILLATOR_STABLE (1 << 1)
143 # define CC_STATUS_STACK_OVERFLOW (1 << 0)
145 #define CC_SET_HW_BRKPNT 0x3b
146 # define CC_HW_BRKPNT_N(n) ((n) << 3)
147 # define CC_HW_BRKPNT_N_MASK (0x3 << 3)
148 # define CC_HW_BRKPNT_ENABLE (1 << 2)
151 #define CC_RESUME 0x4c
152 #define CC_DEBUG_INSTR(n) (0x54|(n))
153 #define CC_STEP_INSTR 0x5c
154 #define CC_STEP_REPLACE(n) (0x64|(n))
155 #define CC_GET_CHIP_ID 0x68
157 /* ccdbg-command.c */
159 ccdbg_debug_mode(struct ccdbg *dbg);
162 ccdbg_reset(struct ccdbg *dbg);
165 ccdbg_chip_erase(struct ccdbg *dbg);
168 ccdbg_wr_config(struct ccdbg *dbg, uint8_t config);
171 ccdbg_rd_config(struct ccdbg *dbg);
174 ccdbg_get_pc(struct ccdbg *dbg);
177 ccdbg_read_status(struct ccdbg *dbg);
180 ccdbg_set_hw_brkpnt(struct ccdbg *dbg, uint8_t number, uint8_t enable, uint16_t addr);
183 ccdbg_halt(struct ccdbg *dbg);
186 ccdbg_resume(struct ccdbg *dbg);
189 ccdbg_debug_instr(struct ccdbg *dbg, uint8_t *instr, int nbytes);
192 ccdbg_debug_instr_discard(struct ccdbg *dbg, uint8_t *instr, int nbytes);
195 ccdbg_debug_instr_queue(struct ccdbg *dbg, uint8_t *instr, int nbytes,
199 ccdbg_step_instr(struct ccdbg *dbg);
202 ccdbg_step_replace(struct ccdbg *dbg, uint8_t *instr, int nbytes);
205 ccdbg_get_chip_id(struct ccdbg *dbg);
208 ccdbg_execute(struct ccdbg *dbg, uint8_t *inst);
211 ccdbg_set_pc(struct ccdbg *dbg, uint16_t pc);
214 ccdbg_execute_hex_image(struct ccdbg *dbg, struct ao_hex_image *image);
218 ccdbg_flash_hex_image(struct ccdbg *dbg, struct ao_hex_image *image);
222 ccdbg_open(char *tty);
225 ccdbg_close(struct ccdbg *dbg);
228 ccdbg_cmd_write(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
231 ccdbg_cmd_write_read8(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
234 ccdbg_cmd_write_queue8(struct ccdbg *dbg, uint8_t cmd,
235 uint8_t *data, int len, uint8_t *reply);
238 ccdbg_cmd_write_read16(struct ccdbg *dbg, uint8_t cmd, uint8_t *data, int len);
241 ccdbg_send_bytes(struct ccdbg *dbg, uint8_t *bytes, int nbytes);
244 ccdbg_recv_bytes(struct ccdbg *dbg, uint8_t *bytes, int nbytes);
247 ccdbg_sync(struct ccdbg *dbg);
252 ccdbg_manual(struct ccdbg *dbg, FILE *input);
256 ccdbg_write_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes);
259 ccdbg_read_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes);
262 ccdbg_write_uint8(struct ccdbg *dbg, uint16_t addr, uint8_t byte);
265 ccdbg_write_hex_image(struct ccdbg *dbg, struct ao_hex_image *image, uint16_t offset);
267 struct ao_hex_image *
268 ccdbg_read_hex_image(struct ccdbg *dbg, uint16_t address, uint16_t length);
271 ccdbg_read_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
274 ccdbg_write_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
278 ccdbg_set_rom(struct ccdbg *dbg, struct ao_hex_image *rom);
281 ccdbg_rom_contains(struct ccdbg *dbg, uint16_t addr, int nbytes);
284 ccdbg_rom_replace_xmem(struct ccdbg *dbg,
285 uint16_t addrp, uint8_t *bytesp, int nbytes);
289 ccdbg_state_save(struct ccdbg *dbg, struct ccstate *state, unsigned int mask);
292 ccdbg_state_restore(struct ccdbg *dbg, struct ccstate *state);
295 ccdbg_state_replace_xmem(struct ccdbg *dbg, struct ccstate *state,
296 uint16_t addr, uint8_t *bytes, int nbytes);
299 ccdbg_state_replace_sfr(struct ccdbg *dbg, struct ccstate *state,
300 uint8_t addr, uint8_t *bytes, int nbytes);
302 #endif /* _CCDBG_H_ */