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route complete, drc clean
[hw/telemega]
/
Makefile
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# name of project, also used for PCB file
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PROJECT=telemega
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# list of schematic files that make up this design
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SCHEMATICS=telemega.sch
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# number of PCB layers
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LAYERS=4
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# sides with silkscreen, can be none|top|bottom|both
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SILK=both
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include ../altusmetrum/pcb.mk