3 This is a hardware True Random Number Generator that attaches via USB.
7 1.0 is the first production version of ChaosKey. The first run of 1000
8 units is expected sometime around August, 2016.
10 <a href="v1.0/chaoskey-bare.jpg"><img src="v1.0/chaoskey-bare-thumb.jpg">/a>
12 <a href="v1.0/chaoskey-boxed.jpg"><img src="v1.0/chaoskey-boxed-thumb.jpg">/a>
14 ### Version 1.0 Hardware ###
16 * [STM32F042](http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1574/LN1823?icmp=stm32f0x2-line_pron_pr_jan2014&sc=stm32f0x2-pr) System-on-Chip
21 * Crystal-less operation
23 * AP3015A boost regulator
24 * back-to-back 3904 transistor noise
25 * [OPA356](http://www.ti.com/product/opa356) op amp
28 Here's a circuit diagram of the noise source:
30 <img src="v1.0/noise-source.svg">
32 ### Version 1.0 Bits ###
34 Source code for the firmware, flash loader and a utility to pull raw
35 bits from the noise source are available here:
37 [AltOS Git Repository](http://git.gag.com/?p=fw/altos;a=summary)
39 Hardware designs using [gEDA](http://www.geda-project.org/) are
42 [ChaosKey Hardware Design Files](http://git.gag.com/?p=hw/chaoskey;a=summary)
46 This one uses the better noise source coupled with an op amp that
47 provides 2MHz of bandwidth at a gain of 100, offering linear frequency
48 response at a million samples per second.
50 A photo of prototype version 0.3:
52 <a href="v0.3/chaoskey-v0.3.jpg"> <img src="v0.3/chaoskey-v0.3-thumb.jpg"></a>
54 Here's a circuit diagram of the noise source:
56 <img src="v0.3/noise-source.svg">
58 Version 0.3 uses the same hardware design as version 1.0, except that
59 it uses a QFP package version of the processor instead of the QFN used
60 in 1.0, and hence needs a larger circuit board.
64 This version uses a better noise source, but the single transistor amp
65 designed to get from the 20mV noise source to a digital value doesn't
66 provide enough bandwidth, so the resulting signal seen by the CPU has
67 poor frequency response.
69 Here's a photo of prototype version 0.2:
71 <a href="v0.2/chaoskey-v0.2.jpg"> <img src="v0.2/chaoskey-v0.2-thumb.jpg"></a>
73 ### Version 0.2 Hardware ###
75 * [STM32F042](http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1574/LN1823?icmp=stm32f0x2-line_pron_pr_jan2014&sc=stm32f0x2-pr) System-on-Chip
80 * Crystal-less operation
82 * AP3015A boost regulator
83 * back-to-back 3904 transistor noise
87 These are photos of prototype version 0.1:
89 <a href="v0.1/chaoskey-v0.1-top.jpg"> <img src="v0.1/chaoskey-v0.1-top-thumb.jpg"></a>
90 <a href="v0.1/chaoskey-v0.1-bottom.jpg"> <img src="v0.1/chaoskey-v0.1-bottom-thumb.jpg"></a>
92 ### Version 0.1 Hardware ###
94 * [NXP LPC11U14](http://www.nxp.com/products/microcontrollers/cortex_m0_m0/LPC11U14FHI33.html) System-on-Chip
99 * 8 12-bit analog inputs
100 * I2C, SPI, async serial
102 * ZXRE1004 zener diode noise source
103 * MCP6L92 dual op-amp
108 * [AltOS](../AltOS/) is written mostly in C with some ARM assembler
110 * [gEDA](http://www.gpleda.org/) for schematic capture and PCB layout
111 * [GCC](http://gcc.gnu.org/) compiler and source debugger
113 * The hardware is licensed under the [TAPR](http://www.tapr.org) [Open Hardware License](http://www.tapr.org/ohl.html)
114 * The software is licensed [GPL version 2](http://www.gnu.org/licenses/old-licenses/gpl-2.0.html)