reduce pcb workspace size to board outline again, make version 2.0

[hw/telemega] / telemega.sch

diff --git a/telemega.sch b/telemega.sch
index 816418af71b43ac26b9ab82d4fc1477d951fc105..5f43eae20e9f3b4a004747dde1bf88910e03b133 100644 (file)
--- a/telemega.sch
+++ b/telemega.sch
@@ -153,7 +153,7 @@ Tolerate up to
 N 68000 43600 67900 43600 4
 N 67900 43600 67900 44000 4
 T 82400 40400 9 10 1 0 0 0 1
-1.1
+2.0
 T 80000 40400 9 10 1 0 0 0 1
 1
 T 80600 40400 9 10 1 0 0 0 1