T 46700 47200 5 10 0 0 90 0 1
loadstatus=smt
}
-C 48500 45700 1 90 0 resistor.sym
+C 48800 45700 1 90 0 resistor.sym
{
-T 48100 46000 5 10 0 0 90 0 1
+T 48400 46000 5 10 0 0 90 0 1
device=RESISTOR
-T 48900 46400 5 10 1 1 180 0 1
+T 49200 46400 5 10 1 1 180 0 1
refdes=R14
-T 48800 46100 5 10 1 1 180 0 1
+T 49100 46100 5 10 1 1 180 0 1
value=1k
-T 48500 45700 5 10 0 0 90 0 1
+T 48800 45700 5 10 0 0 90 0 1
footprint=0402
-T 48500 45700 5 10 0 0 90 0 1
+T 48800 45700 5 10 0 0 90 0 1
loadstatus=smt
}
N 46900 47300 48200 47300 4
refdes=D2
}
N 47600 47100 47800 47100 4
-N 47600 46600 48400 46600 4
+N 47600 46600 48700 46600 4
N 47200 46600 46900 46600 4
C 57800 47700 1 270 0 capacitor.sym
{