Add stencil target

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/Makefile b/Makefile
index f026717d05ec00cf12b8efbc24fd57330ed036d8..5ef9a059e00bd4b77eee22faa5ce714c98537d32 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@ NICKLE=$(AM)/nickle
 RETAB=nickle $(NICKLE)/retab
 
 # intentionally want to rebuild drc and bom on every invocation
-all:   drc pcb partslist partslist.csv partslist.dk muffin-5267.pdf
+all:   drc pcb partslist partslist.csv partslist.dk muffin-5267.pdf stencil
 
 drc: $(PROJECT).sch
        gnetlist -L $(SCHEME) -g drc2 $(PROJECT).sch -o $(PROJECT).drc
@@ -59,7 +59,11 @@ $(PROJECT).zip: $(PROJECT).gerb $(PROJECT).xy
        rm -f $(PROJECT).zip
        zip $(PROJECT).zip *.gbr *.cnc *.xy
 
+stencil:       $(PROJECT).gerb
+       zip $(PROJECT)-stencil.zip $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr
+
 clean:
        rm -f *.bom *.drc *.log *~ $(PROJECT).ps *.gbr $(PROJECT).gerb *.cnc *bak* *- *.zip 
        rm -f *.net *.xy *.cmd *.png partslist partslist.csv partslist.dk partslist.mouser muffin-5267.pdf
        rm -f *.partslist *.new.pcb *.unsorted $(PROJECT).xls
+       rm -f $(PROJECT)-stencil.zip