various changes driven by physical inspection of my Pluto-P board

diff --git a/Datasheets/diodes/ds30036.pdf b/Datasheets/diodes/ds30036.pdf
new file mode 100644 (file)
index 0000000..b9b0279
Binary files /dev/null and b/Datasheets/diodes/ds30036.pdf differ

diff --git a/Notebook b/Notebook
index 7ba2524129a68d920de81f86f39ab560216ea7aa..654b43360e64486844b94ae9eef27ef5b09156a1 100644 (file)
--- a/Notebook
+++ b/Notebook
@@ -3,8 +3,85 @@ http://www.fourwalledcubicle.com/LUFA.php
 
 To Do:
 
-- figure out the nConfig / nCONFIG wiring by inspecting my real Pluto-P
 - figure out if all the unconnected pins on the FPGA match the Pluto-P
 
 - verify pin configuration seems to match the data in:
   ~/src/emc2-dev/src/hal/drivers/pluto_servo_firmware/pluto_servo.pin 
+
+
+2011.12.04
+- results of physical inspection of pluto-p board
+
+    22 ohm series resistors on 7 pins between FPGA and 10 pin header, including
+       pins 5, 8, 9, 10, 13, 16, 93
+
+       ** these are din_1 through din_7 .. makes sense?
+
+       **DONE**
+
+    pin 50 has an LED and 1k resistor
+
+       ** my current design has 330 ohms
+
+       **NOT DONE .. CAN CHANGE IF NEEDED AFTER PCB FAB**
+
+    10k from pin 25 to pin 44, cap from pin 44 to ground
+
+       44 is VCCIO, 25 is nSTATUS, so this is a pull-up on nSTATUS
+
+       **DONE**
+
+    db25 pin 11 to sole pin side of one "1L" transistor, one lead to ground, 
+    4.7k from remaining lead to pin 87
+
+       db25 pin 11 is nWait .. so it looks like nWait is being driven by
+       a transistor from the FPGA DEV_CLRn output, not directly
+
+       **DONE**
+
+    db25 pin 12 to sole pin side of one "1L" transistor, one lead to ground,
+    4.7k from remaining lead to pin 6
+
+       db25 pin 12 is undocumented?
+       so FPGA pin 6 is able to drive that pin through a transistor
+
+       **DONE**
+
+    pin 49 hooked to pin 51 .. nCONFIG driven by nConfig
+
+       **DONE**
+
+    osc pin 3 to pin 91
+
+       consistent with my design, 40mhz to FPGA
+       **DONE**
+
+    26 pin header pins 11 and 12 to sole pin side of "G1" transistor, both other
+    leads have caps to ground, one to pin 24, the other to pin 37, 35
+
+       those header pins are VCC?
+       pin 37, 35 is VCCIO
+       pin 24 is TMS
+
+       WTF?
+
+       SOT-23 with G1 label could be:
+
+               transistor, 1=B, 2=E, 3(sole)=C
+               fet, 1=G, 2=S, 3=D
+
+       so:
+               TMS is driving base or gate
+               3.3V is on emitter or source
+               header VCC is on collector or drain
+
+       TMS is 'test mode state' on the jtag interface, which drives the TAP
+       controller state machine.  TMS going low starts a cycle?
+
+    4.7k between pins 87 and 90
+
+       pin 87 is DEV_CLRn driving nWait to the PC
+       pin 90 is CLOCK hooked to db25 pin 1 whcih is nWrite
+
+    why not treat all the parallel port input pins with transistors?
+

diff --git a/cncfpga.sch b/cncfpga.sch
index 932b189ceee9f1e5ed2a4fcc0b15533cc6e48a26..1537c477570157bc97bc598518605629641dc745 100644 (file)
--- a/cncfpga.sch
+++ b/cncfpga.sch
@@ -48,35 +48,33 @@ vendor=none
 T 59400 41600 5 10 0 1 0 0 1
 nobom=1
 }
-C 42500 41900 1 0 0 EP1K10.sym
+C 43400 41700 1 0 0 EP1K10.sym
 {
-T 36100 40300 5 10 0 0 0 0 1
+T 37000 40100 5 10 0 0 0 0 1
 device=EP1K10TC100
-T 43100 60300 5 10 1 1 180 0 1
+T 44000 60100 5 10 1 1 180 0 1
 refdes=U1
-T 42500 41900 5 10 1 1 0 0 1
-value=EP1K
-T 42500 41900 5 10 0 1 0 0 1
+T 43400 41700 5 10 0 1 0 0 1
 loadstatus=smt
-T 42500 41900 5 10 0 1 0 0 1
+T 43400 41700 5 10 0 1 0 0 1
 vendor=digikey
-T 42500 41900 5 10 0 1 0 0 1
+T 43400 41700 5 10 0 1 0 0 1
 vendor_part_number=544-1828-ND
-T 42500 41900 5 10 0 1 0 0 1
+T 43400 41700 5 10 0 1 0 0 1
 footprint=lqfp100
 }
-C 46100 41400 1 0 0 gnd.sym
-N 44600 41800 47800 41800 4
-N 44600 41900 44600 41800 4
-N 45000 41900 45000 41800 4
-N 45400 41900 45400 41800 4
-N 45800 41900 45800 41800 4
-N 46200 41900 46200 41800 4
-N 46200 41800 46200 41700 4
-N 46600 41900 46600 41800 4
-N 47000 41900 47000 41800 4
-N 47400 41900 47400 41800 4
-N 47800 41900 47800 41800 4
+C 47000 41200 1 0 0 gnd.sym
+N 45500 41600 48700 41600 4
+N 45500 41700 45500 41600 4
+N 45900 41700 45900 41600 4
+N 46300 41700 46300 41600 4
+N 46700 41700 46700 41600 4
+N 47100 41700 47100 41600 4
+N 47100 41600 47100 41500 4
+N 47500 41700 47500 41600 4
+N 47900 41700 47900 41600 4
+N 48300 41700 48300 41600 4
+N 48700 41700 48700 41600 4
 C 55300 51300 1 0 1 conn-25.sym
 {
 T 54845 61195 5 10 1 1 0 6 1
@@ -193,21 +191,21 @@ N 68600 49800 71500 49800 4
 N 65900 51800 65900 50700 4
 N 65900 49800 65900 48500 4
 C 68700 49800 1 0 0 3.3V-plus.sym
-C 45800 60700 1 0 0 3.3V-plus.sym
-N 43800 60600 48200 60600 4
-N 46000 60700 46000 60600 4
-N 43800 60600 43800 60500 4
-N 48200 60500 48200 60600 4
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-N 47400 60500 47400 60600 4
-N 47000 60500 47000 60600 4
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-N 46200 60500 46200 60600 4
-N 45800 60500 45800 60600 4
-N 45400 60500 45400 60600 4
-N 45000 60500 45000 60600 4
-N 44600 60500 44600 60600 4
-N 44200 60500 44200 60600 4
+C 46700 60500 1 0 0 3.3V-plus.sym
+N 44700 60400 49100 60400 4
+N 46900 60500 46900 60400 4
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+N 45500 60300 45500 60400 4
+N 45100 60300 45100 60400 4
 C 66800 51200 1 0 0 volt_reg_pos.sym
 {
 T 68400 52500 5 10 0 0 0 0 1
@@ -248,47 +246,47 @@ N 67700 50900 67700 51200 4
 N 68900 50900 67700 50900 4
 C 61300 46700 1 0 0 5V-plus.sym
 C 63000 44900 1 0 0 gnd.sym
-N 42500 44800 41100 44800 4
+N 43400 44600 42000 44600 4
 {
-T 41100 44900 5 10 1 1 0 0 1
+T 42000 44700 5 10 1 1 0 0 1
 netname=40mhz
 }
-N 49500 49200 51500 49200 4
+N 50400 49000 52400 49000 4
 {
-T 50600 49300 5 10 1 1 0 0 1
+T 51500 49100 5 10 1 1 0 0 1
 netname=led
 }
-C 51400 48300 1 270 0 led.sym
+C 52300 48100 1 270 0 led.sym
 {
-T 51750 48200 5 10 1 1 0 0 1
+T 52650 48000 5 10 1 1 0 0 1
 refdes=D1
-T 52000 48400 5 10 0 0 270 0 1
+T 52900 48200 5 10 0 0 270 0 1
 device=LED
-T 51800 47900 5 10 1 1 0 0 1
+T 52700 47700 5 10 1 1 0 0 1
 value=red
-T 51400 48300 5 10 0 1 0 0 1
+T 52300 48100 5 10 0 1 0 0 1
 footprint=0603diode
-T 51400 48300 5 10 0 1 0 0 1
+T 52300 48100 5 10 0 1 0 0 1
 loadstatus=smt
-T 51400 48300 5 10 0 1 0 0 1
+T 52300 48100 5 10 0 1 0 0 1
 vendor=digikey
-T 51400 48300 5 10 0 1 0 0 1
+T 52300 48100 5 10 0 1 0 0 1
 vendor_part_number=160-1433-1-ND
 }
-C 51600 48300 1 90 0 resistor.sym
+C 52500 48100 1 90 0 resistor.sym
 {
-T 51200 48600 5 10 0 0 90 0 1
+T 52100 48400 5 10 0 0 90 0 1
 device=RESISTOR
-T 52000 49000 5 10 1 1 180 0 1
+T 52900 48800 5 10 1 1 180 0 1
 refdes=R1
-T 51700 48600 5 10 1 1 0 0 1
+T 52600 48400 5 10 1 1 0 0 1
 value=330
-T 51600 48300 5 10 0 1 0 0 1
+T 52500 48100 5 10 0 1 0 0 1
 footprint=0805
-T 51600 48300 5 10 0 1 0 0 1
+T 52500 48100 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 51400 47600 1 0 0 gnd.sym
+C 52300 47400 1 0 0 gnd.sym
 C 59700 48500 1 0 0 oscillator.sym
 {
 T 60200 49900 5 10 1 1 0 6 1
@@ -329,347 +327,343 @@ N 59700 49500 59200 49500 4
 N 59700 49100 59700 49500 4
 N 59200 48500 60600 48500 4
 N 59200 49400 59200 49500 4
-C 49500 58900 1 0 0 gnd.sym
-N 49500 59600 50900 59600 4
+C 50400 58700 1 0 0 gnd.sym
+N 52900 59900 53400 59900 4
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 }
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-}
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-{
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 netname=CONF_DONE
 }
-N 42500 56000 41100 56000 4
+N 43400 55800 41400 55800 4
 {
-T 41100 56100 5 10 1 1 0 0 1
+T 42000 55900 5 10 1 1 0 0 1
 netname=nSTATUS
 }
 C 56800 50900 1 0 0 conn-26.sym
@@ -1079,9 +1073,9 @@ N 55700 47200 54200 47200 4
 T 54200 47450 5 10 1 1 180 6 1
 netname=dout_8
 }
-N 50900 49600 49500 49600 4
+N 51800 49400 50400 49400 4
 {
-T 50100 49700 5 10 1 1 0 0 1
+T 51000 49500 5 10 1 1 0 0 1
 netname=nCONFIG
 }
 T 56500 47200 9 10 1 0 0 0 1
@@ -1401,14 +1395,14 @@ T 71500 50800 5 10 0 0 180 6 1
 footprint=100mil3pin
 }
 C 71400 49900 1 0 0 gnd.sym
-N 42500 52000 41100 52000 4
+N 43400 51800 42000 51800 4
 {
-T 41100 52100 5 10 1 1 0 0 1
+T 42000 51900 5 10 1 1 0 0 1
 netname=pp_10
 }
-N 42500 48800 41100 48800 4
+N 43400 48600 42000 48600 4
 {
-T 41100 48900 5 10 1 1 0 0 1
+T 42000 48700 5 10 1 1 0 0 1
 netname=pp_15
 }
 C 55700 41900 1 0 0 conn-3.sym
@@ -1521,3 +1515,200 @@ netname=avr_reset
 N 71500 51800 71500 50600 4
 T 66800 44900 9 10 1 0 0 0 1
 Heartbeat Detector
+C 51900 56700 1 180 0 resistor.sym
+{
+T 51600 56300 5 10 0 0 180 0 1
+device=RESISTOR
+T 51100 56725 5 10 1 1 0 0 1
+refdes=R10
+T 51800 56875 5 10 1 1 180 0 1
+value=22
+T 51900 56700 5 10 0 1 90 0 1
+footprint=0805
+T 51900 56700 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 43200 42700 1 180 0 resistor.sym
+{
+T 42900 42300 5 10 0 0 180 0 1
+device=RESISTOR
+T 42400 42725 5 10 1 1 0 0 1
+refdes=R11
+T 43100 42875 5 10 1 1 180 0 1
+value=22
+T 43200 42700 5 10 0 1 90 0 1
+footprint=0805
+T 43200 42700 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 42700 51500 1 180 0 resistor.sym
+{
+T 42400 51100 5 10 0 0 180 0 1
+device=RESISTOR
+T 41900 51525 5 10 1 1 0 0 1
+refdes=R12
+T 42600 51675 5 10 1 1 180 0 1
+value=22
+T 42700 51500 5 10 0 1 90 0 1
+footprint=0805
+T 42700 51500 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 42700 51100 1 180 0 resistor.sym
+{
+T 42400 50700 5 10 0 0 180 0 1
+device=RESISTOR
+T 41900 51125 5 10 1 1 0 0 1
+refdes=R13
+T 42600 51275 5 10 1 1 180 0 1
+value=22
+T 42700 51100 5 10 0 1 90 0 1
+footprint=0805
+T 42700 51100 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 51900 58700 1 180 0 resistor.sym
+{
+T 51600 58300 5 10 0 0 180 0 1
+device=RESISTOR
+T 51100 58725 5 10 1 1 0 0 1
+refdes=R14
+T 51800 58875 5 10 1 1 180 0 1
+value=22
+T 51900 58700 5 10 0 1 90 0 1
+footprint=0805
+T 51900 58700 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 42700 54300 1 180 0 resistor.sym
+{
+T 42400 53900 5 10 0 0 180 0 1
+device=RESISTOR
+T 41900 54325 5 10 1 1 0 0 1
+refdes=R15
+T 42600 54475 5 10 1 1 180 0 1
+value=22
+T 42700 54300 5 10 0 1 90 0 1
+footprint=0805
+T 42700 54300 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 51900 58300 1 180 0 resistor.sym
+{
+T 51600 57900 5 10 0 0 180 0 1
+device=RESISTOR
+T 51100 58325 5 10 1 1 0 0 1
+refdes=R16
+T 51800 58475 5 10 1 1 180 0 1
+value=22
+T 51900 58300 5 10 0 1 90 0 1
+footprint=0805
+T 51900 58300 5 10 0 1 90 0 1
+loadstatus=smt
+}
+C 51900 57100 1 180 0 resistor.sym
+{
+T 51600 56700 5 10 0 0 180 0 1
+device=RESISTOR
+T 51100 57125 5 10 1 1 0 0 1
+refdes=R17
+T 51800 57275 5 10 1 1 180 0 1
+value=22
+T 51900 57100 5 10 0 1 90 0 1
+footprint=0805
+T 51900 57100 5 10 0 1 90 0 1
+loadstatus=smt
+}
+N 51000 58600 50400 58600 4
+N 51000 58200 50400 58200 4
+N 50400 57000 51000 57000 4
+N 51000 56600 50400 56600 4
+N 43200 42600 43400 42600 4
+N 42700 51400 43400 51400 4
+N 43400 51000 42700 51000 4
+N 42700 54200 43400 54200 4
+C 41300 56700 1 270 0 resistor.sym
+{
+T 41700 56400 5 10 0 0 270 0 1
+device=RESISTOR
+T 41200 56475 5 10 1 1 180 0 1
+refdes=R18
+T 40900 56025 5 10 1 1 0 0 1
+value=10k
+T 41300 56700 5 10 0 1 180 0 1
+footprint=0805
+T 41300 56700 5 10 0 1 180 0 1
+loadstatus=smt
+}
+C 41200 56700 1 0 0 3.3V-plus.sym
+C 41600 42500 1 0 1 npn-1.sym
+{
+T 41000 43000 5 10 0 0 0 6 1
+device=NPN_TRANSISTOR
+T 41000 43100 5 10 1 1 0 6 1
+refdes=Q1
+T 41000 42800 5 10 1 1 0 6 1
+value=MMBT3904
+T 41600 42500 5 10 0 0 0 6 1
+vendor_part_number=MMBT3904-FDICT-ND
+T 41600 42500 5 10 0 0 0 6 1
+vendor=digikey
+T 41600 42500 5 10 0 0 0 6 1
+footprint=SOT23
+T 41600 42500 5 10 0 0 0 6 1
+loadstatus=smt
+}
+C 52400 58900 1 0 0 npn-1.sym
+{
+T 53000 59400 5 10 0 0 0 0 1
+device=NPN_TRANSISTOR
+T 53000 59500 5 10 1 1 0 0 1
+refdes=Q2
+T 53000 59200 5 10 1 1 0 0 1
+value=MMBT3904
+T 52400 58900 5 10 0 0 0 0 1
+vendor_part_number=MMBT3904-FDICT-ND
+T 52400 58900 5 10 0 0 0 0 1
+vendor=digikey
+T 52400 58900 5 10 0 0 0 0 1
+footprint=SOT23
+T 52400 58900 5 10 0 0 0 0 1
+loadstatus=smt
+}
+N 41100 43500 41100 43700 4
+N 41100 43700 40600 43700 4
+{
+T 40600 43800 5 10 1 1 0 0 1
+netname=nWait
+}
+C 41000 42200 1 0 0 gnd.sym
+C 43200 43100 1 180 0 resistor.sym
+{
+T 42900 42700 5 10 0 0 180 0 1
+device=RESISTOR
+T 42400 43125 5 10 1 1 0 0 1
+refdes=R21
+T 43200 43275 5 10 1 1 180 0 1
+value=4.7k
+T 43200 43100 5 10 0 1 90 0 1
+footprint=0805
+T 43200 43100 5 10 0 1 90 0 1
+loadstatus=smt
+}
+N 43200 43000 43400 43000 4
+C 52800 58600 1 0 0 gnd.sym
+C 52200 59500 1 180 0 resistor.sym
+{
+T 51900 59100 5 10 0 0 180 0 1
+device=RESISTOR
+T 51400 59525 5 10 1 1 0 0 1
+refdes=R22
+T 52200 59675 5 10 1 1 180 0 1
+value=4.7k
+T 52200 59500 5 10 0 1 90 0 1
+footprint=0805
+T 52200 59500 5 10 0 1 90 0 1
+loadstatus=smt
+}
+N 52200 59400 52400 59400 4
+N 51300 59400 50400 59400 4

diff --git a/packages/SOT23-6.fp b/packages/SOT23-6.fp
new file mode 100644 (file)
index 0000000..024ad3f
--- /dev/null
+++ b/packages/SOT23-6.fp
@@ -0,0 +1,12 @@
+
+Element["" "SOT23-6" "" "" 5615 7584 -10161 -12011 0 100 ""]
+(
+       Pad[-3739 -5708 -3739 -4527 2756 984 3356 "pin6" "6" "square"]
+       Pad[-3739 4528 -3739 5709 2756 984 3356 "pin1" "1" "square,edge2"]
+       Pad[0 -5708 0 -4527 2756 984 3356 "pin5" "5" "square"]
+       Pad[0 4528 0 5709 2756 984 3356 "pin2" "2" "square,edge2"]
+       Pad[3740 -5708 3740 -4527 2756 984 3356 "pin4" "4" "square"]
+       Pad[3740 4528 3740 5709 2756 984 3356 "pin3" "3" "square,edge2"]
+       ElementArc [-3739 8504 500 500 0 360 1000]
+
+       )

diff --git a/packages/SOT23.fp b/packages/SOT23.fp
new file mode 100644 (file)
index 0000000..91092d7
--- /dev/null
+++ b/packages/SOT23.fp
@@ -0,0 +1,15 @@
+Element["" "SOT23" "" "" 0 0 3542 -1575 1 23 ""]
+(
+       Pad[0 -5511 0 -3149 4187 3000 5387 "" "3" "square"]
+       Pad[3543 3150 3543 5315 4187 3000 5387 "" "2" "square,edge2"]
+       Pad[-3544 3150 -3544 5315 4187 3000 5387 "" "1" "square,edge2"]
+       ElementLine [6889 -8858 -6890 -8858 1000]
+       ElementLine [6889 8662 6889 -8858 1000]
+       ElementLine [-6890 8662 6889 8662 1000]
+       ElementLine [-6890 -8858 -6890 8662 1000]
+
+       Attribute("author" "DJ Delorie")
+       Attribute("copyright" "2006 DJ Delorie")
+       Attribute("use-license" "Unlimited")
+       Attribute("dist-license" "GPL")
+       )