# To read pcb files, the pcb version (or the git source date) must be >= the file version
FileVersion[20070407]
-PCB["cncfpga" 600000 500000]
+PCB["cncfpga" 511800 300000]
Grid[100.0 0 0 0]
-Cursor[6900 33200 0.000000]
+Cursor[4600 74000 0.000000]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[600 1000 600 500 1500 700]
)
Attribute("PCB::grid::unit" "mil")
-Element["hidename,lock" "hole-fox-stack" "H4" "unknown" 342520 342520 -16900 -21000 0 100 ""]
+Element["hidename" "hole-fox-stack" "H4" "unknown" 342520 250000 -16900 -21000 0 100 ""]
(
Pin[0 0 25197 0 32000 12500 "pin1" "1" "usetherm,thermal(1S)"]
)
-Element["hidename,lock" "hole-fox-stack" "H3" "unknown" 31495 342520 -16900 -21000 0 100 ""]
+Element["hidename" "hole-fox-stack" "H3" "unknown" 31495 250000 -16900 -21000 0 100 ""]
(
Pin[0 0 25197 0 32000 12500 "pin1" "1" "usetherm,thermal(1S)"]
Pin[0 0 25197 0 32000 12500 "pin1" "1" "usetherm,thermal(1S)"]
)
-
-
Layer(1 "top")
(
)
(
Polygon("clearpoly,lock")
(
- [1300 32000] [32000 1300] [342000 1300] [372700 32000] [372700 342000]
- [342000 372700] [32000 372700] [1300 342000]
+ [1000 1000] [510800 1000] [510800 299000] [1000 299000]
)
)
Layer(3 "power plane")
(
Polygon("clearpoly,lock")
(
- [1300 32000] [32000 1300] [342000 1300] [372700 32000] [372700 342000]
- [342000 372700] [32000 372700] [1300 342000]
+ [1000 1000] [510800 1000] [510800 299000] [1000 299000]
)
)
Layer(4 "bottom")
Layer(5 "outline")
(
Attribute("PCB::skip-drc" "1")
- Line[31496 0 342520 0 1000 2000 "lock"]
- Line[342520 0 374016 31496 1000 2000 "lock"]
- Line[374016 31496 374016 342520 1000 2000 "lock"]
- Line[374016 342520 342520 374016 1000 2000 "lock"]
- Line[342520 374016 31496 374016 1000 2000 "lock"]
- Line[31496 374016 0 342520 1000 2000 "lock"]
- Line[0 342520 0 31496 1000 2000 "lock"]
- Line[0 31496 31496 0 1000 2000 "lock"]
+ Line[0 0 511800 0 1000 2000 "lock"]
+ Line[511800 0 511800 300000 1000 2000 "lock"]
+ Line[511800 300000 0 300000 1000 2000 "lock"]
+ Line[0 300000 0 0 1000 2000 "lock"]
)
Layer(6 "silk")
(
)
Layer(7 "silk")
(
- Line[1968 64960 31496 64960 1000 2000 ""]
- Line[31496 64960 64960 31496 1000 2000 ""]
- Line[64960 31496 64960 1968 1000 2000 ""]
- Line[309052 1968 309052 31496 1000 2000 ""]
- Line[309052 31496 342516 64960 1000 2000 ""]
- Line[342516 64960 372044 64960 1000 2000 ""]
- Line[1968 309052 31496 309052 1000 2000 ""]
- Line[31496 309052 64960 342516 1000 2000 ""]
- Line[64960 342516 64960 372044 1000 2000 ""]
- Line[309052 372044 309052 342516 1000 2000 ""]
- Line[309052 342516 342516 309052 1000 2000 ""]
- Line[342516 309052 372044 309052 1000 2000 ""]
- Text[117220 349125 0 200 "AMSAT-NA Fox-1 IHU v0.1" ""]
- Text[78313 364079 0 100 "` 2011 Bdale Garbee KB0G License TAPR OHL (http://www.tapr.org/OHL)" ""]
+ Text[117220 249125 0 200 "FPGA for LinuxCNC v0.1" ""]
+ Text[78313 264079 0 100 "` 2011 Bdale Garbee KB0G License TAPR OHL (http://www.tapr.org/OHL)" ""]
)
NetList()
(
T 64900 49500 5 10 0 1 0 0 1
vendor_part_number=PIC12F629-I/SNTR-ND
}
-C 65900 44200 1 0 0 TC2185.sym
-{
-T 66195 45395 5 10 1 1 0 0 1
-refdes=U4
-T 66695 45395 5 10 1 1 0 0 1
-device=TC2185-3.3
-T 65895 44195 5 10 0 1 0 0 1
-footprint=SOT23-5
-T 65900 44200 5 10 1 1 0 0 1
-value=TC2185-3.3
-T 65900 44200 5 10 0 1 0 0 1
-loadstatus=smt
-T 65900 44200 5 10 0 1 0 0 1
-vendor=digikey
-T 65900 44200 5 10 0 1 0 0 1
-vendor_part_number=TC2185-3.3VCCT-ND
-}
N 66100 47100 64400 47100 4
C 66900 43400 1 0 0 gnd.sym
-N 67000 44200 67000 43700 4
+N 67000 44500 67000 43700 4
N 67000 43800 64400 43800 4
N 64400 43800 64400 46700 4
-N 65900 44700 65700 44700 4
-N 65700 44700 65700 47100 4
+N 65700 45100 65700 47100 4
C 65400 45100 1 90 0 capacitor.sym
{
T 64700 45300 5 10 0 0 90 0 1
loadstatus=smt
T 65400 45100 5 10 0 1 0 0 1
vendor=digikey
+T 65400 45100 5 10 1 1 0 0 1
+footprint=0402
}
-C 68400 43800 1 90 0 capacitor.sym
-{
-T 67700 44000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 68600 44600 5 10 1 1 180 0 1
-refdes=C4
-T 67500 44000 5 10 0 0 90 0 1
-symversion=0.1
-T 68400 43800 5 10 0 1 0 0 1
-loadstatus=smt
-T 68400 43800 5 10 0 1 0 0 1
-vendor=digikey
-}
-C 69200 44200 1 90 0 capacitor.sym
+C 68400 44200 1 90 0 capacitor.sym
{
-T 68500 44400 5 10 0 0 90 0 1
+T 67700 44400 5 10 0 0 90 0 1
device=CAPACITOR
-T 69400 45000 5 10 1 1 180 0 1
+T 68600 45000 5 10 1 1 180 0 1
refdes=C5
-T 68300 44400 5 10 0 0 90 0 1
+T 67500 44400 5 10 0 0 90 0 1
symversion=0.1
-T 69200 44200 5 10 0 1 0 0 1
+T 68400 44200 5 10 0 1 0 0 1
loadstatus=smt
-T 69200 44200 5 10 0 1 0 0 1
+T 68400 44200 5 10 0 1 0 0 1
vendor=digikey
+T 68400 44200 5 10 1 1 0 0 1
+footprint=0402
}
-N 67000 43800 71000 43800 4
-N 69000 43800 69000 44200 4
-N 68200 44700 68000 44700 4
-N 68000 45100 71000 45100 4
+N 67000 43800 70200 43800 4
+N 68200 43800 68200 44200 4
+N 67900 45100 70200 45100 4
N 65200 47100 65200 46000 4
N 65200 45100 65200 43800 4
-C 68800 45100 1 0 0 3.3V-plus.sym
+C 68000 45100 1 0 0 3.3V-plus.sym
C 49100 60500 1 0 0 3.3V-plus.sym
N 47100 60400 51500 60400 4
N 49300 60500 49300 60400 4
T 66100 46500 5 10 0 0 0 0 1
vendor_part_number=497-2947-5-ND
T 66100 46500 5 10 0 0 0 0 1
-footprint=TC220W
+footprint=TO220W
T 66100 46500 5 10 0 1 0 0 1
loadstatus=throughhole
}
-N 65900 45100 65700 45100 4
+N 66100 45100 65700 45100 4
C 66900 45900 1 0 0 gnd.sym
C 68000 47100 1 0 0 5V-plus.sym
N 67900 47100 69700 47100 4
loadstatus=smt
T 41600 43600 5 10 0 1 0 0 1
vendor=digikey
+T 41600 43600 5 10 1 1 0 0 1
+footprint=0402
}
C 42700 43300 1 0 0 gnd.sym
C 41200 44600 1 0 0 3.3V-plus.sym
vendor=digikey
T 62400 50100 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 62400 50100 5 10 1 1 0 0 1
+footprint=0402
}
C 62100 49800 1 0 0 gnd.sym
C 64400 46600 1 0 1 conn-2.sym
T 62000 44400 9 10 1 0 0 0 1
touch
C 70900 49000 1 0 0 5V-plus.sym
-C 70900 44200 1 270 0 led.sym
+C 70100 44200 1 270 0 led.sym
{
-T 71150 44100 5 10 1 1 0 0 1
+T 70350 44100 5 10 1 1 0 0 1
refdes=D3
-T 71500 44300 5 10 0 0 270 0 1
+T 70700 44300 5 10 0 0 270 0 1
device=LED
-T 71200 43700 5 10 1 1 0 0 1
+T 70400 43700 5 10 1 1 0 0 1
value=green
-T 70900 44200 5 10 0 1 0 0 1
+T 70100 44200 5 10 0 1 0 0 1
footprint=0603diode
-T 70900 44200 5 10 0 1 0 0 1
+T 70100 44200 5 10 0 1 0 0 1
loadstatus=smt
-T 70900 44200 5 10 0 1 0 0 1
+T 70100 44200 5 10 0 1 0 0 1
vendor=digikey
}
C 69600 46200 1 270 0 led.sym
T 69800 46200 5 10 0 1 0 0 1
loadstatus=smt
}
-C 71100 44200 1 90 0 resistor.sym
+C 70300 44200 1 90 0 resistor.sym
{
-T 70700 44500 5 10 0 0 90 0 1
+T 69900 44500 5 10 0 0 90 0 1
device=RESISTOR
-T 71400 44900 5 10 1 1 180 0 1
+T 70600 44900 5 10 1 1 180 0 1
refdes=R3
-T 71200 44500 5 10 1 1 0 0 1
+T 70400 44500 5 10 1 1 0 0 1
value=330
-T 71100 44200 5 10 0 1 0 0 1
+T 70300 44200 5 10 0 1 0 0 1
footprint=0402
-T 71100 44200 5 10 0 1 0 0 1
+T 70300 44200 5 10 0 1 0 0 1
loadstatus=smt
}
C 69600 45500 1 0 0 gnd.sym
vendor=digikey
T 62200 56100 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 62200 56100 5 10 1 1 0 0 1
+footprint=0402
}
N 62000 57100 61500 57100 4
N 62000 57100 62000 57000 4
vendor=digikey
T 65000 56100 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 65000 56100 5 10 1 1 0 0 1
+footprint=0402
}
N 64800 57100 64300 57100 4
N 64800 57100 64800 57000 4
vendor=digikey
T 67800 56100 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 67800 56100 5 10 1 1 0 0 1
+footprint=0402
}
N 67600 57100 67100 57100 4
N 67600 57100 67600 57000 4
vendor=digikey
T 70600 56100 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 70600 56100 5 10 1 1 0 0 1
+footprint=0402
}
N 70400 57100 69900 57100 4
N 70400 57100 70400 57000 4
N 70400 56100 70400 55900 4
N 70400 55900 71300 55900 4
-C 69800 44200 1 90 0 capacitor.sym
+C 69000 44200 1 90 0 capacitor.sym
{
-T 69100 44400 5 10 0 0 90 0 1
+T 68300 44400 5 10 0 0 90 0 1
device=CAPACITOR
-T 70000 45000 5 10 1 1 180 0 1
+T 69200 45000 5 10 1 1 180 0 1
refdes=C11
-T 68900 44400 5 10 0 0 90 0 1
+T 68100 44400 5 10 0 0 90 0 1
symversion=0.1
-T 69700 44300 5 10 1 1 0 0 1
+T 68900 44300 5 10 1 1 0 0 1
value=0.1uF
-T 69800 44200 5 10 0 1 0 0 1
+T 69000 44200 5 10 0 1 0 0 1
loadstatus=smt
-T 69800 44200 5 10 0 1 0 0 1
+T 69000 44200 5 10 0 1 0 0 1
vendor=digikey
-T 69800 44200 5 10 0 1 0 0 1
+T 69000 44200 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 69000 44200 5 10 1 1 0 0 1
+footprint=0402
}
-C 70400 44200 1 90 0 capacitor.sym
+C 69600 44200 1 90 0 capacitor.sym
{
-T 69700 44400 5 10 0 0 90 0 1
+T 68900 44400 5 10 0 0 90 0 1
device=CAPACITOR
-T 70600 45000 5 10 1 1 180 0 1
+T 69800 45000 5 10 1 1 180 0 1
refdes=C12
-T 69500 44400 5 10 0 0 90 0 1
+T 68700 44400 5 10 0 0 90 0 1
symversion=0.1
-T 70300 44300 5 10 1 1 0 0 1
+T 69500 44300 5 10 1 1 0 0 1
value=0.1uF
-T 70400 44200 5 10 0 1 0 0 1
+T 69600 44200 5 10 0 1 0 0 1
loadstatus=smt
-T 70400 44200 5 10 0 1 0 0 1
+T 69600 44200 5 10 0 1 0 0 1
vendor=digikey
-T 70400 44200 5 10 0 1 0 0 1
+T 69600 44200 5 10 0 1 0 0 1
vendor_part_number=399-3027-1-ND
+T 69600 44200 5 10 1 1 0 0 1
+footprint=0402
+}
+N 68800 44200 68800 43800 4
+N 69400 44200 69400 43800 4
+C 66100 44500 1 0 0 volt_reg_pos.sym
+{
+T 67700 45800 5 10 0 0 0 0 1
+device=7805
+T 66600 45500 5 10 1 1 0 6 1
+refdes=U4
+T 67200 45500 5 10 1 1 0 0 1
+value=7833
+T 66100 44500 5 10 0 0 0 0 1
+vendor=digikey
+T 66100 44500 5 10 0 0 0 0 1
+vendor_part_number=296-21633-5-ND
+T 66100 44500 5 10 0 0 0 0 1
+footprint=TO220W
+T 66100 44500 5 10 0 1 0 0 1
+loadstatus=throughhole
}
-N 69600 44200 69600 43800 4
-N 70200 44200 70200 43800 4
--- /dev/null
+ # grab the input values and convert to 1/100 mil
+ # how much to grow the pads by for soldermask [1/100 mil]
+ # clearance from planes [1/100 mil]
+ # silk screen width [1/100 mil]
+ # courtyard silk screen width [1/100 mil]
+# element_flags, description, pcb-name, value, mark_x, mark_y,
+# text_x, text_y, text_direction, text_scale, text_flags
+Element[0x00000000 "Standard SMT resistor, capacitor etc" "" "0603" 0 0 -3150 -3150 0 100 ""]
+(
+#
+# Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags]
+ Pad[-2559 -492
+ -2559 492
+ 2952 2000 3552 "1" "1" "square"]
+ Pad[2559 -492
+ 2559 492
+ 2952 2000 3552 "2" "2" "square"]
+
+# ElementLine[ -4300 -2300 -4300 2300 1000 ]
+# ElementLine[ -4300 2300 4500 2300 1000 ]
+# ElementLine[ 4500 2300 4500 -2300 1000 ]
+# ElementLine[ 4500 -2300 -4300 -2300 1000 ]
+ ElementLine[ 4700 2500 4700 -2500 1000 ]
+ ElementLine[ 4700 2500 3700 2500 1000 ]
+ ElementLine[ 4700 -2500 3700 -2500 1000 ]
+
+#
+# This draws a 1 mil placement courtyard outline in silk. It should probably
+# not be included since you wont want to try and fab a 1 mil silk line. Then
+# again, it is most useful during parts placement. It really is time for some
+# additional non-fab layers...
+# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW]
+# ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW]
+# ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW]
+# ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW]
+)