+2008-05-01 Raphael Neider <rneider AT web.de>
+
+ * src/pic16/device.h: removed unused field PIC16_device.sfrRange,
+ moved xinst flag into pic16_options_t
+ * src/pic16/device.c (default_device, pic16_list_devices,
+ pic16_find_device): removed references to sfrrange
+ * src/pic16/gen.c (genFunction),
+ src/pic16/glue.c (pic16initialComments),
+ src/pic16/main.c (pic16_optionsTable),
+ src/pic16/ralloc.c (newReg, pic16_writeUsedRegs): updated references
+ to xinst
+ * device/include/pic16/pic16devices.txt: removed sfrrange lines
+
2008-04-29 Raphael Neider <rneider AT web.de>
* src/pic16/devices.inc,
# split <offset>
# Addresses below <offset> refer to bank 0, addresses above <offset>
# refer to SFRs in bank 15 for references via the access bank.
-# sfrrange <first> <last>
-# SFRs occupy addresses <first> to <last> (both included) and must
-# hence not be used as RAM.
# configrange <first> <last>
# Configuration registers occupy addresses <first> to <last> (both
# included).
name 18f1220
ramsize 256
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0xff
configword 0x300002 0x0f 0xff
name 18f2220
ramsize 512
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0xff
configword 0x300002 0x0f 0xff
name 18f2221
ramsize 512
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x37
configword 0x300002 0x1f 0xff
name 18f2331
ramsize 768
split 0x60
-sfrrange 0xf60 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0xff
configword 0x300002 0x0f 0xff
name 18f242
ramsize 768
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0x27 0xff
configword 0x300002 0x0f 0xff
name 18f2420
ramsize 768
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x07
configword 0x300002 0x1f 0xff
name 18f2423
ramsize 768
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x07
configword 0x300002 0x1f 0xff
name 18f2455
ramsize 2048
split 0x60
-sfrrange 0xf60 0xfff
configrange 0x300000 0x30000d
configword 0x300000 0x3f 0xc0
configword 0x300001 0xcf 0x35
name 18f248
ramsize 768
split 0x60
-sfrrange 0xf00 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0x27 0xff
configword 0x300002 0x0f 0xff
name 18f2480
ramsize 768
split 0x60
-sfrrange 0xd00 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x37
configword 0x300002 0x1f 0xff
name 18f24j10
ramsize 1024
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300000 0x300005
configword 0x300000 0xe1 0xff
configword 0x300001 0x04 0xf7
name 18f2525
ramsize 4096
split 0x80
-sfrrange 0xf80 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x37
configword 0x300002 0x1f 0xff
name 18f2585
ramsize 4096
split 0x60
-sfrrange 0xd00 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x37
configword 0x300002 0x1f 0xff
name 18f2682
ramsize 4096
split 0x60
-sfrrange 0xd00 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0xcf 0x37
configword 0x300002 0x1f 0xff
name 18f6520
ramsize 2048
split 0x60
-sfrrange 0xf60 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0x27 0xff
configword 0x300002 0x0f 0xff
name 18f6585
ramsize 3328
split 0x60
-sfrrange 0xd00 0xfff
configrange 0x300001 0x30000d
configword 0x300001 0x2f 0xff
configword 0x300002 0x0f 0xff
{ "p18f452", "18f452", "pic18f452", "f452" },
0x600,
0x80,
- { 0xf80, 0xfff },
{ /* configuration words */
0x300001, 0x30000d,
{ { 0x27, 0, 0xff } /* 1 */ , { 0x0f, 0, 0xff } /* 2 */ ,
int i = 0;
if (options.verbose) {
- printf("device RAM split SFRs config words\n");
+ printf("device RAM split config words\n");
} // if
while (head) {
printf("%-10s ", head->name[0]);
if (options.verbose) {
- printf("%5d 0x%02x 0x%03x..0x%03x 0x%06x..0x%06x\n",
+ printf("%5d 0x%02x 0x%06x..0x%06x\n",
head->RAMsize,
head->acsSplitOfs,
- head->sfrRange.sfrLoAddr,
- head->sfrRange.sfrHiAddr,
head->cwInfo.confAddrStart,
head->cwInfo.confAddrEnd);
} else {
} else {
d->acsSplitOfs = val[0];
} // if
- } else if (0 == strcmp(key, "sfrrange")) {
- // sfrrange %<first>i %<last>i
- res = sscanf(&line[1+strlen(key)], " %i %i",
- &val[0], &val[1]);
- if (res < 2) {
- SYNTAX("<first> <last> (e.g., 0xf60 0xfff) expected.");
- } else {
- d->sfrRange.sfrLoAddr = val[0];
- d->sfrRange.sfrHiAddr = val[1];
- } // if
} else if (0 == strcmp(key, "configrange")) {
// configrange %<first>i %<last>i
res = sscanf(&line[1+strlen(key)], " %i %i",
#define CONFIGURATION_WORDS 20
#define IDLOCATION_BYTES 20
-typedef struct {
- int sfrLoAddr;
- int sfrHiAddr;
-} sfrRangeInfo_t;
-
-
typedef struct {
unsigned int mask;
int emit;
/* RAMsize *must* be the first item to copy for 'using' */
int RAMsize; /* size of Data RAM - VR 031120 */
int acsSplitOfs; /* access bank split offset */
- sfrRangeInfo_t sfrRange; /* SFR range */
configWordsInfo_t cwInfo; /* configuration words info */
idBytesInfo_t idInfo; /* ID Locations info */
/* next *must* be the first field NOT being copied via 'using' */
struct PIC16_device *next; /* linked list */
} PIC16_device;
+extern PIC16_device *pic16;
+
/* Given a pointer to a register, this macro returns the bank that it is in */
#define REG_ADDR(r) ((r)->isBitField ? (((r)->address)>>3) : (r)->address)
unsigned long opt_flags;
int gstack;
unsigned int debgen;
+ int xinst;
} pic16_options_t;
-extern int xinst;
+extern pic16_options_t pic16_options;
#define STACK_MODEL_SMALL (pic16_options.stack_model == 0)
#define STACK_MODEL_LARGE (pic16_options.stack_model == 1)
extern stats_t statistics;
-extern pic16_options_t pic16_options;
-extern PIC16_device *pic16;
-
/****************************************/
void pic16_assignConfigWordValue(int address, unsigned int value);
void pic16_assignIdByteValue(int address, char value);
if (sym->regsUsed) {
pic16_emitpinfo(INF_LOCALREGS, pic16_newpCodeOpLocalRegs(LR_ENTRY_BEGIN));
- if(!xinst) {
+ if(!pic16_options.xinst) {
/* save the registers used */
DEBUGpic16_emitcode("; **", "Saving used registers in stack");
for ( i = 0 ; i < sym->regsUsed->size ; i++) {
static void
pic16initialComments (FILE * afile)
{
- initialComments (afile);
- fprintf (afile, "; PIC16 port for the Microchip 16-bit core micros\n");
- if(xinst)
- fprintf (afile, "; * Extended Instruction Set\n");
-
- if(pic16_mplab_comp)
- fprintf(afile, "; * MPLAB/MPASM/MPASMWIN/MPLINK compatibility mode enabled\n");
- fprintf (afile, iComments2);
-
- if(options.debug) {
- fprintf (afile, "\n\t.ident \"SDCC version %s #%s [pic16 port]%s\"\n",
- SDCC_VERSION_STR, getBuildNumber(), (!xinst?"":" {extended}") );
- }
+ initialComments (afile);
+ fprintf (afile, "; PIC16 port for the Microchip 16-bit core micros\n");
+ if (pic16_options.xinst) {
+ fprintf (afile, "; * Extended Instruction Set\n");
+ } // if
+
+ if (pic16_mplab_comp) {
+ fprintf(afile, "; * MPLAB/MPASM/MPASMWIN/MPLINK compatibility mode enabled\n");
+ } // if
+ fprintf (afile, iComments2);
+
+ if (options.debug) {
+ fprintf (afile, "\n\t.ident \"SDCC version %s #%s [pic16 port]%s\"\n",
+ SDCC_VERSION_STR, getBuildNumber(), (!pic16_options.xinst?"":" {extended}") );
+ } // if
}
int
pic16_sectioninfo_t pic16_sectioninfo;
-int xinst=0;
-
-
extern char *pic16_processor_base_name(void);
void pic16_pCodeInitRegisters(void);
/* code generation options */
{ 0, STACK_MODEL, NULL, "use stack model 'small' (default) or 'large'"},
#if XINST
- { 'y', "--extended", &xinst, "enable Extended Instruction Set/Literal Offset Addressing mode"},
+ { 'y', "--extended", &pic16_options.xinst, "enable Extended Instruction Set/Literal Offset Addressing mode"},
#endif
{ 0, "--pno-banksel", &pic16_options.no_banksel, "do not generate BANKSEL assembler directives"},
if(name)
dReg->name = Safe_strdup(name);
else {
- if(xinst && pc_type == PO_GPR_TEMP) {
+ if(pic16_options.xinst && pc_type == PO_GPR_TEMP) {
sprintf(buffer,"0x%02x", dReg->rIdx);
} else {
sprintf(buffer,"r0x%02x", dReg->rIdx);
pic16_dump_isection(of, rel_idataSymSet, 0);
pic16_dump_isection(of, fix_idataSymSet, 1);
- if(!xinst) {
+ if(!pic16_options.xinst) {
/* dump internal registers */
pic16_dump_int_registers(of, pic16_int_regs);
}