* src/hc08/gen.c (loadRegFromAop): better use of clra & clrx

* src/hc08/gen.c (genAnd, genOr): fixed bug with conditional when
multi-byte volatile operands are used
* src/hc08/gen.c (shiftRLong): fixed bug with wrong rotate direction
* src/hc08/main.c (_hc08_genAssemblerPreamble): moved the built-in
initialization to area GSINIT0 so that it would always precede
any static initializers in GSINIT
* support/regression/tests/zeropad.c: fixed idata define for hc08
* support/regression/tests/bug-927659.c,
* support/regression/tests/float_trans.c: disabled tests for hc08
pending missing library routines
* .version: increased version number to 2.4.4 - hc08 port now passes
regression tests

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3462 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/.version b/.version
index 35cee72dcbf498e180718336516112fda9d8b3c8..79a614418f747a2c5e6c8a8a4c42d12e16b06607 100644 (file)
--- a/.version
+++ b/.version
@@ -1 +1 @@
-2.4.3
+2.4.4

diff --git a/ChangeLog b/ChangeLog
index c465f921153e12ea8a743280a23a7d1039731aa7..5b8ca55d3fc36887510a13df5200a0bec9bb6231 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,20 @@
+2004-08-30 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
+
+       * src/hc08/gen.c (loadRegFromAop): better use of clra & clrx
+       * src/hc08/gen.c (genAnd, genOr): fixed bug with conditional when
+       multi-byte volatile operands are used
+       * src/hc08/gen.c (shiftRLong): fixed bug with wrong rotate direction
+       * src/hc08/main.c (_hc08_genAssemblerPreamble): moved the built-in
+       initialization to area GSINIT0 so that it would always precede
+       any static initializers in GSINIT
+       * support/regression/tests/zeropad.c: fixed idata define for hc08
+       * support/regression/tests/bug-927659.c,
+       * support/regression/tests/float_trans.c: disabled tests for hc08
+       pending missing library routines
+       * .version: increased version number to 2.4.4 - hc08 port now passes
+       regression tests
+
+
 2004-08-29 Bernhard Held <bernhard AT bernhardheld.de>
 
        * device/lib/pic16/Makefile.common.in: added $(MM) to fix `make clean`

diff --git a/src/hc08/gen.c b/src/hc08/gen.c
index 0487f96660767fdd6b72f8164bf513eb3a2528bd..01864aea4b5ce0469968de34387b9b1f39a6ad15 100644 (file)
--- a/src/hc08/gen.c
+++ b/src/hc08/gen.c
@@ -650,7 +650,7 @@ loadRegFromAop (regs *reg, asmop *aop, int loffset)
     }
 
 forceload:
-
+  
   switch (regidx)
     {
       case A_IDX:
@@ -662,7 +662,13 @@ forceload:
               emitcode ("clra", ""); /* TODO: handle sign extension */
           }
         else
-          emitcode ("lda","%s", aopAdrStr (aop, loffset, FALSE));
+          {
+            char * l = aopAdrStr (aop, loffset, FALSE);
+            if (!strcmp (l, zero))
+              emitcode ("clra", "");
+            else
+              emitcode ("lda", "%s", l);
+          }
         break;
       case X_IDX:
         if (aop->type == AOP_REG)
@@ -673,7 +679,13 @@ forceload:
               emitcode ("clrx", ""); /* TODO: handle sign extension */
           }
         else
-          emitcode ("ldx","%s", aopAdrStr (aop, loffset, FALSE));
+          {
+            char * l = aopAdrStr (aop, loffset, FALSE);
+            if (!strcmp (l, zero))
+              emitcode ("clrx", "");
+            else
+              emitcode ("ldx", "%s", l);
+          }
         break;
       case H_IDX:
         if (hc08_reg_a->isFree)
@@ -4847,12 +4859,37 @@ genAnd (iCode * ic, iCode * ifx)
   if (AOP_TYPE (right) == AOP_LIT)
     lit = (unsigned long) floatFromVal (AOP (right)->aopu.aop_lit);
       
+  size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right);
+  
+  if (AOP_TYPE (result) == AOP_CRY
+      && size > 1
+      && (isOperandVolatile (left, FALSE) || isOperandVolatile (right, FALSE)))
+    {
+      /* this generates ugly code, but meets volatility requirements */
+      loadRegFromConst (hc08_reg_a, zero);
+      pushReg (hc08_reg_a, TRUE);
+      
+      offset = 0;
+      while (size--)
+        {
+          loadRegFromAop (hc08_reg_a, AOP (left), offset);
+          accopWithAop ("and", AOP (right), offset);
+          emitcode ("ora", "1,s");
+          emitcode ("sta", "1,s");
+          offset++;
+        }
+      
+      pullReg (hc08_reg_a);
+      emitcode ("tsta", "");
+      genIfxJump (ifx, "a");
+      goto release;
+    }
+  
   if (AOP_TYPE (result) == AOP_CRY)
     {
       symbol *tlbl = NULL;
       wassertl (ifx, "AOP_CRY result without ifx");
       
-      size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right);
       offset = 0;
       while (size--)
         {
@@ -4860,11 +4897,7 @@ genAnd (iCode * ic, iCode * ifx)
           
           if (AOP_TYPE (right) == AOP_LIT && bytemask == 0)
             {
-              if (isOperandVolatile (left, FALSE))
-                {
-                  loadRegFromAop (hc08_reg_a, AOP (left), offset);
-                  hc08_freeReg( hc08_reg_a);      
-                }
+              /* do nothing */
             }
           else if (AOP_TYPE (right) == AOP_LIT && bytemask == 0xff)
             {
@@ -4893,6 +4926,7 @@ genAnd (iCode * ic, iCode * ifx)
         if (tlbl)
           emitLabel (tlbl);
         genIfxJump (ifx, "a");
+        goto release;
     }
   
   size = AOP_SIZE (result);
@@ -4989,12 +5023,37 @@ genOr (iCode * ic, iCode * ifx)
   if (AOP_TYPE (right) == AOP_LIT)
     lit = (unsigned long) floatFromVal (AOP (right)->aopu.aop_lit);
       
+  size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right);
+  
+  if (AOP_TYPE (result) == AOP_CRY
+      && size > 1
+      && (isOperandVolatile (left, FALSE) || isOperandVolatile (right, FALSE)))
+    {
+      /* this generates ugly code, but meets volatility requirements */
+      loadRegFromConst (hc08_reg_a, zero);
+      pushReg (hc08_reg_a, TRUE);
+      
+      offset = 0;
+      while (size--)
+        {
+          loadRegFromAop (hc08_reg_a, AOP (left), offset);
+          accopWithAop ("ora", AOP (right), offset);
+          emitcode ("ora", "1,s");
+          emitcode ("sta", "1,s");
+          offset++;
+        }
+      
+      pullReg (hc08_reg_a);
+      emitcode ("tsta", "");
+      genIfxJump (ifx, "a");
+      goto release;
+    }
+  
   if (AOP_TYPE (result) == AOP_CRY)
     {
       symbol *tlbl = NULL;
       wassertl (ifx, "AOP_CRY result without ifx");
       
-      size = (AOP_SIZE (left) >= AOP_SIZE (right)) ? AOP_SIZE (left) : AOP_SIZE (right);
       offset = 0;
       while (size--)
         {
@@ -5801,7 +5860,7 @@ XAccSRsh (int shCount)
       ;
     }
 
-  /* asrx/rola is only 2 cycles and bytes, so an unrolled loop is often  */
+  /* asrx/rora is only 2 cycles and bytes, so an unrolled loop is often  */
   /* the fastest and shortest.                                           */
   for (i=0;i<shCount;i++)
     {
@@ -6472,7 +6531,7 @@ shiftRLong (operand * left, int offl,
         rmwWithReg ("asr", hc08_reg_x);
       else
         rmwWithReg ("lsr", hc08_reg_x);
-      rmwWithReg ("rol", hc08_reg_a);
+      rmwWithReg ("ror", hc08_reg_a);
       storeRegToAop (hc08_reg_xa, AOP (result), MSB24);
     }
   else if (offl==MSB16)

diff --git a/src/hc08/main.c b/src/hc08/main.c
index 5b72405e24ffe8c479f44deacea3f59545627164..7a5d1730e6751d5743c3cc4b4477ee05f70bb15a 100644 (file)
--- a/src/hc08/main.c
+++ b/src/hc08/main.c
@@ -165,6 +165,7 @@ _hc08_genAssemblerPreamble (FILE * of)
   mainExists->block=0;
 
   fprintf (of, "\t.area %s\n",port->mem.code_name);
+  fprintf (of, "\t.area GSINIT0 (CODE)\n");
   fprintf (of, "\t.area %s\n",port->mem.static_name);
   fprintf (of, "\t.area %s\n",port->mem.post_static_name);
   fprintf (of, "\t.area %s\n",port->mem.xinit_name);
@@ -197,7 +198,7 @@ _hc08_genAssemblerPreamble (FILE * of)
        fprintf (of, "\t.org\t0xfffe\n");
       fprintf (of, "\t.dw\t%s", "__sdcc_gs_init_startup\n\n");
         
-      fprintf (of, "\t.area GSINIT\n");
+      fprintf (of, "\t.area GSINIT0\n");
       fprintf (of, "__sdcc_gs_init_startup:\n");
       if (options.stack_loc)
         {

diff --git a/support/regression/tests/bug-927659.c b/support/regression/tests/bug-927659.c
index dac64e04f91a37785cae7f19701a2d42da087bc6..520bb75ca8aef6bd4aae1fb9cf89da6c653cabd9 100644 (file)
--- a/support/regression/tests/bug-927659.c
+++ b/support/regression/tests/bug-927659.c
@@ -44,7 +44,7 @@ void putchar (char c)
 void
 testAddFunc(void)
 {
-#ifndef SDCC_z80
+#if !defined(SDCC_z80) && !defined(SDCC_hc08)
   char buf[5];
   unsigned char count = 0;
 

diff --git a/support/regression/tests/float_trans.c b/support/regression/tests/float_trans.c
index 6431baf664888cd93c85eb2005dc40a37449a0d6..a6dbb1582e88795777122c4e64915482f533558f 100644 (file)
--- a/support/regression/tests/float_trans.c
+++ b/support/regression/tests/float_trans.c
@@ -11,7 +11,7 @@
 void
 testTrans(void)
 {
-#if !defined(SDCC_z80) && !PORT_HOST
+#if !defined(SDCC_z80) && !defined(SDCC_hc08) && !PORT_HOST
 # ifdef SQRTF
       ASSERT(fabsf (sqrtf (5.0)     -   2.23606801) < 0.00001);
 # endif

diff --git a/support/regression/tests/zeropad.c b/support/regression/tests/zeropad.c
index 4cef5c4d2fe499cbe972a6c83e64d4df5e18db65..e04bb8848dc1d7d890d29c4e989f1b79774b47ce 100644 (file)
--- a/support/regression/tests/zeropad.c
+++ b/support/regression/tests/zeropad.c
@@ -25,6 +25,9 @@ typedef unsigned int size_t;
 # define xdata
 # define code
 #endif
+#if defined(SDCC_hc08)
+# define idata
+#endif
 
 const char *string1 = "\x00\x01";
 const char string2[] = "\x00\x01";