git.gag.com Git - fw/sdcc/blob - device/lib/small/_iscntrl.asm

   1 ;--------------------------------------------------------
   2 ; File Created by SDCC : FreeWare ANSI-C Compiler
   3 ; Version 2.1.9Ga Sun Jan 16 17:31:12 2000
   4
   5 ;--------------------------------------------------------
   6         .module _iscntrl
   7 ;--------------------------------------------------------
   8 ; publics variables in this module
   9 ;--------------------------------------------------------
  10         .globl _iscntrl
  11 ;--------------------------------------------------------
  12 ; special function registers
  13 ;--------------------------------------------------------
  14 ;--------------------------------------------------------
  15 ; special function bits
  16 ;--------------------------------------------------------
  17 ;--------------------------------------------------------
  18 ; internal ram data
  19 ;--------------------------------------------------------
  20         .area   DSEG    (DATA)
  21 ;--------------------------------------------------------
  22 ; overlayable items in internal ram
  23 ;--------------------------------------------------------
  24         .area _DUMMY
  25         .area   OSEG    (OVR,DATA)
  26 ;--------------------------------------------------------
  27 ; indirectly addressable internal ram data
  28 ;--------------------------------------------------------
  29         .area   ISEG    (DATA)
  30 ;--------------------------------------------------------
  31 ; bit data
  32 ;--------------------------------------------------------
  33         .area   BSEG    (BIT)
  34 ;--------------------------------------------------------
  35 ; external ram data
  36 ;--------------------------------------------------------
  37         .area   XSEG    (XDATA)
  38 ;--------------------------------------------------------
  39 ; global & static initialisations
  40 ;--------------------------------------------------------
  41         .area GSINIT (CODE)
  42 ;--------------------------------------------------------
  43 ; code
  44 ;--------------------------------------------------------
  45         .area CSEG (CODE)
  46         G$iscntrl$0$0 ==.
  47 ;       _iscntrl.c 27
  48 ;       -----------------------------------------
  49 ;        function iscntrl
  50 ;       -----------------------------------------
  51 _iscntrl:
  52         ar2 = 0x02
  53         ar3 = 0x03
  54         ar4 = 0x04
  55         ar5 = 0x05
  56         ar6 = 0x06
  57         ar7 = 0x07
  58         ar0 = 0x00
  59         ar1 = 0x01
  60 ;       _iscntrl.c 32
  61         mov     r2,dpl
  62 ;       _iscntrl.c 30
  63         clr     c
  64         mov     a,#0x1f
  65         subb    a,r2
  66 ; Peephole 108   removed ljmp by inverse jump logic
  67         jnc  00101$
  68 00107$:
  69 ; Peephole 132   changed ljmp to sjmp
  70 ; Peephole 199   optimized misc jump sequence
  71         cjne r2,#0x7f,00102$
  72 ; Peephole 201   removed redundant sjmp
  73 00108$:
  74 00109$:
  75 00101$:
  76 ;       _iscntrl.c 31
  77         mov     dpl,#0x01
  78 ; Peephole 132   changed ljmp to sjmp
  79         sjmp 00104$
  80 00102$:
  81 ;       _iscntrl.c 32
  82         mov     dpl,#0x00
  83 00104$:
  84         C$_iscntrl.c$33$1$1 ==.
  85         XG$iscntrl$0$0 ==.
  86         ret
  87         .area   CSEG    (CODE)