16 reg [13:0] adc_a_int = 0;
17 reg [13:0] adc_b_int = 0;
19 assign adc_a = adc_oe_a ? adc_a_int : 14'bz;
20 assign adc_ovf_a = adc_oe_a ? 1'b0 : 1'bz;
21 assign adc_b = adc_oe_b ? adc_b_int : 14'bz;
22 assign adc_ovf_b = adc_oe_b ? 1'b0 : 1'bz;
25 real freq = 330000/100000000;
27 real scale = 8190; // math.pow(2,13)-2;
37 //adc_a_int <= $rtoi(math.round(math.sin(phase*math.MATH_2_PI)*scale)) ;
38 adc_a_int <= adc_a_int + 3;
40 adc_b_int <= adc_b_int - 7;
41 //adc_b_int <= $rtoi(math.round(math.cos(phase*math.MATH_2_PI)*scale)) ;
43 phase <= phase + freq - 1;
45 phase <= phase + freq;
48 endmodule // adc_model