10 wire sd_clk, sd_mosi, sd_miso;
11 wire [7:0] clk_div = 12;
12 wire [7:0] send_dat = 23;
26 sd_spi dut(.clk(clk),.rst(rst),
27 .sd_clk(sd_clk),.sd_mosi(sd_mosi),.sd_miso(sd_miso),
28 .clk_div(clk_div),.send_dat(send_dat),.rcv_dat(rcv_dat),
29 .go(go),.ready(ready) );
33 $dumpfile("sd_spi_tb.vcd");
34 $dumpvars(0,sd_spi_tb);
40 endmodule // sd_spi_tb