2 * Copyright 2010 Free Software Foundation, Inc.
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <memory_map.h>
32 bool wbxng_init_rx(struct db_base *dbb);
33 bool wbxng_init_tx(struct db_base *dbb);
34 bool wbxng_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
35 bool wbxng_set_gain_rx(struct db_base *dbb, u2_fxpt_gain_t gain);
36 bool wbxng_set_gain_tx(struct db_base *dbb, u2_fxpt_gain_t gain);
37 bool wbxng_set_tx_enable(struct db_base *dbb, bool on);
43 struct db_wbxng_rx db_wbxng_rx = {
46 .base.output_enables = RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5|PLL_CE|PLL_PDBRF|ATTN_MASK,
47 .base.used_pins = 0xFFFF,
48 .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(67.5e6),
49 .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2200e6),
50 .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
51 .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(31.5),
52 .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.5),
53 .base.is_quadrature = true,
54 .base.i_and_q_swapped = false,
55 .base.spectrum_inverted = false,
56 .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
57 .base.init = wbxng_init_rx,
58 .base.set_freq = wbxng_set_freq,
59 .base.set_gain = wbxng_set_gain_rx,
60 .base.set_tx_enable = 0,
61 .base.atr_mask = RXBB_EN | RX2_RX1N,
62 .base.atr_txval = RX2_RX1N,
63 .base.atr_rxval = RXBB_EN,
64 // .base.atr_tx_delay =
65 // .base.atr_rx_delay =
66 .common.adf4350_regs_int = UINT16_C(100),
67 .common.adf4350_regs_frac = 0,
68 .common.adf4350_regs_prescaler = 1,
69 .common.adf4350_regs_mod = UINT16_C(0xfff),
70 .common.adf4350_regs_10_bit_r_counter = UINT16_C(1),
71 .common.adf4350_regs_divider_select = 0,
72 .common.adf4350_regs_8_bit_band_select_clock_divider_value = 0,
73 .common.spi_mask = SPI_SS_RX_DB,
78 struct db_wbxng_tx db_wbxng_tx = {
81 .base.output_enables = RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5|PLL_CE|PLL_PDBRF,
82 .base.used_pins = 0xFFFF,
83 .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(67.5e6),
84 .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2200e6),
85 .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
86 .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(25),
87 .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.1),
88 .base.is_quadrature = true,
89 .base.i_and_q_swapped = false,
90 .base.spectrum_inverted = false,
91 .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
92 .base.init = wbxng_init_tx,
93 .base.set_freq = wbxng_set_freq,
94 .base.set_gain = wbxng_set_gain_tx,
95 .base.set_tx_enable = wbxng_set_tx_enable,
96 .base.atr_mask = RX_TXN | TXMOD_EN,
97 .base.atr_txval = TXMOD_EN,
98 .base.atr_rxval = RX_TXN,
99 // .base.atr_tx_delay =
100 // .base.atr_rx_delay =
101 .common.adf4350_regs_int = UINT16_C(100),
102 .common.adf4350_regs_frac = 0,
103 .common.adf4350_regs_prescaler = 1,
104 .common.adf4350_regs_mod = UINT16_C(0xfff),
105 .common.adf4350_regs_10_bit_r_counter = UINT16_C(1),
106 .common.adf4350_regs_divider_select = 0,
107 .common.adf4350_regs_8_bit_band_select_clock_divider_value = 0,
108 .common.spi_mask = SPI_SS_TX_DB,
109 .common.freq_mult = 2
114 wbxng_init_tx(struct db_base *dbb)
116 //struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
117 clocks_enable_tx_dboard(true, 0);
118 hal_gpio_write( GPIO_TX_BANK, ENABLE_5|ENABLE_33, ENABLE_5|ENABLE_33 );
122 // Set the freq now to get the one time 10ms delay out of the way.
124 dbb->set_freq(dbb, dbb->freq_min, &dc);
129 wbxng_init_rx(struct db_base *dbb)
131 //struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
132 clocks_enable_rx_dboard(true, 0);
133 hal_gpio_write( GPIO_RX_BANK, ENABLE_5|ENABLE_33, ENABLE_5|ENABLE_33 );
138 dbb->set_gain(dbb,U2_DOUBLE_TO_FXPT_GAIN(20.0));
140 // Set the freq now to get the one time 10ms delay out of the way.
142 dbb->set_freq(dbb, dbb->freq_min, &dc);
148 wbxng_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc)
150 bool ok = adf4350_set_freq(2*freq,dbb);
151 *dc = adf4350_get_freq(dbb)/2;
157 wbxng_set_gain_tx(struct db_base *dbb, u2_fxpt_gain_t gain)
159 struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
162 //gain = max(db->gain_min, min(gain, db->gain_max));
164 int offset_q8 = (int)(1.4/3.3*4096*(1<<15));
165 int range_q15 = (int)(-0.9*4096/3.3*256*128);
166 int slope_q8 = range_q15/db->base.gain_max;
168 int dacword = ((slope_q8 * gain) + offset_q8)>>15;
169 //printf("DACWORD 0x%x\n",dacword);
170 lsdac_write_tx(0,dacword);
175 wbxng_set_gain_rx(struct db_base *dbb, u2_fxpt_gain_t gain)
177 struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
180 //gain = max(db->gain_min, min(gain, db->gain_max));
182 int iobits = (int) ((~((db->base.gain_max - gain) << 2)) & ATTN_MASK);
183 //printf("gain %d, gainmax %d, RX_ATTN_MASK = 0x%x, RX_ATTN_WORD = 0x%x\n", gain, db->base.gain_max, (int) (ATTN_MASK), (int) (iobits));
185 hal_gpio_write( GPIO_RX_BANK, (int) (iobits), ATTN_MASK );
191 wbxng_set_tx_enable(struct db_base *dbb, bool on)
193 struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
201 wbxng_lock_detect(struct db_base *dbb)
203 struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
206 pins = hal_gpio_read( db->base.is_tx ? GPIO_TX_BANK : GPIO_RX_BANK );
207 if(pins & PLL_LOCK_DETECT)
208 //printf("Got Locked Status from Synth");
211 //printf("Got Unlocked Status from Synth");