2 #include "memory_map.h"
5 #include "buffer_pool.h"
15 #define PORT 2 // ethernet = 2, serdes = 0
16 int dsp_rx_buf, dsp_tx_buf, serdes_rx_buf, serdes_tx_buf;
17 int dsp_rx_idle, dsp_tx_idle, serdes_rx_idle, serdes_tx_idle;
22 void double_buffering(int port);
25 // We register this in the secondary interrupt vector.
26 // It's called on buffer manager interrupts
29 buffer_irq_handler(unsigned irq)
31 double_buffering(PORT);
42 output_regs->leds = 0x02;
45 output_regs->adc_ctrl = 0x0A;
48 dsp_tx_regs->freq = 0;
49 dsp_tx_regs->scale_iq = (1 << 16) | 1;
50 dsp_tx_regs->interp_rate = 8;
53 dsp_rx_regs->freq = 0;
54 dsp_rx_regs->scale_iq = (1 << 16) | 1;
55 dsp_rx_regs->decim_rate = 8;
57 // Set up buffer control, using only 4 for now
59 buffer_state[i] = EMPTY;
62 buffer_state[0] = FILLING;
64 bp_receive_to_buf(0, 1, 1, 10, 509); // DSP_RX to buffer 0, use 500 lines
66 //dsp_rx_regs->run_rx = 1; // Start DSP_RX
67 putstr("Done DSP RX setup\n");
70 buffer_state[2] = FILLING;
72 bp_receive_to_buf(2, PORT, 1, 5, 504);
74 while (buffer_pool_status->status == 0) // wait for completion of DSP RX
77 putstr("Done DSP TX setup\n");
78 //dsp_tx_regs->run_tx = 1;
80 // register interrupt handler
81 pic_register_handler(IRQ_BUFFER, buffer_irq_handler);
91 double_buffering(int port) {
92 unsigned int localstatus = buffer_pool_status->status;
94 if(localstatus & BPS_DONE_0) {
96 if(buffer_state[0] == FILLING) {
97 buffer_state[0] = FULL;
98 if(buffer_state[1] == EMPTY) {
99 bp_receive_to_buf(1, 1, 1, 10, 509); // DSP_RX to buffer 1, use 500 lines
100 buffer_state[1] = FILLING;
106 bp_send_from_buf(0, port, 1, 10, 509); // SERDES_TX from buffer 0
107 buffer_state[0] = EMPTYING;
110 else { // buffer was emptying
111 buffer_state[0] = EMPTY;
114 bp_receive_to_buf(0, 1, 1, 10, 509); // DSP_RX to buffer 0, use 500 lines
115 buffer_state[0] = FILLING;
117 if(buffer_state[1] == FULL) {
118 bp_send_from_buf(1, port, 1, 10, 509); // SERDES_TX from buffer 1
119 buffer_state[1] = EMPTYING;
124 putstr("Int Proc'ed 0\n");
126 if(localstatus & BPS_DONE_1) {
128 if(buffer_state[1] == FILLING) {
129 buffer_state[1] = FULL;
130 if(buffer_state[0] == EMPTY) {
131 bp_receive_to_buf(0, 1, 1, 10, 509); // DSP_RX to buffer 1, use 500 lines
132 buffer_state[0] = FILLING;
138 bp_send_from_buf(1, port, 1, 10, 509); // SERDES_TX from buffer 1
139 buffer_state[1] = EMPTYING;
142 else { // buffer was emptying
143 buffer_state[1] = EMPTY;
146 bp_receive_to_buf(1, 1, 1, 10, 509); // DSP_RX to buffer 1, use 500 lines
147 buffer_state[1] = FILLING;
149 if(buffer_state[0] == FULL) {
150 bp_send_from_buf(0, port, 1, 10, 509); // SERDES_TX from buffer 0
151 buffer_state[0] = EMPTYING;
156 putstr("Int Proc'ed 1\n");
158 if(localstatus & BPS_DONE_2) {
160 if(buffer_state[2] == FILLING) {
161 buffer_state[2] = FULL;
162 if(buffer_state[3] == EMPTY) {
163 bp_receive_to_buf(3, port, 1, 5, 504); // SERDES_RX to buffer 3, use 500 lines
164 buffer_state[3] = FILLING;
170 bp_send_from_buf(2, 1, 1, 5, 504); // DSP_TX from buffer 2
171 buffer_state[2] = EMPTYING;
174 else { // buffer was emptying
175 buffer_state[2] = EMPTY;
178 bp_receive_to_buf(2, port, 1, 5, 504); // SERDES_RX to buffer 2
179 buffer_state[2] = FILLING;
181 if(buffer_state[3] == FULL) {
182 bp_send_from_buf(3, 1, 1, 5, 504); // DSP_TX from buffer 3
183 buffer_state[3] = EMPTYING;
188 putstr("Int Proc'ed 2\n");
190 if(localstatus & BPS_DONE_3) {
192 if(buffer_state[3] == FILLING) {
193 buffer_state[3] = FULL;
194 if(buffer_state[2] == EMPTY) {
195 bp_receive_to_buf(2, port, 1, 5, 504); // SERDES_RX to buffer 2, use 500 lines
196 buffer_state[2] = FILLING;
202 bp_send_from_buf(3, 1, 1, 5, 504); // DSP_TX from buffer 3
203 buffer_state[3] = EMPTYING;
206 else { // buffer was emptying
207 buffer_state[3] = EMPTY;
210 bp_receive_to_buf(3, port, 1, 5, 504); // SERDES_RX to buffer 3
211 buffer_state[3] = FILLING;
213 if(buffer_state[2] == FULL) {
214 bp_send_from_buf(2, 1, 1, 5, 504); // DSP_TX from buffer 2
215 buffer_state[2] = EMPTYING;
220 putstr("Int Proc'ed 3\n");
230 int command = (3 << 19) | (0 << 16) | (i & 0xffff);
231 spi_transact(SPI_TXONLY, SPI_SS_TX_DAC, command, 24, 1); // negate TX phase
238 int *buf = (int *)(BUFFER_BASE + BUFFER_0);
241 for(i=0;i<BUFFER_SIZE;i++)
244 putstr("Filled buffer 0\n");
247 buf = (int *)(BUFFER_BASE + BUFFER_1);
249 for(i=0;i<BUFFER_SIZE;i++)
250 buf[i] = i + ((i^0xFFFF) << 16);
252 putstr("Filled buffer 1\n");
257 // rx SERDES into buffer #2 (buf,port,step,fl,ll)
258 bp_receive_to_buf(2, 0, 1, 10, 300);
259 putstr("SERDES RX buffer setup\n");
261 // send SERDES from buffer #0 (buf,port,step,fl,ll)
262 bp_send_from_buf(0, 0, 1, 20, 200);
263 putstr("SERDES TX buffer setup\n");
268 // send to DACs from buffer #1
269 bp_send_from_buf(1 /*buf#*/, 1 /*port*/, 1 /*step*/, 20 /*fl*/, 250 /*ll*/);
270 putstr("DAC Buffer setup\n");
274 //putstr("ENTER INT\n");
276 if(*status & (1<<i)) {
277 //putstr("Clearing buf ");
281 //putstr("EXIT INT\n");