1 # Copyright (C) 1991-2005 Altera Corporation
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2 # Your use of Altera Corporation's design tools, logic functions
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3 # and other software and tools, and its AMPP partner logic
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4 # functions, and any output files any of the foregoing
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5 # (including device programming or simulation files), and any
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6 # associated documentation or information are expressly subject
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7 # to the terms and conditions of the Altera Program License
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8 # Subscription Agreement, Altera MegaCore Function License
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9 # Agreement, or other applicable license agreement, including,
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10 # without limitation, that your use is for the sole purpose of
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11 # programming logic devices manufactured by Altera and sold by
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12 # Altera or its authorized distributors. Please refer to the
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13 # applicable agreement for further details.
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16 # The default values for assignments are stored in the file
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17 # usrp_multi_assignment_defaults.qdf
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18 # If this file doesn't exist, and for assignments not listed, see file
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19 # assignment_defaults.qdf
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21 # Altera recommends that you do not modify this file. This
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22 # file is updated automatically by the Quartus II software
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23 # and any changes you make may be lost or overwritten.
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26 # Project-Wide Assignments
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27 # ========================
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28 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0
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29 set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003"
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30 set_global_assignment -name LAST_QUARTUS_VERSION 6.1
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32 # Pin & Location Assignments
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33 # ==========================
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34 set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED"
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35 set_location_assignment PIN_29 -to SCLK
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36 set_location_assignment PIN_117 -to SDI
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37 set_location_assignment PIN_28 -to usbclk
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38 set_location_assignment PIN_107 -to usbctl[0]
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39 set_location_assignment PIN_106 -to usbctl[1]
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40 set_location_assignment PIN_105 -to usbctl[2]
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41 set_location_assignment PIN_100 -to usbdata[0]
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42 set_location_assignment PIN_84 -to usbdata[10]
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43 set_location_assignment PIN_83 -to usbdata[11]
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44 set_location_assignment PIN_82 -to usbdata[12]
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45 set_location_assignment PIN_79 -to usbdata[13]
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46 set_location_assignment PIN_78 -to usbdata[14]
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47 set_location_assignment PIN_77 -to usbdata[15]
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48 set_location_assignment PIN_99 -to usbdata[1]
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49 set_location_assignment PIN_98 -to usbdata[2]
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50 set_location_assignment PIN_95 -to usbdata[3]
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51 set_location_assignment PIN_94 -to usbdata[4]
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52 set_location_assignment PIN_93 -to usbdata[5]
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53 set_location_assignment PIN_88 -to usbdata[6]
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54 set_location_assignment PIN_87 -to usbdata[7]
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55 set_location_assignment PIN_86 -to usbdata[8]
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56 set_location_assignment PIN_85 -to usbdata[9]
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57 set_location_assignment PIN_104 -to usbrdy[0]
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58 set_location_assignment PIN_101 -to usbrdy[1]
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59 set_location_assignment PIN_76 -to FX2_1
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60 set_location_assignment PIN_75 -to FX2_2
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61 set_location_assignment PIN_74 -to FX2_3
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62 set_location_assignment PIN_116 -to io_rx_a[0]
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63 set_location_assignment PIN_115 -to io_rx_a[1]
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64 set_location_assignment PIN_114 -to io_rx_a[2]
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65 set_location_assignment PIN_113 -to io_rx_a[3]
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66 set_location_assignment PIN_108 -to io_rx_a[4]
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67 set_location_assignment PIN_195 -to io_rx_a[5]
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68 set_location_assignment PIN_196 -to io_rx_a[6]
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69 set_location_assignment PIN_197 -to io_rx_a[7]
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70 set_location_assignment PIN_200 -to io_rx_a[8]
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71 set_location_assignment PIN_201 -to io_rx_a[9]
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72 set_location_assignment PIN_202 -to io_rx_a[10]
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73 set_location_assignment PIN_203 -to io_rx_a[11]
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74 set_location_assignment PIN_206 -to io_rx_a[12]
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75 set_location_assignment PIN_207 -to io_rx_a[13]
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76 set_location_assignment PIN_208 -to io_rx_a[14]
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77 set_location_assignment PIN_214 -to io_rx_b[0]
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78 set_location_assignment PIN_215 -to io_rx_b[1]
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79 set_location_assignment PIN_216 -to io_rx_b[2]
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80 set_location_assignment PIN_217 -to io_rx_b[3]
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81 set_location_assignment PIN_218 -to io_rx_b[4]
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82 set_location_assignment PIN_219 -to io_rx_b[5]
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83 set_location_assignment PIN_222 -to io_rx_b[6]
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84 set_location_assignment PIN_223 -to io_rx_b[7]
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85 set_location_assignment PIN_224 -to io_rx_b[8]
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86 set_location_assignment PIN_225 -to io_rx_b[9]
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87 set_location_assignment PIN_226 -to io_rx_b[10]
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88 set_location_assignment PIN_227 -to io_rx_b[11]
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89 set_location_assignment PIN_228 -to io_rx_b[12]
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90 set_location_assignment PIN_233 -to io_rx_b[13]
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91 set_location_assignment PIN_234 -to io_rx_b[14]
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92 set_location_assignment PIN_175 -to io_tx_a[0]
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93 set_location_assignment PIN_176 -to io_tx_a[1]
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94 set_location_assignment PIN_177 -to io_tx_a[2]
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95 set_location_assignment PIN_178 -to io_tx_a[3]
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96 set_location_assignment PIN_179 -to io_tx_a[4]
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97 set_location_assignment PIN_180 -to io_tx_a[5]
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98 set_location_assignment PIN_181 -to io_tx_a[6]
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99 set_location_assignment PIN_182 -to io_tx_a[7]
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100 set_location_assignment PIN_183 -to io_tx_a[8]
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101 set_location_assignment PIN_184 -to io_tx_a[9]
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102 set_location_assignment PIN_185 -to io_tx_a[10]
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103 set_location_assignment PIN_186 -to io_tx_a[11]
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104 set_location_assignment PIN_187 -to io_tx_a[12]
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105 set_location_assignment PIN_188 -to io_tx_a[13]
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106 set_location_assignment PIN_193 -to io_tx_a[14]
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107 set_location_assignment PIN_73 -to io_tx_b[0]
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108 set_location_assignment PIN_68 -to io_tx_b[1]
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109 set_location_assignment PIN_67 -to io_tx_b[2]
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110 set_location_assignment PIN_66 -to io_tx_b[3]
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111 set_location_assignment PIN_65 -to io_tx_b[4]
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112 set_location_assignment PIN_64 -to io_tx_b[5]
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113 set_location_assignment PIN_63 -to io_tx_b[6]
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114 set_location_assignment PIN_62 -to io_tx_b[7]
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115 set_location_assignment PIN_61 -to io_tx_b[8]
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116 set_location_assignment PIN_60 -to io_tx_b[9]
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117 set_location_assignment PIN_59 -to io_tx_b[10]
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118 set_location_assignment PIN_58 -to io_tx_b[11]
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119 set_location_assignment PIN_57 -to io_tx_b[12]
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120 set_location_assignment PIN_56 -to io_tx_b[13]
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121 set_location_assignment PIN_55 -to io_tx_b[14]
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122 set_location_assignment PIN_152 -to master_clk
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123 set_location_assignment PIN_144 -to rx_a_a[0]
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124 set_location_assignment PIN_143 -to rx_a_a[1]
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125 set_location_assignment PIN_141 -to rx_a_a[2]
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126 set_location_assignment PIN_140 -to rx_a_a[3]
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127 set_location_assignment PIN_139 -to rx_a_a[4]
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128 set_location_assignment PIN_138 -to rx_a_a[5]
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129 set_location_assignment PIN_137 -to rx_a_a[6]
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130 set_location_assignment PIN_136 -to rx_a_a[7]
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131 set_location_assignment PIN_135 -to rx_a_a[8]
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132 set_location_assignment PIN_134 -to rx_a_a[9]
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133 set_location_assignment PIN_133 -to rx_a_a[10]
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134 set_location_assignment PIN_132 -to rx_a_a[11]
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135 set_location_assignment PIN_23 -to rx_a_b[0]
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136 set_location_assignment PIN_21 -to rx_a_b[1]
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137 set_location_assignment PIN_20 -to rx_a_b[2]
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138 set_location_assignment PIN_19 -to rx_a_b[3]
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139 set_location_assignment PIN_18 -to rx_a_b[4]
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140 set_location_assignment PIN_17 -to rx_a_b[5]
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141 set_location_assignment PIN_16 -to rx_a_b[6]
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142 set_location_assignment PIN_15 -to rx_a_b[7]
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143 set_location_assignment PIN_14 -to rx_a_b[8]
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144 set_location_assignment PIN_13 -to rx_a_b[9]
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145 set_location_assignment PIN_12 -to rx_a_b[10]
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146 set_location_assignment PIN_11 -to rx_a_b[11]
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147 set_location_assignment PIN_131 -to rx_b_a[0]
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148 set_location_assignment PIN_128 -to rx_b_a[1]
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149 set_location_assignment PIN_127 -to rx_b_a[2]
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150 set_location_assignment PIN_126 -to rx_b_a[3]
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151 set_location_assignment PIN_125 -to rx_b_a[4]
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152 set_location_assignment PIN_124 -to rx_b_a[5]
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153 set_location_assignment PIN_123 -to rx_b_a[6]
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154 set_location_assignment PIN_122 -to rx_b_a[7]
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155 set_location_assignment PIN_121 -to rx_b_a[8]
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156 set_location_assignment PIN_120 -to rx_b_a[9]
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157 set_location_assignment PIN_119 -to rx_b_a[10]
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158 set_location_assignment PIN_118 -to rx_b_a[11]
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159 set_location_assignment PIN_8 -to rx_b_b[0]
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160 set_location_assignment PIN_7 -to rx_b_b[1]
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161 set_location_assignment PIN_6 -to rx_b_b[2]
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162 set_location_assignment PIN_5 -to rx_b_b[3]
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163 set_location_assignment PIN_4 -to rx_b_b[4]
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164 set_location_assignment PIN_3 -to rx_b_b[5]
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165 set_location_assignment PIN_2 -to rx_b_b[6]
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166 set_location_assignment PIN_240 -to rx_b_b[7]
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167 set_location_assignment PIN_239 -to rx_b_b[8]
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168 set_location_assignment PIN_238 -to rx_b_b[9]
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169 set_location_assignment PIN_237 -to rx_b_b[10]
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170 set_location_assignment PIN_236 -to rx_b_b[11]
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171 set_location_assignment PIN_156 -to SDO
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172 set_location_assignment PIN_153 -to SEN_FPGA
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173 set_location_assignment PIN_159 -to tx_a[0]
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174 set_location_assignment PIN_160 -to tx_a[1]
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175 set_location_assignment PIN_161 -to tx_a[2]
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176 set_location_assignment PIN_162 -to tx_a[3]
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177 set_location_assignment PIN_163 -to tx_a[4]
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178 set_location_assignment PIN_164 -to tx_a[5]
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179 set_location_assignment PIN_165 -to tx_a[6]
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180 set_location_assignment PIN_166 -to tx_a[7]
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181 set_location_assignment PIN_167 -to tx_a[8]
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182 set_location_assignment PIN_168 -to tx_a[9]
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183 set_location_assignment PIN_169 -to tx_a[10]
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184 set_location_assignment PIN_170 -to tx_a[11]
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185 set_location_assignment PIN_173 -to tx_a[12]
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186 set_location_assignment PIN_174 -to tx_a[13]
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187 set_location_assignment PIN_38 -to tx_b[0]
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188 set_location_assignment PIN_39 -to tx_b[1]
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189 set_location_assignment PIN_41 -to tx_b[2]
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190 set_location_assignment PIN_42 -to tx_b[3]
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191 set_location_assignment PIN_43 -to tx_b[4]
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192 set_location_assignment PIN_44 -to tx_b[5]
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193 set_location_assignment PIN_45 -to tx_b[6]
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194 set_location_assignment PIN_46 -to tx_b[7]
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195 set_location_assignment PIN_47 -to tx_b[8]
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196 set_location_assignment PIN_48 -to tx_b[9]
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197 set_location_assignment PIN_49 -to tx_b[10]
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198 set_location_assignment PIN_50 -to tx_b[11]
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199 set_location_assignment PIN_53 -to tx_b[12]
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200 set_location_assignment PIN_54 -to tx_b[13]
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201 set_location_assignment PIN_158 -to TXSYNC_A
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202 set_location_assignment PIN_37 -to TXSYNC_B
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203 set_location_assignment PIN_235 -to io_rx_b[15]
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204 set_location_assignment PIN_24 -to io_tx_b[15]
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205 set_location_assignment PIN_213 -to io_rx_a[15]
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206 set_location_assignment PIN_194 -to io_tx_a[15]
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207 set_location_assignment PIN_1 -to MYSTERY_SIGNAL
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209 # Timing Assignments
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210 # ==================
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211 set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF
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213 # Analysis & Synthesis Assignments
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214 # ================================
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215 set_global_assignment -name SAVE_DISK_SPACE OFF
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216 set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
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217 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
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218 set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
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219 set_global_assignment -name FAMILY Cyclone
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220 set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED
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221 set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED
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222 set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED
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223 set_global_assignment -name TOP_LEVEL_ENTITY usrp_multi
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224 set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
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225 set_global_assignment -name USER_LIBRARIES "H:\\usrp-for2.7\\fpga\\megacells"
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226 set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON
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228 # Fitter Assignments
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229 # ==================
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230 set_global_assignment -name DEVICE EP1C12Q240C8
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231 set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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232 set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
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233 set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
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234 set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION"
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235 set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
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236 set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
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237 set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
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238 set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF
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239 set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
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240 set_global_assignment -name INC_PLC_MODE OFF
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241 set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF
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242 set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12]
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243 set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
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244 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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246 # Timing Analysis Assignments
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247 # ===========================
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248 set_global_assignment -name MAX_SCC_SIZE 50
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250 # EDA Netlist Writer Assignments
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251 # ==============================
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252 set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
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253 set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "<NONE>"
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254 set_global_assignment -name EDA_BOARD_DESIGN_TOOL "<NONE>"
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255 set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "<NONE>"
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256 set_global_assignment -name EDA_RESYNTHESIS_TOOL "<NONE>"
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258 # Assembler Assignments
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259 # =====================
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260 set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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261 set_global_assignment -name GENERATE_RBF_FILE ON
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262 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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263 set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
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265 # Simulator Assignments
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266 # =====================
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267 set_global_assignment -name START_TIME "0 ns"
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268 set_global_assignment -name GLITCH_INTERVAL "1 ns"
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270 # Design Assistant Assignments
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271 # ============================
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272 set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF
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273 set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF
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274 set_global_assignment -name ASSG_CAT OFF
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275 set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF
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276 set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF
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277 set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF
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278 set_global_assignment -name CLK_CAT OFF
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279 set_global_assignment -name CLK_RULE_COMB_CLOCK OFF
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280 set_global_assignment -name CLK_RULE_INV_CLOCK OFF
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281 set_global_assignment -name CLK_RULE_GATING_SCHEME OFF
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282 set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF
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283 set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF
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284 set_global_assignment -name CLK_RULE_MIX_EDGES OFF
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285 set_global_assignment -name RESET_CAT OFF
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286 set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF
\r
287 set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF
\r
288 set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF
\r
289 set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF
\r
290 set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF
\r
291 set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF
\r
292 set_global_assignment -name TIMING_CAT OFF
\r
293 set_global_assignment -name TIMING_RULE_SHIFT_REG OFF
\r
294 set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF
\r
295 set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF
\r
296 set_global_assignment -name NONSYNCHSTRUCT_CAT OFF
\r
297 set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF
\r
298 set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF
\r
299 set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF
\r
300 set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF
\r
301 set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF
\r
302 set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF
\r
303 set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF
\r
304 set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF
\r
305 set_global_assignment -name SIGNALRACE_CAT OFF
\r
306 set_global_assignment -name ACLK_CAT OFF
\r
307 set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF
\r
308 set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF
\r
309 set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF
\r
310 set_global_assignment -name HCPY_CAT OFF
\r
311 set_global_assignment -name HCPY_VREF_PINS OFF
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313 # SignalTap II Assignments
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314 # ========================
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315 set_global_assignment -name HUB_ENTITY_NAME SLD_HUB
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316 set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST
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317 set_global_assignment -name ENABLE_SIGNALTAP OFF
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319 # LogicLock Region Assignments
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320 # ============================
\r
321 set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF
\r
323 # -----------------
\r
324 # start CLOCK(SCLK)
\r
326 # Timing Assignments
\r
327 # ==================
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328 set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK
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329 set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id SCLK
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330 set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK
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335 # -----------------------
\r
336 # start CLOCK(master_clk)
\r
338 # Timing Assignments
\r
339 # ==================
\r
340 set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk
\r
341 set_global_assignment -name FMAX_REQUIREMENT "64 MHz" -section_id master_clk
\r
342 set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk
\r
344 # end CLOCK(master_clk)
\r
345 # ---------------------
\r
347 # -------------------
\r
348 # start CLOCK(usbclk)
\r
350 # Timing Assignments
\r
351 # ==================
\r
352 set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk
\r
353 set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id usbclk
\r
354 set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk
\r
356 # end CLOCK(usbclk)
\r
357 # -----------------
\r
359 # ----------------------
\r
360 # start ENTITY(usrp_multi)
\r
362 # Timing Assignments
\r
363 # ==================
\r
364 set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK
\r
365 set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk
\r
366 set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk
\r
368 # end ENTITY(usrp_multi)
\r
369 # --------------------
\r
372 set_global_assignment -name VERILOG_FILE ../../sdr_lib/rssi.v
\r
373 set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg_masked.v
\r
374 set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control_multi.v
\r
375 set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v
\r
376 set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v
\r
377 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v
\r
378 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v
\r
379 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/ram16_2sum.v
\r
380 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_rom.v
\r
381 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/halfband_decim.v
\r
382 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mac.v
\r
383 set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_ram.v
\r
384 set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_chain.v
\r
385 set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_dcoffset.v
\r
386 set_global_assignment -name VERILOG_FILE ../../sdr_lib/adc_interface.v
\r
387 set_global_assignment -name VERILOG_FILE ../../sdr_lib/io_pins.v
\r
388 set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg.v
\r
389 set_global_assignment -name VERILOG_FILE ../../sdr_lib/bidir_reg.v
\r
390 set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_int_shifter.v
\r
391 set_global_assignment -name VERILOG_FILE ../../megacells/clk_doubler.v
\r
392 set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_chain.v
\r
393 set_global_assignment -name VERILOG_FILE ../../sdr_lib/gen_sync.v
\r
394 set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control.v
\r
395 set_global_assignment -name VERILOG_FILE ../../megacells/fifo_2k.v
\r
396 set_global_assignment -name VERILOG_FILE ../../megacells/bustri.v
\r
397 set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_buffer.v
\r
398 set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_buffer.v
\r
399 set_global_assignment -name VERILOG_FILE ../../sdr_lib/phase_acc.v
\r
400 set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_interp.v
\r
401 set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_decim.v
\r
402 set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic_stage.v
\r
403 set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic.v
\r
404 set_global_assignment -name VERILOG_FILE usrp_multi.v
\r
405 set_global_assignment -name VERILOG_FILE ../../sdr_lib/clk_divider.v
\r
406 set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v
\r
407 set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v
\r
408 set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v
projects / debian / gnuradio / blob