git.gag.com Git - debian/gnuradio/blob - usrp/fpga/toplevel/sizetest/sizetest.csf

   1 COMPILER_SETTINGS
   2 {
   3         IO_PLACEMENT_OPTIMIZATION = OFF;
   4         ENABLE_DRC_SETTINGS = OFF;
   5         PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF;
   6         PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF;
   7         PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF;
   8         DRC_FANOUT_EXCEEDING = 30;
   9         DRC_REPORT_FANOUT_EXCEEDING = OFF;
  10         DRC_TOP_FANOUT = 50;
  11         DRC_REPORT_TOP_FANOUT = OFF;
  12         RUN_DRC_DURING_COMPILATION = OFF;
  13         ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON;
  14         ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF;
  15         ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF;
  16         ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF;
  17         SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF;
  18         MERGE_HEX_FILE = OFF;
  19         TRUE_WYSIWYG_FLOW = OFF;
  20         SEED = 1;
  21         FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY;
  22         FAMILY = Cyclone;
  23         DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
  24         DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
  25         DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
  26         DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
  27         DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1";
  28         DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1";
  29         DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
  30         DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
  31         DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
  32         DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
  33         DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
  34         DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
  35         DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
  36         DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
  37         DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
  38         DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB";
  39         DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3";
  40         DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
  41         DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
  42         DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4";
  43         DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3";
  44         DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS";
  45         DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS";
  46         DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS";
  47         STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
  48         PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
  49         PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2";
  50         STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1";
  51         FAST_FIT_COMPILATION = OFF;
  52         SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF;
  53         OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = OFF;
  54         OPTIMIZE_TIMING = OFF;
  55         OPTIMIZE_HOLD_TIMING = OFF;
  56         COMPILATION_LEVEL = FULL;
  57         SAVE_DISK_SPACE = ON;
  58         SPEED_DISK_USAGE_TRADEOFF = NORMAL;
  59         LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF;
  60         SIGNALPROBE_ALLOW_OVERUSE = OFF;
  61         FOCUS_ENTITY_NAME = |sizetest;
  62         FIT_ONLY_ONE_ATTEMPT = OFF;
  63 }
  64 DEFAULT_DEVICE_OPTIONS
  65 {
  66         GENERATE_CONFIG_HEXOUT_FILE = OFF;
  67         GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON;
  68         GENERATE_CONFIG_JBC_FILE = OFF;
  69         GENERATE_CONFIG_JAM_FILE = OFF;
  70         GENERATE_CONFIG_ISC_FILE = OFF;
  71         GENERATE_CONFIG_SVF_FILE = OFF;
  72         GENERATE_JBC_FILE_COMPRESSED = ON;
  73         GENERATE_JBC_FILE = OFF;
  74         GENERATE_JAM_FILE = OFF;
  75         GENERATE_ISC_FILE = OFF;
  76         GENERATE_SVF_FILE = OFF;
  77         RESERVE_PIN = "AS INPUT TRI-STATED";
  78         RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND";
  79         HEXOUT_FILE_COUNT_DIRECTION = UP;
  80         HEXOUT_FILE_START_ADDRESS = 0;
  81         GENERATE_HEX_FILE = OFF;
  82         GENERATE_RBF_FILE = OFF;
  83         GENERATE_TTF_FILE = OFF;
  84         RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
  85         RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED";
  86         RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO";
  87         RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO";
  88         RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO";
  89         DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF;
  90         AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
  91         EPROM_USE_CHECKSUM_AS_USERCODE = OFF;
  92         FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
  93         MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
  94         STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
  95         APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
  96         STRATIX_CONFIGURATION_DEVICE = AUTO;
  97         CYCLONE_CONFIGURATION_DEVICE = AUTO;
  98         FLEX10K_CONFIGURATION_DEVICE = AUTO;
  99         FLEX6K_CONFIGURATION_DEVICE = AUTO;
 100         MERCURY_CONFIGURATION_DEVICE = AUTO;
 101         EXCALIBUR_CONFIGURATION_DEVICE = AUTO;
 102         APEX20K_CONFIGURATION_DEVICE = AUTO;
 103         USE_CONFIGURATION_DEVICE = ON;
 104         ENABLE_INIT_DONE_OUTPUT = OFF;
 105         FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
 106         ENABLE_DEVICE_WIDE_OE = OFF;
 107         ENABLE_DEVICE_WIDE_RESET = OFF;
 108         RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
 109         AUTO_RESTART_CONFIGURATION = OFF;
 110         ENABLE_VREFB_PIN = OFF;
 111         ENABLE_VREFA_PIN = OFF;
 112         SECURITY_BIT = OFF;
 113         USER_START_UP_CLOCK = OFF;
 114         APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 115         FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 116         FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 117         MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 118         EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 119         CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL";
 120         STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 121         APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
 122         STRATIX_UPDATE_MODE = STANDARD;
 123         USE_CHECKSUM_AS_USERCODE = OFF;
 124         MAX7000_USE_CHECKSUM_AS_USERCODE = OFF;
 125         MAX7000_JTAG_USER_CODE = FFFFFFFF;
 126         FLEX10K_JTAG_USER_CODE = 7F;
 127         MERCURY_JTAG_USER_CODE = FFFFFFFF;
 128         APEX20K_JTAG_USER_CODE = FFFFFFFF;
 129         STRATIX_JTAG_USER_CODE = FFFFFFFF;
 130         MAX7000S_JTAG_USER_CODE = FFFF;
 131         RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
 132         FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
 133         FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF;
 134         ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
 135         MAX7000_ENABLE_JTAG_BST_SUPPORT = ON;
 136         ENABLE_JTAG_BST_SUPPORT = OFF;
 137         CONFIGURATION_CLOCK_DIVISOR = 1;
 138         CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ";
 139         CLOCK_SOURCE = INTERNAL;
 140         COMPRESSION_MODE = OFF;
 141         ON_CHIP_BITSTREAM_DECOMPRESSION = OFF;
 142 }
 143 AUTO_SLD_HUB_ENTITY
 144 {
 145         AUTO_INSERT_SLD_HUB_ENTITY = ENABLE;
 146         HUB_INSTANCE_NAME = SLD_HUB_INST;
 147         HUB_ENTITY_NAME = SLD_HUB;
 148 }
 149 CHIP(sizetest)
 150 {
 151         DEVICE = EP1C12Q240C8;
 152         DEVICE_FILTER_PACKAGE = "ANY QFP";
 153         DEVICE_FILTER_PIN_COUNT = 240;
 154         DEVICE_FILTER_SPEED_GRADE = ANY;
 155 }
 156 SIGNALTAP_LOGIC_ANALYZER_SETTINGS
 157 {
 158         ENABLE_SIGNALTAP = Off;
 159         AUTO_ENABLE_SMART_COMPILE = On;
 160 }