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   1 // megafunction wizard: %ALTPLL%
   2 // GENERATION: STANDARD
   3 // VERSION: WM1.0
   4 // MODULE: altpll
   5
   6 // ============================================================
   7 // File Name: pll.v
   8 // Megafunction Name(s):
   9 //                      altpll
  10 // ============================================================
  11 // ************************************************************
  12 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
  13 //
  14 // 4.0 Build 214 3/25/2004 SP 1 SJ Web Edition
  15 // ************************************************************
  16
  17
  18 //Copyright (C) 1991-2004 Altera Corporation
  19 //Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
  20 //support information,  device programming or simulation file,  and any other
  21 //associated  documentation or information  provided by  Altera  or a partner
  22 //under  Altera's   Megafunction   Partnership   Program  may  be  used  only
  23 //to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
  24 //other  use  of such  megafunction  design,  netlist,  support  information,
  25 //device programming or simulation file,  or any other  related documentation
  26 //or information  is prohibited  for  any  other purpose,  including, but not
  27 //limited to  modification,  reverse engineering,  de-compiling, or use  with
  28 //any other  silicon devices,  unless such use is  explicitly  licensed under
  29 //a separate agreement with  Altera  or a megafunction partner.  Title to the
  30 //intellectual property,  including patents,  copyrights,  trademarks,  trade
  31 //secrets,  or maskworks,  embodied in any such megafunction design, netlist,
  32 //support  information,  device programming or simulation file,  or any other
  33 //related documentation or information provided by  Altera  or a megafunction
  34 //partner, remains with Altera, the megafunction partner, or their respective
  35 //licensors. No other licenses, including any licenses needed under any third
  36 //party's intellectual property, are provided herein.
  37
  38
  39 // synopsys translate_off
  40 `timescale 1 ps / 1 ps
  41 // synopsys translate_on
  42 module pll (
  43         inclk0,
  44         c0);
  45
  46         input     inclk0;
  47         output    c0;
  48
  49         wire [5:0] sub_wire0;
  50         wire [0:0] sub_wire4 = 1'h0;
  51         wire [0:0] sub_wire1 = sub_wire0[0:0];
  52         wire  c0 = sub_wire1;
  53         wire  sub_wire2 = inclk0;
  54         wire [1:0] sub_wire3 = {sub_wire4, sub_wire2};
  55
  56         altpll  altpll_component (
  57                                 .inclk (sub_wire3),
  58                                 .clk (sub_wire0)
  59                                 // synopsys translate_off
  60 ,
  61                                 .fbin (),
  62                                 .pllena (),
  63                                 .clkswitch (),
  64                                 .areset (),
  65                                 .pfdena (),
  66                                 .clkena (),
  67                                 .extclkena (),
  68                                 .scanclk (),
  69                                 .scanaclr (),
  70                                 .scandata (),
  71                                 .scanread (),
  72                                 .scanwrite (),
  73                                 .extclk (),
  74                                 .clkbad (),
  75                                 .activeclock (),
  76                                 .locked (),
  77                                 .clkloss (),
  78                                 .scandataout (),
  79                                 .scandone (),
  80                                 .sclkout1 (),
  81                                 .sclkout0 (),
  82                                 .enable0 (),
  83                                 .enable1 ()
  84                                 // synopsys translate_on
  85
  86 );
  87         defparam
  88                 altpll_component.clk0_duty_cycle = 50,
  89                 altpll_component.lpm_type = "altpll",
  90                 altpll_component.clk0_multiply_by = 1,
  91                 altpll_component.inclk0_input_frequency = 20833,
  92                 altpll_component.clk0_divide_by = 1,
  93                 altpll_component.pll_type = "AUTO",
  94                 altpll_component.clk0_time_delay = "0",
  95                 altpll_component.intended_device_family = "Cyclone",
  96                 altpll_component.operation_mode = "NORMAL",
  97                 altpll_component.compensate_clock = "CLK0",
  98                 altpll_component.clk0_phase_shift = "-3000";
  99
 100
 101 endmodule
 102
 103 // ============================================================
 104 // CNX file retrieval info
 105 // ============================================================
 106 // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
 107 // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns"
 108 // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
 109 // Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
 110 // Retrieval info: PRIVATE: SPREAD_USE STRING "0"
 111 // Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
 112 // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
 113 // Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
 114 // Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
 115 // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
 116 // Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "-3.00000000"
 117 // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
 118 // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
 119 // Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
 120 // Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
 121 // Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
 122 // Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000"
 123 // Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
 124 // Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
 125 // Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
 126 // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
 127 // Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
 128 // Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
 129 // Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
 130 // Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
 131 // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
 132 // Retrieval info: PRIVATE: USE_CLK0 STRING "1"
 133 // Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
 134 // Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
 135 // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
 136 // Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
 137 // Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
 138 // Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
 139 // Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
 140 // Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
 141 // Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
 142 // Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
 143 // Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
 144 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "inclk;fbin;pllena;clkswitch;areset"
 145 // Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
 146 // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
 147 // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
 148 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_1 STRING "pfdena;clkena;extclkena;scanclk;scanaclr"
 149 // Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
 150 // Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
 151 // Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
 152 // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
 153 // Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
 154 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_2 STRING "scandata;scanread;scanwrite;clk;extclk"
 155 // Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
 156 // Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
 157 // Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
 158 // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "528.000"
 159 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_3 STRING "clkbad;activeclock;locked;clkloss;scandataout"
 160 // Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
 161 // Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
 162 // Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
 163 // Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "48.000"
 164 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_4 STRING "scandone;sclkout1;sclkout0;enable0;enable1"
 165 // Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
 166 // Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
 167 // Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000"
 168 // Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
 169 // Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
 170 // Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
 171 // Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
 172 // Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
 173 // Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
 174 // Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0"
 175 // Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
 176 // Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
 177 // Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
 178 // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
 179 // Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
 180 // Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
 181 // Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
 182 // Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
 183 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
 184 // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
 185 // Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
 186 // Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
 187 // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20833"
 188 // Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
 189 // Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
 190 // Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0"
 191 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
 192 // Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
 193 // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
 194 // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "-3000"
 195 // Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0"
 196 // Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]"
 197 // Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0"
 198 // Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]"
 199 // Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
 200 // Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
 201 // Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
 202 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE FALSE
 203 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE FALSE
 204 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE FALSE
 205 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE FALSE
 206 // Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.v TRUE FALSE
 207 // Retrieval info: GEN_FILE: TYPE_NORMAL pll_bb.v TRUE FALSE