2 * pic18f4610.c - device specific definitions
4 * This file is part of the GNU PIC library for SDCC,
5 * originally devised by Vangelis Rokas <vrokas AT otenet.gr>
7 * It has been automatically generated by inc2h-pic16.pl,
8 * (c) 2007 by Raphael Neider <rneider AT web.de>
11 #include <pic18f4610.h>
14 __sfr __at (0xF80) PORTA;
15 volatile __PORTAbits_t __at (0xF80) PORTAbits;
17 __sfr __at (0xF81) PORTB;
18 volatile __PORTBbits_t __at (0xF81) PORTBbits;
20 __sfr __at (0xF82) PORTC;
21 volatile __PORTCbits_t __at (0xF82) PORTCbits;
23 __sfr __at (0xF83) PORTD;
24 volatile __PORTDbits_t __at (0xF83) PORTDbits;
26 __sfr __at (0xF84) PORTE;
27 volatile __PORTEbits_t __at (0xF84) PORTEbits;
29 __sfr __at (0xF89) LATA;
30 volatile __LATAbits_t __at (0xF89) LATAbits;
32 __sfr __at (0xF8A) LATB;
33 volatile __LATBbits_t __at (0xF8A) LATBbits;
35 __sfr __at (0xF8B) LATC;
36 volatile __LATCbits_t __at (0xF8B) LATCbits;
38 __sfr __at (0xF8C) LATD;
39 volatile __LATDbits_t __at (0xF8C) LATDbits;
41 __sfr __at (0xF8D) LATE;
42 volatile __LATEbits_t __at (0xF8D) LATEbits;
44 __sfr __at (0xF92) DDRA;
45 volatile __DDRAbits_t __at (0xF92) DDRAbits;
47 __sfr __at (0xF92) TRISA;
48 volatile __TRISAbits_t __at (0xF92) TRISAbits;
50 __sfr __at (0xF93) DDRB;
51 volatile __DDRBbits_t __at (0xF93) DDRBbits;
53 __sfr __at (0xF93) TRISB;
54 volatile __TRISBbits_t __at (0xF93) TRISBbits;
56 __sfr __at (0xF94) DDRC;
57 volatile __DDRCbits_t __at (0xF94) DDRCbits;
59 __sfr __at (0xF94) TRISC;
60 volatile __TRISCbits_t __at (0xF94) TRISCbits;
62 __sfr __at (0xF95) DDRD;
63 volatile __DDRDbits_t __at (0xF95) DDRDbits;
65 __sfr __at (0xF95) TRISD;
66 volatile __TRISDbits_t __at (0xF95) TRISDbits;
68 __sfr __at (0xF96) DDRE;
69 volatile __DDREbits_t __at (0xF96) DDREbits;
71 __sfr __at (0xF96) TRISE;
72 volatile __TRISEbits_t __at (0xF96) TRISEbits;
74 __sfr __at (0xF9B) OSCTUNE;
75 volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits;
77 __sfr __at (0xF9D) PIE1;
78 volatile __PIE1bits_t __at (0xF9D) PIE1bits;
80 __sfr __at (0xF9E) PIR1;
81 volatile __PIR1bits_t __at (0xF9E) PIR1bits;
83 __sfr __at (0xF9F) IPR1;
84 volatile __IPR1bits_t __at (0xF9F) IPR1bits;
86 __sfr __at (0xFA0) PIE2;
87 volatile __PIE2bits_t __at (0xFA0) PIE2bits;
89 __sfr __at (0xFA1) PIR2;
90 volatile __PIR2bits_t __at (0xFA1) PIR2bits;
92 __sfr __at (0xFA2) IPR2;
93 volatile __IPR2bits_t __at (0xFA2) IPR2bits;
95 __sfr __at (0xFAB) RCSTA;
96 volatile __RCSTAbits_t __at (0xFAB) RCSTAbits;
98 __sfr __at (0xFAC) TXSTA;
99 volatile __TXSTAbits_t __at (0xFAC) TXSTAbits;
101 __sfr __at (0xFAD) TXREG;
103 __sfr __at (0xFAE) RCREG;
105 __sfr __at (0xFAF) SPBRG;
107 __sfr __at (0xFB0) SPBRGH;
109 __sfr __at (0xFB1) T3CON;
110 volatile __T3CONbits_t __at (0xFB1) T3CONbits;
112 __sfr __at (0xFB2) TMR3L;
114 __sfr __at (0xFB3) TMR3H;
116 __sfr __at (0xFB4) CMCON;
117 volatile __CMCONbits_t __at (0xFB4) CMCONbits;
119 __sfr __at (0xFB5) CVRCON;
120 volatile __CVRCONbits_t __at (0xFB5) CVRCONbits;
122 __sfr __at (0xFB6) ECCP1AS;
123 volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits;
125 __sfr __at (0xFB6) ECCPAS;
126 volatile __ECCPASbits_t __at (0xFB6) ECCPASbits;
128 __sfr __at (0xFB7) PWM1CON;
129 volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits;
131 __sfr __at (0xFB8) BAUDCON;
132 volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits;
134 __sfr __at (0xFB8) BAUDCTL;
135 volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits;
137 __sfr __at (0xFBA) CCP2CON;
138 volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits;
140 __sfr __at (0xFBB) CCPR2;
142 __sfr __at (0xFBB) CCPR2L;
144 __sfr __at (0xFBC) CCPR2H;
146 __sfr __at (0xFBD) CCP1CON;
147 volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits;
149 __sfr __at (0xFBE) CCPR1;
151 __sfr __at (0xFBE) CCPR1L;
153 __sfr __at (0xFBF) CCPR1H;
155 __sfr __at (0xFC0) ADCON2;
156 volatile __ADCON2bits_t __at (0xFC0) ADCON2bits;
158 __sfr __at (0xFC1) ADCON1;
159 volatile __ADCON1bits_t __at (0xFC1) ADCON1bits;
161 __sfr __at (0xFC2) ADCON0;
162 volatile __ADCON0bits_t __at (0xFC2) ADCON0bits;
164 __sfr __at (0xFC3) ADRES;
166 __sfr __at (0xFC3) ADRESL;
168 __sfr __at (0xFC4) ADRESH;
170 __sfr __at (0xFC5) SSPCON2;
171 volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits;
173 __sfr __at (0xFC6) SSPCON1;
174 volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits;
176 __sfr __at (0xFC7) SSPSTAT;
177 volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits;
179 __sfr __at (0xFC8) SSPADD;
181 __sfr __at (0xFC9) SSPBUF;
183 __sfr __at (0xFCA) T2CON;
184 volatile __T2CONbits_t __at (0xFCA) T2CONbits;
186 __sfr __at (0xFCB) PR2;
188 __sfr __at (0xFCC) TMR2;
190 __sfr __at (0xFCD) T1CON;
191 volatile __T1CONbits_t __at (0xFCD) T1CONbits;
193 __sfr __at (0xFCE) TMR1L;
195 __sfr __at (0xFCF) TMR1H;
197 __sfr __at (0xFD0) RCON;
198 volatile __RCONbits_t __at (0xFD0) RCONbits;
200 __sfr __at (0xFD1) WDTCON;
201 volatile __WDTCONbits_t __at (0xFD1) WDTCONbits;
203 __sfr __at (0xFD2) HLVDCON;
204 volatile __HLVDCONbits_t __at (0xFD2) HLVDCONbits;
206 __sfr __at (0xFD2) LVDCON;
207 volatile __LVDCONbits_t __at (0xFD2) LVDCONbits;
209 __sfr __at (0xFD3) OSCCON;
210 volatile __OSCCONbits_t __at (0xFD3) OSCCONbits;
212 __sfr __at (0xFD5) T0CON;
213 volatile __T0CONbits_t __at (0xFD5) T0CONbits;
215 __sfr __at (0xFD6) TMR0L;
217 __sfr __at (0xFD7) TMR0H;
219 __sfr __at (0xFD8) STATUS;
220 volatile __STATUSbits_t __at (0xFD8) STATUSbits;
222 __sfr __at (0xFD9) FSR2L;
224 __sfr __at (0xFDA) FSR2H;
226 __sfr __at (0xFDB) PLUSW2;
228 __sfr __at (0xFDC) PREINC2;
230 __sfr __at (0xFDD) POSTDEC2;
232 __sfr __at (0xFDE) POSTINC2;
234 __sfr __at (0xFDF) INDF2;
236 __sfr __at (0xFE0) BSR;
238 __sfr __at (0xFE1) FSR1L;
240 __sfr __at (0xFE2) FSR1H;
242 __sfr __at (0xFE3) PLUSW1;
244 __sfr __at (0xFE4) PREINC1;
246 __sfr __at (0xFE5) POSTDEC1;
248 __sfr __at (0xFE6) POSTINC1;
250 __sfr __at (0xFE7) INDF1;
252 __sfr __at (0xFE8) WREG;
254 __sfr __at (0xFE9) FSR0L;
256 __sfr __at (0xFEA) FSR0H;
258 __sfr __at (0xFEB) PLUSW0;
260 __sfr __at (0xFEC) PREINC0;
262 __sfr __at (0xFED) POSTDEC0;
264 __sfr __at (0xFEE) POSTINC0;
266 __sfr __at (0xFEF) INDF0;
268 __sfr __at (0xFF0) INTCON3;
269 volatile __INTCON3bits_t __at (0xFF0) INTCON3bits;
271 __sfr __at (0xFF1) INTCON2;
272 volatile __INTCON2bits_t __at (0xFF1) INTCON2bits;
274 __sfr __at (0xFF2) INTCON;
275 volatile __INTCONbits_t __at (0xFF2) INTCONbits;
277 __sfr __at (0xFF3) PROD;
279 __sfr __at (0xFF3) PRODL;
281 __sfr __at (0xFF4) PRODH;
283 __sfr __at (0xFF5) TABLAT;
285 __sfr __at (0xFF6) TBLPTR;
287 __sfr __at (0xFF6) TBLPTRL;
289 __sfr __at (0xFF7) TBLPTRH;
291 __sfr __at (0xFF8) TBLPTRU;
293 __sfr __at (0xFF9) PC;
295 __sfr __at (0xFF9) PCL;
297 __sfr __at (0xFFA) PCLATH;
299 __sfr __at (0xFFB) PCLATU;
301 __sfr __at (0xFFC) STKPTR;
302 volatile __STKPTRbits_t __at (0xFFC) STKPTRbits;
304 __sfr __at (0xFFD) TOS;
306 __sfr __at (0xFFD) TOSL;
308 __sfr __at (0xFFE) TOSH;
310 __sfr __at (0xFFF) TOSU;